KR20130089462A - Circuit board, flip-chip package having the same, and manufacturing method thereof - Google Patents

Abstract

PURPOSE: A circuit board, a flip-chip package having the same, and a manufacturing method thereof are provided to form a plurality of support bumps, thereby reducing the manufacturing processes and costs. CONSTITUTION: A core substrate (111) comprises conductive materials. A circuit pattern (121) is formed on one side of the core substrate. A plurality of support bumps (131) is formed on the periphery of the circuit pattern. The support bumps protrudes higher than the circuit pattern. A wiring pattern (141) is electrically connected with an external device.

Description

Circuit board, flip chip package having the same and manufacturing method thereof {Circuit board, flip-chip package having the same, and manufacturing method

The present invention relates to a circuit board, and more particularly, to a circuit board on which a flip chip is mounted, a flip chip package manufactured using the circuit board, and a method of manufacturing the circuit board.

In order to manufacture a semiconductor package, a substrate on which a semiconductor chip on which an electric circuit is formed may be mounted is required. The substrate should have a circuit pattern on one or both sides thereof for an electrical signal output from the semiconductor chip to be transmitted to an external device or an electrical signal for transmission from an external device to the semiconductor chip. The circuit pattern may be formed by forming a copper layer on one or both surfaces of the substrate and patterning the copper layer.

In order to manufacture a semiconductor package, a die attach process in which a semiconductor chip is bonded to a die pad by using a conductive adhesive such as epoxy has been used, but this is a complicated process, which increases cost and time. There are disadvantages. Recently, in order to reduce a semiconductor manufacturing process, a flip chip formed to eliminate a die attach process and directly bond a semiconductor chip to a substrate has been used.

A bumped wiring circuit board and a manufacturing method thereof are disclosed in a patent (Japanese Patent Laid-Open No. 2002-111185). The patent discloses a structure in which a plurality of bumps protrude from a wiring circuit board. Since the plurality of bumps protrude from each other, when the flip chip is adhered to the wiring circuit board, the plurality of bumps are pressed together with the connection pads formed on the flip chip. It is unnecessary to squeeze all the plurality of bumps, and the manufacturing process for forming these unnecessary bumps becomes complicated, and the manufacturing cost increases.

The present invention provides a circuit board, a flip chip package, and a method of manufacturing the circuit board, which can shorten a manufacturing process and reduce manufacturing cost.

In order to solve the above problems, the circuit board of the present invention,

A core substrate made of a conductive material; A circuit pattern formed on one surface of the core substrate; And a plurality of support bumps formed of a conductive material formed around the circuit pattern and protruding higher than the circuit pattern.

The plurality of support bumps respectively protrude 10 to 20 [um] higher than the circuit pattern.

And a wiring pattern formed on the other side of the core substrate and electrically connected to an external device.

In order to solve the above problems, the flip chip package of the present invention,

A circuit board including a core substrate made of a conductive material, a circuit pattern formed on one surface of the core substrate, and a plurality of support bumps of a conductive material formed around the circuit pattern and protruding higher than the circuit pattern; And a flip chip mounted on the circuit board.

The flip chip includes a plurality of input / output bumps for inputting / outputting an electrical signal and a plurality of dummy bumps for inputting / outputting an electrical signal, and the plurality of dummy bumps are bonded to the plurality of support bumps.

The plurality of support bumps are similar in shape and cross-sectional area to the plurality of dummy bumps.

In order to solve the above problems, the circuit board manufacturing method of the present invention,

(a) half-etching one surface of a core substrate made of a conductive material; (b) filling the one surface with an insulating material; (c) half-etching the other side of the core substrate, wherein forming a plurality of support bumps protruding higher than the half-etched side near an edge of the other side; And (d) forming a circuit pattern inside the plurality of support bumps.

After step (b), the surface filled with the insulating material is polished to flatten the one surface, and further, polishing the conductive material until the conductive material is exposed.

After the step (d) further comprises the step of forming a wiring pattern on the other side of the core substrate.

The method may further include forming a photo solder resist pattern on the surface on which the circuit pattern is formed and on the surface on which the wiring pattern is formed.

The present invention includes a plurality of support bumps protruding higher than the circuit pattern on one surface of the circuit board, that is, one surface of the circuit board on which the flip chip is mounted. The plurality of support bumps are simply formed in a process of forming a circuit pattern on the circuit board.

In addition, the flip chip package is completed by binding two or more dummy bumps of the plurality of bumps formed on the flip chip to transmit an electrical signal to the plurality of support bumps.

As described above, the manufacturing process of the flip chip package is shortened by forming the plurality of support bumps on the circuit board, thereby greatly reducing the manufacturing cost of the flip chip package.

In addition, since the plurality of support bumps protrude higher than the circuit pattern, a wide space is formed between the circuit pattern of the flip chip and the circuit pattern of the circuit board. Therefore, when molding the flip chip, it is easy for the molding resin to flow into the space, whereby no blistering occurs. If blisters occur in the molding resin during molding, the sealing force of the molding resin is weakened, and the molding resin of the completed flip chip package may crack or moisture may seep into the molding resin from outside, causing the flip chip circuit to malfunction. have.

1 is a cross-sectional view of a circuit board for flip chip mounting according to the present invention.
2 is a cross-sectional view of a flip chip mounted on a flip chip package of the present invention.
3 is a cross-sectional view of a flip chip package according to the present invention.
4 to 12 are cross-sectional views sequentially illustrating a method of manufacturing the circuit board shown in FIG. 1.
13 to 15 are cross-sectional views sequentially illustrating a method of manufacturing the flip chip package illustrated in FIG. 3.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

1 is a cross-sectional view of a flip chip mounting circuit board 101 according to the present invention. Referring to FIG. 1, the circuit board 101 includes a core substrate 111, a circuit pattern 121, a plurality of support bumps 131 and a wiring pattern 141.

The core substrate 111 is made of a conductive material. The conductive material is preferably composed of a material having high conductivity and low cost, such as copper.

The circuit pattern 121 is formed on one surface, for example, the upper surface of the core substrate 111.

The plurality of support bumps 131 are formed around the circuit pattern 121 and protrude higher than the circuit pattern 121. That is, the plurality of support bumps 131 may be formed to protrude 10-20 [um] higher than the circuit pattern 121. The plurality of support bumps 131 may be formed to have a similar shape and cross-sectional area to a plurality of dummy bumps 231 of FIG. 2 formed on the flip chip 201 of FIG. 2. For example, when the cross-sectional shape of the plurality of support bumps 131 is square, the cross-sectional shape of the plurality of dummy bumps 231 of FIG. 2 may also be formed in a square shape, and the cross-sectional area thereof may be similarly formed. Accordingly, the plurality of support bumps 131 may be easily coupled to the plurality of dummy bumps 231.

The wiring pattern 141 is formed on the other side of the core substrate 111, for example, the bottom surface. The wiring pattern 141 is electrically connected to a circuit pattern formed on the other circuit board when the circuit board 121 is stacked on another circuit board (not shown). A plurality of conductive balls (161 of FIG. 12), for example, solder balls, may be formed in the wiring pattern 141, and the plurality of conductive balls (161 of FIG. 12) may be contact pads of the other circuit board. coupled to and electrically connected to the pad).

The circuit pattern 121 and the wiring pattern 141 may be coated with a resin 115, for example, a solder resist or a photo solder resist (PSR). The resin pattern 115 protects the circuit pattern 121 and the wiring pattern 141 from the external environment.

2 is a cross-sectional view of a flip chip 201 mounted in a flip chip package of the present invention. Referring to FIG. 2, the flip chip 201 includes a semiconductor substrate 211, a circuit pattern 221, and a plurality of bumps 231.

The circuit pattern 221 is formed on one surface, for example, an upper surface of the semiconductor substrate 211.

The bumps 231 may be formed inside and / or outside the circuit pattern 221. The plurality of bumps 231 may include a plurality of input / output bumps (not shown) and a plurality of dummy bumps, but for convenience of description, the plurality of bumps 231 refers to the plurality of dummy bumps. do.

The plurality of input / output bumps are electrically connected to the circuit pattern 221, and the plurality of dummy bumps 231 are not electrically connected to the circuit pattern 221. Accordingly, the plurality of input / output bumps exchange electrical signals with the circuit board 101 when mounted on the circuit board 101, but the plurality of dummy bumps 231 transmit electrical signals with the circuit board 101. Do not receive. When the plurality of dummy bumps 231 are mounted on the circuit board 101, the plurality of dummy bumps 231 fixedly couple the flip chip 201 to the circuit board 101. In addition, the plurality of dummy bumps 231 may be connected to the ground terminal generated in the flip chip 201 to transfer the ground voltage generated in the flip chip 201 to the circuit board 101.

3 is a cross-sectional view of the flip chip package 301 according to the present invention. Referring to FIG. 3, the flip chip package 301 includes a flip chip 201 mounted on a circuit board 101.

Since the structure of the circuit board 101 has been described in detail with reference to FIG. 1, redundant description thereof will be omitted.

The plurality of dummy bumps 231 formed on the flip chip 201 are bonded to the support bumps 131 of the circuit board 101. Since the plurality of support bumps 131 formed on the circuit board 101 protrude higher than the circuit pattern 121, in order to bond the flip chip 201 to the circuit board 101, the plurality of support bumps 131 are formed on the circuit board 101. The plurality of dummy bumps 231 and the plurality of dummy bumps 231 are compressed by compressing the flip chip 201 and the circuit board 101 while the dummy bumps 231 are aligned on the plurality of support bumps 131 of the circuit board 101. Two support bumps 131 to be attached. Accordingly, the flip chip 201 is fixedly mounted on the circuit board 101.

In order to mount the flip chip 201 on the circuit board 101 as described above, the number of the plurality of dummy bumps 231 formed on the flip chip 201 and the plurality of support bumps 131 formed on the circuit board 101 are provided. The number of) is preferably the same.

Only one flip chip 201 is mounted on the circuit board 101. That is, it may be configured as a one metal flip chip package 301.

In order to stack the flip chip package 301 on another circuit board (not shown), a plurality of conductive balls (161 of FIG. 12) may be formed on the wiring pattern 141 formed under the circuit board 101. The plurality of conductive balls (161 of FIG. 12) are bonded to and electrically connected to the other circuit board 101.

Flip chip 201 may be sealed by a molding resin (241 of FIG. 15) to be protected from the external environment.

Since the plurality of support bumps 131 protrude higher than the circuit pattern 121, when the flip chip package 301 is completed, the circuit pattern 221 of the flip chip 201 and the circuit pattern of the circuit board 101 ( A large space is formed between 121). Therefore, when molding the flip chip 201, it is easy for the molding resin (241 in FIG. 15) to flow into the space, whereby blistering does not occur. If blisters occur in the molding resin (241 in FIG. 15) during molding, the bonding force of the molding resin (241 in FIG. 15) is weakened, thereby molding resin (241 in FIG. 15) of the completed flip chip package 301. Cracks or moisture from the outside may seep into the molding resin (241 in FIG. 15) and cause the circuit of the flip chip 201 to malfunction.

4 through 12 are cross-sectional views sequentially illustrating a method of manufacturing the circuit board 101 shown in FIG. 1. A manufacturing method of the circuit board 101 will be described in detail with reference to FIGS. 4 to 12.

Referring to FIG. 4, a core substrate 111 is prepared. The core substrate 111 is configured in the form of a thin rectangular plate. The core substrate 111 may be made of a conductive material, for example, copper.

Referring to FIG. 5, a space 112 is formed by half-etching one surface of the core substrate 111, for example, a lower surface thereof. At this time, the half etched place is preferably located in a part of the core substrate 111, for example, the central portion. In order to half-etch the lower surface of the core substrate 111, a photoresist is coated on the entire lower surface of the core substrate 111, and the exposure, development, and etching processes are performed after patterning the photosensitive material. Next, a process of removing the photosensitive material from the core substrate 111 may be performed.

Referring to FIG. 6, an insulating material 113 is coated on the entire lower surface of the core substrate 111 to fill the insulating material 113, for example, resin, in the half-etched place 112. The coating of the insulating material 113 may be a method of filling a liquid-type resin such as screen printing and comma coating. If the insulating material 113 is a film type, the laminating method may be applied to the half etching space 112. Can be filled.

Referring to FIG. 7, the entire lower surface of the core substrate 111 may be polished or ground to be flattened. In this case, as shown in FIG. 7, only the half-etched portion of the insulating material 113 remains and the conductive material 111a of the other portion is exposed.

Referring to FIG. 8, the thickness of the top surface of the core substrate 111 may be reduced by half-etching another surface of the core substrate 111. In this case, a plurality of support bumps 131 protruding higher than the half-etched surface 111b are formed near the edge of the upper surface. In order to form the plurality of support bumps 131, a photosensitive material is coated on the entire upper surface of the core substrate 111, the photosensitive material is patterned, and an exposure, development, and etching process is performed, followed by the core substrate 111. The process of removing the photosensitive material from may be performed.

Referring to FIG. 9, a circuit pattern 121 is formed inside the plurality of support bumps 131. In order to form the circuit pattern 121, a photosensitive material is coated on the entire upper surface of the core substrate 111, the photosensitive material is patterned, and an exposure, development, and etching process is performed, and then the core substrate 111 is removed from the core substrate 111. A process of removing the photosensitive material may be performed.

Referring to FIG. 10, the wiring pattern 141 is formed on one surface of the core substrate 111. In order to form the wiring pattern 141, a photosensitive material is coated on the entire lower surface of the core substrate 111, the photosensitive material is patterned, exposure, development, and etching are performed, and then the photosensitive material is removed from the core substrate 111. The process of removing the substance can be carried out.

Referring to FIG. 11, a photo solder resist is coated on a surface of the core substrate 111 on which the circuit pattern 121 is formed and a surface of the wiring pattern 141. In order to coat the photo solder resist, the photo solder resist may be coated on the entire lower surface of the core substrate 111, and the photo solder resist may be patterned and then exposed, developed, and etched. Thus, the manufacture of the circuit board 101 shown in FIG. 11 is completed.

Referring to FIG. 12, a plurality of conductive balls 161 may be formed on the wiring pattern 141 formed on one surface, that is, the bottom surface of the circuit board 101. The plurality of conductive balls 161 are preferably formed of solder. By forming the plurality of conductive balls 161 with solder, it is easy to couple the circuit board 101 to a circuit pattern formed on the other circuit board 101.

As described above, the plurality of support bumps 131 are formed on the circuit board 101 to protrude higher than the circuit pattern 121, and the plurality of support bumps 131 are flip-chips (201 of FIG. 2). By pressing the plurality of dummy bumps 231 of FIG. 2, the flip chip package 301 of FIG. 3 may be manufactured. As a result, the manufacturing process of the flip chip package 301 of FIG. 3 is shortened, thereby significantly reducing the manufacturing cost of the flip chip package 301 of FIG. 3.

13 to 15 are cross-sectional views sequentially illustrating a method of manufacturing the flip chip package 301 illustrated in FIG. 3.

Referring to FIG. 13, a flip chip 201 is disposed on a circuit board 101. At this time, the circuit pattern 121 of the circuit board 101 and the circuit pattern 221 of the flip chip 201 vertically coincide with each other, and the plurality of support bumps 131 and the flip chip ( The plurality of dummy bumps 231 of 201 are aligned vertically.

Referring to FIG. 14, the plurality of dummy bumps 231 formed on the flip chip 201 and the plurality formed on the circuit board 101 may be simultaneously applied to the upper portion of the flip chip 201 and the lower portion of the circuit board 101. Support bumps 131 are compressed to each other.

Referring to FIG. 15, the flip chip 201 may be molded by using a molding resin 241. The flip chip 201 is sealed by the molding resin 241, thereby protecting it from the external environment.

As described above, the plurality of support bumps 131 formed on the circuit board 101 to protrude higher than the circuit pattern 121 may be briefly used during the manufacturing process of the circuit board 101 by using the material of the core substrate 111. It can form by a process.

Accordingly, the manufacturing process of the circuit board 101 and the flip chip package 301 is shortened, thereby reducing the manufacturing cost of the circuit board 101 and the flip chip package 301.

Although the present invention has been described with reference to the embodiments shown in the drawings, it is to be understood that various modifications and equivalent embodiments may be made by those skilled in the art without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

Claims (10)

A core substrate made of a conductive material;
A circuit pattern formed on one surface of the core substrate; And
And a plurality of support bumps of a conductive material formed around the circuit pattern and protruding higher than the circuit pattern. The method of claim 1,
The plurality of support bumps are protruded 10 to 20 [um] higher than the circuit pattern, respectively. The method of claim 1,
And a wiring pattern formed on the other side of the core substrate and electrically connected to an external device. A circuit board including a core substrate made of a conductive material, a circuit pattern formed on one surface of the core substrate, and a plurality of support bumps of a conductive material formed around the circuit pattern and protruding higher than the circuit pattern; And
And a flip chip mounted on the circuit board. 5. The method of claim 4,
The flip chip may include a plurality of input / output bumps for inputting / outputting an electrical signal and a plurality of dummy bumps for inputting / outputting an electrical signal, wherein the plurality of dummy bumps are bonded to the plurality of support bumps. package. 5. The method of claim 4,
The plurality of support bumps are flip chip package, characterized in that the cross-sectional area and similar shape of the plurality of dummy bumps. (a) half-etching one surface of a core substrate made of a conductive material;
(b) filling the one surface with an insulating material;
(c) half-etching the other side of the core substrate, wherein forming a plurality of support bumps protruding higher than the half-etched side near an edge of the other side; And
(d) forming a circuit pattern inside the plurality of support bumps. The method of claim 7, wherein
And after the step (b), polishing the surface filled with the insulating material to flatten the surface, wherein the surface of the conductive material is exposed until the conductive material is exposed. The method of claim 7, wherein
And after the step (d), forming a wiring pattern on the other side of the core substrate. 10. The method of claim 9,
And forming a photo solder resist pattern on the surface on which the circuit pattern is formed and on the surface on which the wiring pattern is formed.

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