KR20130052258A - Method for fabricating semiconductor device - Google Patents
Method for fabricating semiconductor device Download PDFInfo
- Publication number
- KR20130052258A KR20130052258A KR1020110117608A KR20110117608A KR20130052258A KR 20130052258 A KR20130052258 A KR 20130052258A KR 1020110117608 A KR1020110117608 A KR 1020110117608A KR 20110117608 A KR20110117608 A KR 20110117608A KR 20130052258 A KR20130052258 A KR 20130052258A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating film
- conductive layer
- semiconductor device
- flowable
- forming
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming an insulating film of a semiconductor device.
In general, a process of filling a space between conductive layer patterns such as metal wiring with an insulating layer is essential in manufacturing a semiconductor device, and at this time, a high density plasma (HDP) process having a high step coverage is mainly used. I use it.
However, as the degree of integration of semiconductor devices increases, design rules decrease, so that an insulating film is buried in openings such as holes and trenches having a high aspect ratio in a conventional high density plasma (HDP) process. There is a limit. Accordingly, a lot of researches on forming an insulating film using a fluid material.
On the other hand, although a spin-on-glass coating method having excellent flow characteristics has been proposed, it is difficult to secure subsequent heat treatment process conditions accompanying densification and stabilization of an insulating layer. In particular, there is a problem in that insulation characteristics are deteriorated due to the generation of voids and cracks in the insulating film in the heat treatment process, and thus a method of forming a fluid insulating film by chemical vapor deposition (CVD) has been developed.
1A and 1B are cross-sectional views illustrating a method of forming an insulating film of a semiconductor device according to the prior art, and FIG. 2 is an electron micrograph of the device of FIG. 1B.
Referring to FIG. 1A, a
Referring to FIG. 1B, a
The
Referring to FIG. 2, the nitrogen (N) group and the hydrogen (H) group, which remain in the space between the structures in which the first and second
Therefore, development of a method of converting a fluid insulating film into a silicon oxide film (SiO 2 ) free of nitrogen (N) groups, hydrogen (H) groups, and the like is required.
SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device capable of stably forming an insulating film having excellent insulating properties by overcoming the embedding limit of the insulating film due to a reduction in design rules.
SUMMARY OF THE INVENTION A method of manufacturing a semiconductor device according to a first embodiment of the present invention for solving the above problems includes forming a conductive layer pattern on a substrate; Forming a fluid insulating film filling the space between the conductive layer patterns; Performing a water vapor treatment and a curing process on the flowable insulating film; And performing a wet heat treatment process on the water vapor treated and cured flowable insulating film.
In addition, a method of manufacturing a semiconductor device according to a second embodiment of the present invention for solving the above problems comprises the steps of forming a conductive layer pattern on a substrate; Forming a fluid insulating film filling the space between the conductive layer patterns; And performing a wet heat treatment process on the flowable insulating film, wherein forming the flowable insulating film includes: depositing a flowable material; Steam treatment; And repeating the cycle consisting of performing a curing process.
According to the method of manufacturing a semiconductor device according to the present invention, it is possible to stably form an insulating film having excellent insulating properties by overcoming the embedding limit of the insulating film due to the reduction of design rules.
1A and 1B are cross-sectional views illustrating a method of forming an insulating film of a semiconductor device according to the prior art.
2 is an electron micrograph of the device of FIG. 1B.
3A to 3F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention.
4A to 4D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention.
Hereinafter, the most preferred embodiment of the present invention will be described. In the drawings, the thickness and spacing are expressed for convenience of description and may be exaggerated compared to the actual physical thickness. In describing the present invention, known configurations irrespective of the gist of the present invention may be omitted. It should be noted that, in the case of adding the reference numerals to the constituent elements of the drawings, the same constituent elements have the same number as much as possible even if they are displayed on different drawings.
3A to 3F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention.
Referring to FIG. 3A, the first
The
The first
The
Referring to FIG. 3B, the
Subsequently, the first and second
Subsequently, a liner is formed on the
Here, the
Meanwhile, before forming the
Referring to FIG. 3C, a
The
Referring to FIG. 3D, a curing process is performed to remove nitrogen (N) groups included in the
Here, the curing process may be performed using ozone (O 3 ) at a relatively low temperature, for example, a temperature of about 150 ℃ to 200 ℃ and a pressure of about 400 Torr to 600 Torr. At this time, the flow rate of ozone (O 3 ) may proceed for about 30 seconds to 300 seconds to about 20,000 sccm to 30,000 sccm.
In particular, steam (H 2 O) treatment is performed in parallel during the curing process. At this time, the water vapor (H 2 O) the process so as to supply with a carrier gas (Carrier Gas) to vaporize H 2 O in a liquid state, the flow rate of the water vapor (H 2 O) is 2gram / min to 10gram /
As a result of this process, reaction products (N, H), such as ammonia (NH 3 ), of the nitrogen (N) group and the hydrogen (H) group included in the flowable insulating
Referring to FIG. 3E, a purge process may be performed to first remove reaction products N and H of the nitrogen (N) group and the hydrogen (H) group included in the flowable insulating
In particular, performing a cycle (H 2 O) treatment, performing a purge process, performing a curing process, performing a purge process three times to repeat the cycle (Cycle) about 3 to 10 times Preferably, when the cycle is repeated, reaction products (N, H) of the nitrogen (N) group and the hydrogen (H) group included in the flowable insulating
Referring to FIG. 3F, a heat treatment process is performed to secondarily remove reaction products (N, H) of nitrogen (N) and hydrogen (H) groups included in the flowable
Here, the heat treatment process may be carried out wet under a temperature of about 300 ° C. to 700 ° C. and a pressure of about 400 Torr to 700 Torr in a furnace of a catalytic water vapor generation (CWVG) type furnace. In particular, it is possible to heat-treat at several stages at intermediate temperatures without proceeding to the maximum temperature immediately after mounting the wafer, for example, heat treatment at 300 ° C. and heat treatment at 700 ° C. can be performed continuously. At this time, the temperature may be raised from 300 ° C to 700 ° C in a wet atmosphere, and the heat treatment time for each temperature may be about 60 minutes to about 120 minutes. In addition, the moisture fraction at 300 ° C. is about 2% to 10%, and the moisture fraction at 700 ° C. is about 80% to 90%. However, even at the same temperature, the moisture fraction may be changed in various steps.
Meanwhile, a pumping process is performed in parallel during the heat treatment process. In this case, the pumping process may be performed for about 20 seconds to 60 seconds under a pressure condition of 1mTorr to 9mTorr after the heat treatment at 300 ℃. In particular, it is preferable to repeat the cycle consisting of the step of performing a wet heat treatment at 300 ℃, the pumping process about 2 to 5 times, if the cycle is repeatedly performed nitrogen contained in the flowable
As a result of this process, the flowable
4A to 4D are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment of the present invention. In the description of the present embodiment, detailed description of parts substantially the same as those of the first embodiment will be omitted. First, the processes of FIGS. 3A and 3B are performed in the same manner as the first embodiment, and then the processes of FIG. 4A are performed.
Referring to FIG. 4A, a first fluid insulating
Here, the first fluid insulating
Referring to FIG. 4B, steam (H 2 O) treatment is performed to remove nitrogen (N) and hydrogen (H) groups included in the first flowable insulating
Here, the water vapor (H 2 O) treatment may be carried out at a relatively low temperature, such as 50 ℃ to 150 ℃ temperature and 400 Torr to 600 Torr pressure in the curing equipment. At this time, the flow rate of the water vapor (H 2 O) can proceed to about 10 to 20 minutes to about 2 gram / min to 10 gram / min.
Subsequently, a curing process is performed on the first
Here, the curing process may be performed using ozone (O 3 ) under the same temperature and pressure as the water vapor (H 2 O) treatment. At this time, the flow rate of ozone (O 3 ) may be about 30 seconds to 300 seconds to about 20,000 sccm to 30,000 sccm, the water vapor (H 2 O) treatment and the curing process in one chamber (In -situ).
Referring to FIG. 4C, the second, third and fourth fluid insulating layers may be repeatedly formed by repeating the above-described steps of depositing the fluid material, performing a water vapor (H 2 O) treatment, and performing a curing process. (150B, 150C, 150D) are formed.
As a result of this process, the space between the laminated structures is completely filled by the first to fourth flowable insulating
Referring to FIG. 4D, a heat treatment process is performed to remove reaction products (N, H) of nitrogen (N) and hydrogen (H) groups remaining in the first to fourth flowable insulating
Here, the heat treatment process may be performed in a catalytic steam generation (CWVG) furnace at a temperature of about 300 ℃ to 700 ℃ and a pressure of about 400 Torr to 700 Torr. In particular, it is possible to heat-treat at several stages at intermediate temperatures without proceeding to the maximum temperature immediately after mounting the wafer, for example, heat treatment at 300 ° C. and heat treatment at 700 ° C. can be performed continuously. At this time, the temperature may be raised from 300 ° C to 700 ° C in a wet atmosphere, and the heat treatment time for each temperature may be about 60 minutes to about 120 minutes. In addition, the moisture fraction at 300 ° C is about 2% to 10%, the moisture fraction at 700 ° C is about 80% to 90%, but even at the same temperature can be carried out in different steps by varying the moisture fraction.
As a result of this process, the flowable
In the second embodiment described above, the flowable insulating
According to the method for manufacturing a semiconductor device according to the first and second embodiments of the present invention described above, a wet heat treatment step is performed after depositing a flowable material having a low nitrogen (N) content and then performing a water vapor treatment and curing in parallel. By performing the above, the flowable insulating film can be converted into a silicon oxide film (SiO 2 ) having no nitrogen (N) group, hydrogen (H) group, or the like. Accordingly, it is possible to overcome the embedding limit of the insulating film due to the reduction of the design rule, and to form an insulating film having excellent insulating properties stably, thereby improving the reliability of the semiconductor device.
It should be noted that the technical spirit of the present invention has been specifically described in accordance with the above-described preferred embodiments, but the above-described embodiments are intended to be illustrative and not restrictive. In addition, it will be understood by those of ordinary skill in the art that various embodiments are possible within the scope of the technical idea of the present invention.
100
120A: second
140: liner insulating film 150: flowable insulating film
Claims (5)
Forming a fluid insulating film filling the space between the conductive layer patterns;
Performing a water vapor treatment and a curing process on the flowable insulating film; And
Performing a wet heat treatment process on the water vapor treated and cured flowable insulating film;
The manufacturing method of a semiconductor device.
The steam treatment and curing step is performed,
Performing parallel purge process
The manufacturing method of a semiconductor device.
Performing the wet heat treatment process,
Performing the pumping process in parallel
The manufacturing method of a semiconductor device.
Forming a fluid insulating film filling the space between the conductive layer patterns; And
Performing a wet heat treatment process on the flowable insulating film,
The forming of the flow insulating film,
Depositing a flowable material;
Steam treatment; And
Repeating the cycle consisting of the step of performing the curing process
The manufacturing method of a semiconductor device.
The forming of the flow insulating film,
Using a nitrogen-free reactant
The manufacturing method of a semiconductor device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110117608A KR20130052258A (en) | 2011-11-11 | 2011-11-11 | Method for fabricating semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110117608A KR20130052258A (en) | 2011-11-11 | 2011-11-11 | Method for fabricating semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20130052258A true KR20130052258A (en) | 2013-05-22 |
Family
ID=48661929
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020110117608A KR20130052258A (en) | 2011-11-11 | 2011-11-11 | Method for fabricating semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20130052258A (en) |
-
2011
- 2011-11-11 KR KR1020110117608A patent/KR20130052258A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101161098B1 (en) | Gapfill improvement with low etch rate dielectric liners | |
US9786542B2 (en) | Mechanisms for forming semiconductor device having isolation structure | |
US7589012B1 (en) | Method for fabricating semiconductor memory device | |
US20050277257A1 (en) | Gap filling with a composite layer | |
JP2007221058A (en) | Method for manufacturing semiconductor device | |
KR20090009030A (en) | Semiconductor device having a trench isolation region and method of fabricating the same | |
US20050023634A1 (en) | Method of fabricating shallow trench isolation structure and microelectronic device having the structure | |
US20080268612A1 (en) | Method of forming isolation layer in semiconductor device | |
US20080160716A1 (en) | Method for fabricating an isolation layer in a semiconductor device | |
US20160020139A1 (en) | Gap-filling dielectric layer method for manufacturing the same and applications thereof | |
KR100972675B1 (en) | Method of forming isolation layer in semiconductor device | |
JP2012142528A (en) | Manufacturing method of semiconductor device | |
KR20130052258A (en) | Method for fabricating semiconductor device | |
US9312167B1 (en) | Air-gap structure formation with ultra low-k dielectric layer on PECVD low-k chamber | |
CN110211916B (en) | Method for manufacturing shallow trench isolation structure | |
KR100849725B1 (en) | Method for fabricating isolation layer using rapid vapor deposition in semiconductor device | |
JP2010050145A (en) | Method for manufacturing element isolation structure, and element isolation structure | |
KR100877257B1 (en) | Method for gapfilling a trench in semiconductor device | |
KR20110024513A (en) | Method for fabricating semiconductor device | |
KR20090045679A (en) | Method for fabricating semiconductor device | |
KR20090103197A (en) | Method for forming interlayer dielectric of semiconductor device | |
KR100869852B1 (en) | Method for manufacturing isolation layer in semiconductor device | |
KR100968153B1 (en) | Method for forming trench isolation layer in semiconductor device | |
KR20060077486A (en) | Method for forming isolation layer in semiconductor device | |
KR20100079154A (en) | Method for gap fill of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |