KR20100079154A - Method for gap fill of semiconductor device - Google Patents

Method for gap fill of semiconductor device Download PDF

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Publication number
KR20100079154A
KR20100079154A KR1020080137569A KR20080137569A KR20100079154A KR 20100079154 A KR20100079154 A KR 20100079154A KR 1020080137569 A KR1020080137569 A KR 1020080137569A KR 20080137569 A KR20080137569 A KR 20080137569A KR 20100079154 A KR20100079154 A KR 20100079154A
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KR
South Korea
Prior art keywords
trench
forming
semiconductor device
film
gap fill
Prior art date
Application number
KR1020080137569A
Other languages
Korean (ko)
Inventor
여상학
Original Assignee
주식회사 동부하이텍
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Priority to KR1020080137569A priority Critical patent/KR20100079154A/en
Publication of KR20100079154A publication Critical patent/KR20100079154A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE: A gap fill method of a semiconductor device is provided so that padding about the trench after improving hydrophobicity or the hydrophilic property about the trench through the surface reforming treatment. The gap fill performance is improved. CONSTITUTION: Pad layers(202, 203) are formed on a semiconductor substrate(201). A trench is formed in a pad layer and the semiconductor substrate. Surface modifying on a trench region is performed through a surface process. The trench is filled and an element isolation film(207) is formed. The pad layer is removed.

Description

Gap fill method of semiconductor device {METHOD FOR GAP FILL OF SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gap fill method of a semiconductor device. More particularly, a semiconductor device for improving gap fill performance by improving hydrophobicity or hydrophilicity through surface modification treatment of a trench formed in a semiconductor device. It relates to a gapfill method.

As is well known, as the development of semiconductor device manufacturing technology and its application field have been expanded, research and development on the increase in the degree of integration of semiconductor devices have been rapidly developed. As the degree of integration of semiconductor devices increases, studies on the miniaturization of semiconductor devices based on microprocessing technologies have been actively conducted.

In the technology of miniaturization of such a semiconductor device, a technique for separating a region by forming a trench in a semiconductor substrate or a thin film and then gap-filling has emerged as one of the important items in order to integrate the device.

1A to 1J are process diagrams for explaining a device isolation film forming process as an example of a gap fill method of a semiconductor device according to the prior art. A method of forming a device isolation layer according to the prior art will be described with reference to this.

Referring to FIG. 1A, a pad oxide film 12 is formed on a semiconductor substrate 11, and a pad nitride film 13 is laminated on the pad oxide film 12.

Referring to FIG. 1B, a bottom anti reflective coating 14 is formed on the pad nitride film 13, and a photoresist pattern 15 is formed on the pad nitride film 13.

Referring to FIG. 1C, after the photoresist pattern 15 is used as an etch barrier, the antireflection film 14 is selectively removed, and the pad nitride film 13 and the pad oxide film 12 are continuously removed to form a trench. The semiconductor substrate 11 is exposed.

Referring to FIG. 1D, the photoresist strip process and the cleaning process are performed to remove the photoresist pattern 15 and the anti-reflection film 14.

Referring to FIG. 1E, a trench T is formed by dry etching an exposed portion of the semiconductor substrate 11 to a predetermined thickness using the pad nitride film 13 as an etching barrier.

Referring to FIG. 1F, the trench liner oxide layer 16 is formed by performing an STI liner oxidation process, that is, growing the surface of the trench T through a thermal process.

Referring to FIG. 1G, an oxide film 17 is formed on the entire surface of the structure including the trench T through the process of FIGS. 1A to 1F to bury the trench. At this time, there is a high possibility of causing an overhang in which the oxide film 17 is excessively deposited in the corner region of the trench T, which acts as a main factor in generating voids (V), thereby preventing gap fill defects. Cause.

Referring to FIG. 1H, the surface of the entire structure having the trench embedded therein is subjected to a chemical mechanical polishing (CMP) process until the pad nitride layer 13 is exposed.

Referring to FIG. 1I, an annealing process is performed to dehydrate and densify the oxide film 17.

Referring to FIG. 1J, the pad nitride layer 13 is removed by performing a wet dip process using a phosphoric acid solution or the like.

As described above, according to the gap fill method of the semiconductor device according to the related art, there is a high possibility of causing an overhang in which the thin film is excessively deposited in the corner region of the trench when filling the trench, which acts as a main factor for generating voids. There was a problem that causes a gap fill defect. As such, the presence of voids lowers the mechanical strength of the device, and in the case of the device isolation film, reduces the electrical insulation capability.

The present invention has been proposed to solve the problems of the prior art, and provides a gap fill method of a semiconductor device in which a gap formed in a trench formed in the semiconductor device is improved by improving hydrophobicity or hydrophilicity through surface modification treatment.

In one aspect of the present invention, a gap fill method of a semiconductor device may include forming a first thin film on a semiconductor substrate, forming a trench in the first thin film, and forming a surface modified region by surface treatment of the trench. And forming a second thin film by gap filling the trench.

According to another aspect of the present invention, a gap fill method of a semiconductor device may include forming a pad film on a semiconductor substrate, forming a trench in the pad film and the semiconductor substrate, and performing a surface treatment on the trench. Forming a device isolation film by gap filling the trench, forming a device isolation film, and removing the pad film.

Here, the forming of the surface modification region may use any one of a chemical treatment technique, a heat treatment technique, or a plasma treatment technique.

The chemical treatment technique utilizes a self-assembly or self-assembled monolayer (SAM) process.

The step of forming the surface modification region uses a reaction gas containing hydrogen and fluorine or a reaction gas containing oxygen and nitrogen.

According to the present invention, the trench formed in the semiconductor device is subjected to surface modification to improve hydrophobicity or hydrophilicity, and then buried in the trench, thereby improving gap fill performance and preventing voids, thereby improving mechanical strength of the device. In the case of the device isolation layer, the electrical insulation ability is improved.

Hereinafter, some embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

The gap fill method of a semiconductor device according to the present invention is generated during a semiconductor device manufacturing process, such as a process of forming a metal wiring in a trench after patterning an insulating layer as well as forming an isolation layer for electrical isolation between the device and the device. Applicable to all gapfill methods.

2A to 2F are examples of a gap fill method of a semiconductor device according to an exemplary embodiment of the present invention, in which a trench formed in a thin film on a semiconductor substrate is gap filled.

Referring to FIG. 2A, a first thin film 102 is formed on the semiconductor substrate 101. For example, the first thin film 102 may be an interlayer insulating film formed by depositing an oxide film or a nitride film and may be a metal wire formed by depositing a metal material.

Referring to FIG. 2B, after the photoresist is applied on the first thin film 102, a photoresist pattern 103 is formed to open only the region where the trench is to be formed through appropriate exposure and development processes.

Referring to FIG. 2C, a trench T is formed in the first thin film 102 by selectively removing the first thin film 102 using the photoresist pattern 103 as a barrier film. ).

Referring to FIG. 2D, the surface of the bottom and side surfaces of the trench T may be hydrophilic or hydrophobic through a surface modification treatment on the trench T. Referring to FIG. In other words, the surface modification region 104 is formed on the surface of the trench T.

Here, the surface modification treatment may use any one of chemical treatment, heat treatment, or plasma treatment.

For example, when a substrate such as silicon oxide, metal or platinum is immersed in a solution in which organosilicon, thiol-based organic material, amine-based organic active material, etc. are dissolved, self-assembly in which an organic active material is spontaneously bonded to the substrate to form a monolayer film Or branched molecular thin film processes. Surfactant molecules used in the self-assembly process are the heads that chemically bond to the substrate, the body parts that interact with the intermolecular or van der waals attraction with the substrate, and the functional groups at the end of the molecule. It can be divided into tails that play a role, and the functional group at the end determines the surface properties of the self-assembled monomolecular film (within ~ 10Å). In such a chemical treatment method, the surface of the trench T is modified to be hydrophilic or hydrophobic according to the type and characteristic of the chemical.

Alternatively, when surface modification is performed by plasma treatment and heat treatment, the surface of the trench T may be modified to be hydrophilic or hydrophobic according to the chemical composition of the treatment gas when the surface modification is performed for about 5 minutes at a treatment temperature of 100 ° C. or lower. For example, in the case of heat treatment, an annealing process of a gas atmosphere is performed after a curing process using ultraviolet rays.

Here, in order to form the surface modification region 104 hydrophobicly, a reaction gas including hydrogen and fluorine, such as H 2 , F 2 , SF 2 , CF 2 , C2F 6 , is used, and in this case, the thin film 102 The surface energy of is substantially lowered so that the surface is hydrophobically modified.

Alternatively, when the surface modification region 104 is to be made hydrophilic, a reaction gas containing oxygen and nitrogen, such as O, N 2 , N 2 0, is used, and at this time, the surface energy of the thin film 102 is substantially increased. Its surface is modified to be hydrophilic.

This surface modification treatment process has a reaction process as shown in FIG. In FIG. 4, (a) is gas phase diffusion, (b) is gas phase reaction, (c) is adsorption reaction, (d) is surface reaction, and (e ) Is the surface diffusion reaction, (f) is the incorporation into the erystal lattice, (g) is the desorption of the reaction product, and (h) is the gas phase diffusion. to be.

Referring to FIG. 2E, after removing the photoresist pattern 103 through cleaning, a process of filling the trench T by forming a second thin film 105 on the entire surface of the structure including the trench T is performed. For example, the second thin film 105 may be a metal wiring formed by depositing a metal material, or may be an interlayer insulating film formed by depositing an oxide film or a nitride film.

Referring to FIG. 2F, the surface of the entire structure in which the trenches T are embedded is subjected to a chemical mechanical polishing process until the first thin film 102 is exposed.

3A to 3J illustrate a gap fill method for forming a device isolation layer on a semiconductor substrate as another example of a gap fill method of a semiconductor device according to an embodiment of the present invention. A method of forming an isolation layer will be described in detail with reference to this.

Referring to FIG. 3A, a pad oxide film 202 is formed on a semiconductor substrate 201, and a pad nitride film 203 is stacked on a pad oxide film 202. Here, the pad oxide film 202 may be omitted as a film formed for the purpose of relieving stress between the semiconductor substrate 201 and the subsequent pad nitride film 203, and the low pressure furnace (Low Furnace) as the pad nitride film 203. Si 3 N 4 film formed in a manner is used.

Referring to FIG. 3B, an anti-reflection film 204 is formed on the pad nitride film 203, and a photoresist pattern 205 is formed on the pad nitride film 203. That is, after the photoresist is applied on the anti-reflection film 204, a photoresist pattern 205 is formed to open only the region where the trench is to be formed through appropriate exposure and development processes. The anti-reflection film 204 may be omitted as it is formed to reduce diffuse reflection during the etching process.

Referring to FIG. 3C, after the photoresist pattern 205 is used as an etching barrier, the anti-reflection film 204 is selectively removed, and the pad nitride film 203 and the pad oxide film 202 are successively removed to form the trench. The semiconductor substrate 201 is exposed.

Referring to FIG. 3D, the photoresist strip process and the cleaning process are performed to remove the photoresist pattern 205 and the anti-reflection film 204.

Referring to FIG. 3E, the trench T is formed by dry etching the exposed portion of the semiconductor substrate 201 to a predetermined thickness using the pad nitride film 203 as an etching barrier.

Referring to FIG. 3F, the surface of the bottom and side surfaces of the trench T may be hydrophilic or hydrophobic through surface modification treatment on the trench T. Referring to FIG. That is, the surface modification region 206 is formed on the surface of the trench T.

Here, the surface modification treatment may use any one of chemical treatment, heat treatment, or plasma treatment as in the above-described embodiment. Similarly, when the surface modified region 104 is to be hydrophobic, a reaction gas containing hydrogen and fluorine, such as H 2 , F 2 , SF 2 , CF 2 , C 2 F 6, and the like, is used. To form a hydrophilic to use a reaction gas containing oxygen and nitrogen, such as O, N 2 , N 2 0.

In this case, according to the related art, the surface of the trench T is grown through a thermal process to form a trench liner oxide film. This is to reduce the stress aggregated on the semiconductor substrate and to obtain the effect of suppressing the diffusion of dopants from the device isolation layer to the semiconductor substrate. According to the present invention, the surface modification region 206 is formed in the trench T. Since it is formed, this liner oxide film forming process may be omitted.

On the other hand, in the case of using a heat treatment or a plasma treatment technique for the surface modification treatment, a process for shortening the process time and cost by performing an in-situ in the deposition equipment up to a subsequent filling process of the trench T to be performed later. Can be expected to decrease.

Referring to FIG. 3G, an oxide film 207 such as TEOS is formed on the entire surface of the structure including the trenches T that have undergone the processes of FIGS. 3A to 3F to bury the trenches T. Referring to FIG.

Referring to FIG. 3H, the surface of the entire structure having the trench embedded therein is subjected to a chemical mechanical polishing process until the pad nitride layer 203 is exposed.

Referring to FIG. 3I, an annealing process is performed to dehydrate and densify the oxide film 207.

Referring to FIG. 3J, the pad nitride film 203 and the pad oxide film 202 are removed by performing a wet dip process using a phosphoric acid solution or the like.

It has been described so far limited to one embodiment of the present invention, it is obvious that the technology of the present invention can be easily modified by those skilled in the art. Such modified embodiments should be included in the technical spirit described in the claims of the present invention.

1A to 1J are process diagrams for explaining a device isolation film forming process as an example of a gap fill method of a semiconductor device according to the prior art.

2A to 2F are examples of a gap fill method of a semiconductor device according to an exemplary embodiment of the present invention, in which a trench formed in a thin film on a semiconductor substrate is gap filled.

3A to 3J illustrate a gap fill method for forming a device isolation layer on a semiconductor substrate as another example of a gap fill method of a semiconductor device according to an embodiment of the present invention.

4 is a view showing a reaction procedure by the surface modification treatment process according to an embodiment of the present invention.

Claims (5)

Forming a first thin film on a semiconductor substrate, Forming a trench in the first thin film; Forming a surface modified region through surface treatment of the trench; Gap-filling the trench to form a second thin film A gap fill method of a semiconductor device comprising a. Forming a pad film on the semiconductor substrate, Forming trenches in the pad layer and the semiconductor substrate; Forming a surface modified region through surface treatment of the trench; Gap-filling the trench to form an isolation layer; Removing the pad layer A gap fill method of a semiconductor device comprising a. The method according to claim 1 or 2, The forming of the surface modification region may include any one of a chemical treatment technique, a heat treatment technique, or a plasma treatment technique. Gap fill method of a semiconductor device. The method of claim 3, wherein The chemical treatment technique uses a self-assembly or self-assembled monolayer (SAM) process. Gap method of semiconductor device. The method according to claim 1 or 3, Forming the surface modification region, using a reaction gas containing hydrogen and fluorine or a reaction gas containing oxygen and nitrogen Gap method of semiconductor device.
KR1020080137569A 2008-12-30 2008-12-30 Method for gap fill of semiconductor device KR20100079154A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10388546B2 (en) 2015-11-16 2019-08-20 Lam Research Corporation Apparatus for UV flowable dielectric

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10388546B2 (en) 2015-11-16 2019-08-20 Lam Research Corporation Apparatus for UV flowable dielectric
US11270896B2 (en) 2015-11-16 2022-03-08 Lam Research Corporation Apparatus for UV flowable dielectric

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