KR20130049916A - Silicon carbide schottky barrier diode and manufacturing method for the same - Google Patents

Silicon carbide schottky barrier diode and manufacturing method for the same Download PDF

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Publication number
KR20130049916A
KR20130049916A KR1020110114968A KR20110114968A KR20130049916A KR 20130049916 A KR20130049916 A KR 20130049916A KR 1020110114968 A KR1020110114968 A KR 1020110114968A KR 20110114968 A KR20110114968 A KR 20110114968A KR 20130049916 A KR20130049916 A KR 20130049916A
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South Korea
Prior art keywords
epi
silicon carbide
layer
schottky barrier
metal
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KR1020110114968A
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Korean (ko)
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홍경국
이종석
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현대자동차주식회사
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Priority to KR1020110114968A priority Critical patent/KR20130049916A/en
Publication of KR20130049916A publication Critical patent/KR20130049916A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

Abstract

PURPOSE: A silicon carbide schottky barrier diode and a manufacturing method thereof are provided to improve a breakdown property by distributing the concentration of an electric field. CONSTITUTION: An n- epitaxial layer(11) is laminated on an n+ substrate. A p+ epitaxial layer(12) protrudes from the upper side of the n- epitaxial layer. Schottky metal(13) is laminated on the p+ epitaxial layer and the n- epitaxial layer. A conductive region is formed when a forward voltage is applied. A leakage current is blocked by a depletion layer.

Description

Silicon carbide schottky barrier diode and manufacturing method for the same

The present invention relates to a silicon carbide schottky barrier diode and a method for manufacturing the same, and more particularly, to a silicon carbide schottky barrier diode and a method for manufacturing the same.

The Schottky diode is a diode made by bonding an N-type semiconductor and a metal, and it is called a Schottky diode made using a Schottky barrier discovered by a German person named Walter H. Schottky.

Schottky diodes have a low forward drop of 0.2V to 0.4V and a 10x faster switching speed than conventional diodes.

The low forward voltage drop means low heat generation and good efficiency in terms of power, and low voltage drop (= distortion) of the input signal when acting as a signal rectifier or switch.

Faster switching speed means shorter recovery time. Recovery time is how fast a signal can be sent in the forward direction when the reverse bias is applied and the forward bias is applied again.

Thus, Schottky diodes can be used to increase efficiency, so they are often used where power supply circuits or fast switches / rectifiers are required for high frequency signal processing.

However, there are disadvantages such as low maximum reverse voltage (maximum voltage that can withstand when reverse bias is applied) and high reverse leakage current.

Meanwhile, most of the silicon carbide schottky barrier diodes (SBDs) currently in mass production have a junction barrier schottky formed with p + in the form of ion implantation at the bottom of the Schottky junction in order to reduce the reverse leakage current. By applying barrier schottky (JBS) structure, leakage current is blocked and breakdown voltage is improved by overlapping of pn diode depletion layer diffused when reverse voltage is applied.

However, in order to achieve such an effect, an expensive ion implanter capable of applying a wafer held at a high temperature to high voltage ions and an apparatus capable of high temperature heat treatment to recover a damaged wafer surface after ion implantation are required. There is a disadvantage in that cost increases when manufacturing SBD.

The present invention has been invented to improve the above disadvantages, Schottky by applying a method of etching a substrate on which a p + epitaxial layer (hereinafter, abbreviated as epi) is grown instead of the conventional ion implantation process. By forming a p + epi (junction barrier Schottky structure) under the region, silicon carbide Schottky barrier diodes and their cost can be saved not only by blocking leakage current but also by eliminating ion implantation process and heat treatment process for wafer surface recovery. The purpose is to provide a manufacturing method.

In order to achieve the above object, the silicon carbide Schottky barrier diode according to the present invention comprises: an n− epilayer stacked in a planar shape on an n + substrate; P + epi protruding at intervals in the horizontal direction on the n- epi layer; A Schottky metal stacked on the p + epi and n- epi layers; a conductive region through which a current flows between p + epi when forward voltage is applied, and a depletion layer formed under the p + epi when reverse voltage is applied. It is characterized by blocking the leakage current.

The p + epi is formed in a straight line, a square shape and a hexagonal shape when viewed from the bottom of the shock key metal, so as to ensure the maximum conduction area.

In addition, the method of manufacturing a silicon carbide Schottky barrier diode according to the present invention comprises the steps of depositing an n + substrate, n-epi layer, p + epi layer in order; Etching the p + epi layer in a predetermined pattern to form p + epi at an interval in the horizontal direction from the n− epi layer; And depositing a schottky metal on the p + epi and n− epi layers.

The advantages of the silicon carbide Schottky barrier diode and its manufacturing method according to the present invention are as follows.

First, p + epi is formed between the Schottky metal and n- epi by etching the substrate on which the p + epi layer is grown, so that when a reverse voltage is applied, a depletion layer is formed under the p + epi to block leakage current, Dispersion can also be improved to improve yield characteristics.

Secondly, since the present invention does not need to use a conventional ion implanter to improve leakage current blocking and breakdown voltage characteristics, it is possible to reduce the cost of an expensive ion implanter and to recover a damaged wafer surface after ion implantation. Since no high temperature heat treatment equipment is required, the cost of SiC SBD can be lowered.

Third, by applying a closed cross-sectional structure of a straight, square, or hexagonal shape to the p + epi region, it is possible to ensure the maximum conduction region between the p + epi to smooth the flow of current when forward voltage is applied.

1 is a cross-sectional view showing the structure of a Schottky barrier diode according to an embodiment of the present invention.
2 is an operating state diagram of the Schottky diode in FIG.
3 is a plan view illustrating a p + epi region and an energization region in FIG. 1;
4 to 6 are cross-sectional views showing a method of manufacturing a schottky barrier diode according to an embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

1 is a cross-sectional view illustrating a structure of a schottky barrier diode according to an embodiment of the present invention, and FIG. 2 is a diagram illustrating an operating state of the schottky diode in FIG. 1.

In the present invention, a silicon carbide Schottky barrier diode (SiC SBD) is formed by applying an etching process instead of a conventional ion implantation process to form a p + formed junction barrier Schottky structure, thereby obtaining the same effect as conventional ion implantation. In addition, the present invention relates to a silicon carbide Schottky barrier diode and a method of manufacturing the same, which can improve existing problems.

The silicon carbide Schottky barrier diode device according to the present invention has a structure stacked from below with an ohmic metal, an n + substrate 10, an n− epi layer 11, a p + epi 12, and a Schottky metal 13. The upper surface of the Schottky metal 13 and the lower surface of the ohmic metal are covered with the pad metal 15.

The p + epi 12 is etched in a predetermined pattern to protrude upward from the bonding surface with the n− epi layer 11.

The Schottky metal 13 is deposited to have a predetermined thickness along the grooves between the p + epi 12 as well as the protruding p + epi 12 to have a concave-convex cross-sectional structure.

Although the leakage characteristics and the degree of improvement of the breakdown voltage are different according to the interval between the p + epis 12 and the number of p + epis 12 that are bonded to the lower portion of the Schottky metal 13, the intervals and the number of p + epis 12 are different. In the case of optimizing, the thickness reduction of the n- epi layer 11 can be reduced by the degree of improvement of characteristics (leakage current blocking and breakdown voltage increase) without damaging the wafer by ion implantation, thereby increasing the current density and cost by reducing the epi layer. It is possible to achieve a very large savings.

When the p + epi 12 is formed in the n- epi layer 11 by being implanted by a high voltage ion implantation, the thickness of the n− epi layer 11 is reduced by the area occupied by the p + epi, but as shown in the related art. In the present invention, the n- epitaxial layer 11 is formed to protrude in an etch outward, thereby reducing the thickness reduction of the n- epitaxial layer 11 as compared with the prior art.

Referring to FIG. 2, when the forward voltage is applied to the Schottky diode terminal, since there is no depletion layer 16, current may flow through the conduction region between the p + epis 12, and the reverse voltage is applied to the Schottky diode terminal. In this case, the depletion layer 16 may be formed to block the leakage current by the depletion layer 16.

At this time, the depletion layer 16 is formed at the junction between the p + epi 12 and the n− epi layer 11 and the periphery thereof, and is a space in which a plurality of carriers are missing and forms a potential barrier to block reverse leakage current. will be.

3 is a plan view showing a p + epi 12 etched to be etched under the Schottky metal 13 junction according to the present invention and an energization region therebetween.

Here, the present invention provides a predetermined width of the etched and remaining p + epi 12 region in order to minimize the disadvantage that the conduction region through which current can flow during forward application is reduced due to the pn junction formed at the lower end of the Schottky metal 13 junction. By forming a closed cross-sectional structure of a straight line (having a predetermined width), square, or hexagon shape having a shape, it is possible to ensure a maximum conduction region of the forward current.

At this time, in the case where the shape of the p + epi 12 is in the form of a hexagonal closed cross section, the remaining energization regions between the p + epi 12 are formed in a honeycomb form, thereby securing more energization regions than the straight form, and the hexagonal p + The spacing between epis 12 may be determined according to the doping concentration of p + epi 12.

As such, when optimizing the distance and the number of p + epis 12, the thickness reduction of the n- epi layer 11 can be reduced as the breakdown voltage is improved without damaging the wafer due to ion implantation, thereby improving the current density. Very large cost savings can be achieved by reducing the area and reducing the epilayer thickness.

Hereinafter, a method of manufacturing a schottky barrier diode according to the present invention will be described.

4 is a cross-sectional view showing a wafer prior to fabrication of the device, FIG. 5 is a cross-sectional view showing the etching of the p + epitaxial layer 12, and FIG. 6 is a Schottky metal 13 on the p + epitaxial patterned pattern. This and a cross-sectional view showing the ohmic metal 14 deposited on the lower part of the device, and FIG. 1 is a cross-sectional view showing the pad metal 15 deposited on the upper and lower parts of the device, respectively.

As shown in FIG. 4, in the wafer prior to fabrication of the device, n- and p + epilayers 12 are sequentially deposited on the n + substrate 10.

At this time, the doping concentration of n − is 10 15 to 10 16 / cm 3, and the doping concentration of p + epi 12 is preferably 10 17 / cm 3.

As shown in FIG. 5, the p + epi layer 12 is etched in a predetermined pattern so that the etched and remaining p + epi 12 protrudes upward from the p-n junction surface.

In this case, the mask for etching may use a PR (photoresist) or a metal, etc., to form a pattern using dry etching.

In addition, after etching, the sacrificial oxide layer may be formed to stabilize the surface, and the oxide layer may be etched or annealed in a gas atmosphere such as hydrogen.

As shown in FIG. 6, the Schottky metal 13 is deposited on the upper surface of the p + epi 12 and the ohmic metal 14 is deposited on the n + substrate 10.

The upper Schottky metal 13 may utilize a metal such as Ti, and the ohmic metal 14 may utilize a metal such as Ni, and may perform heat treatment to implement characteristics of each metal.

As shown in FIG. 1, pad metal 15 is deposited on top of Schottky metal 13 and on bottom of ohmic metal 14, respectively.

As the pad metal 15, a metal such as Au or Al may be used.

Therefore, according to the present invention, the p + epitaxial layer 12 is formed between the Schottky metal 13 and the n− epitaxially by etching the substrate on which the p + epitaxial layer 12 is grown, thereby depleting the layer 16 when the reverse voltage is applied. ) May be formed under the p + epi 12 to block leakage current and to disperse electric field concentration, thereby improving yield characteristics.

In addition, since the present invention does not need to use a conventional ion implanter to improve leakage current blocking and breakdown voltage, the cost of expensive ion implanters is reduced, and a separate surface for recovering the damaged wafer surface after ion implantation is required. No high temperature heat treatment equipment is required, which reduces the cost of SiC SBD.

In addition, by applying a closed cross-sectional structure of a straight, square, or hexagonal shape to the p + epi area, it is possible to secure the maximum conduction area between the p + epi 12 to smooth the flow of current when forward voltage is applied.

10: n + substrate 11: n- epi layer
12: p + epi (layer) 13: Schottky metal
14: ohmic metal 15: pad metal
16: depletion layer

Claims (3)

For silicon carbide schottky barrier diodes,
an n− epi layer 11 stacked in a planar shape on the n + substrate 10;
P + epi (12) protruding at intervals in the horizontal direction on the upper surface of the n- epi layer (11);
A Schottky metal 13 stacked on the p + epi 12 and n- epi layer;
And a conductive region through which a current flows between the p + epi 12 when a forward voltage is applied, and blocking a leakage current by the depletion layer 16 formed under the p + epi 12 when a reverse voltage is applied. Silicon carbide schottky barrier diodes.
The method according to claim 1,
The p + epi (12) is a silicon carbide Schottky barrier diode, characterized in that formed in a straight, square and hexagonal shape when viewed under the shock key metal to ensure the maximum conduction area.
In the method of manufacturing a silicon carbide Schottky barrier diode,
depositing an n + substrate 10, an n− epi layer 11, and a p + epi layer 12 in order;
Etching the p + epi layer 12 in a predetermined pattern to form a p + epi 12 at an interval n in the horizontal direction from the n− epi layer 11;
Depositing a Schottky metal (13) on the p + epi (12) and n− epi layers (11);
Method of manufacturing a silicon carbide Schottky barrier diode, comprising a.
KR1020110114968A 2011-11-07 2011-11-07 Silicon carbide schottky barrier diode and manufacturing method for the same KR20130049916A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101490937B1 (en) * 2013-09-13 2015-02-06 현대자동차 주식회사 Schottky barrier diode and method for manufacturing the same
US20150179826A1 (en) * 2013-12-23 2015-06-25 Samsung Electro-Mechanics Co., Ltd. Diode device and method of manufacturing the same
CN108538925A (en) * 2018-06-15 2018-09-14 深圳基本半导体有限公司 A kind of silicon carbide junction barrier schottky diodes
CN110571262A (en) * 2019-09-09 2019-12-13 电子科技大学 Silicon carbide junction barrier Schottky diode with groove structure
CN111261723A (en) * 2018-11-30 2020-06-09 全球能源互联网研究院有限公司 SiC JBS device
US10930797B2 (en) 2016-07-05 2021-02-23 Hyundai Motor Company, Ltd. Schottky barrier diode and method of manufacturing the same
KR102320367B1 (en) * 2020-05-29 2021-11-02 전북대학교산학협력단 Method for manufacturing schottky barrier diode with improved breakdown voltage through field plate layer deposition

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101490937B1 (en) * 2013-09-13 2015-02-06 현대자동차 주식회사 Schottky barrier diode and method for manufacturing the same
US20150179826A1 (en) * 2013-12-23 2015-06-25 Samsung Electro-Mechanics Co., Ltd. Diode device and method of manufacturing the same
US10930797B2 (en) 2016-07-05 2021-02-23 Hyundai Motor Company, Ltd. Schottky barrier diode and method of manufacturing the same
CN108538925A (en) * 2018-06-15 2018-09-14 深圳基本半导体有限公司 A kind of silicon carbide junction barrier schottky diodes
CN111261723A (en) * 2018-11-30 2020-06-09 全球能源互联网研究院有限公司 SiC JBS device
CN110571262A (en) * 2019-09-09 2019-12-13 电子科技大学 Silicon carbide junction barrier Schottky diode with groove structure
KR102320367B1 (en) * 2020-05-29 2021-11-02 전북대학교산학협력단 Method for manufacturing schottky barrier diode with improved breakdown voltage through field plate layer deposition

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