KR20130040071A - Semiconductor stack package apparatus - Google Patents

Abstract

PURPOSE: A semiconductor stack package apparatus is provided to easily radiate the heat generated from a semiconductor chip to the outside by forming a heat radiation member in the upper surface of a first semiconductor package. CONSTITUTION: A first semiconductor package(100) includes a first semiconductor chip(110), a first substrate(120), a first signal transmitting media(130), and a first encapsulating material(140). The first signal transmitting media electrically connects the first semiconductor chip to the first substrate. A second semiconductor package(200) includes a second semiconductor chip(210), a second substrate(220), a second signal transmitting media(230), and a second encapsulating material(240). The second encapsulating material surrounds and protects the second semiconductor chip and the second signal transmitting media. A first heat radiation member(300) radiates the heat generated in the first and the second semiconductor package to the outside.

Description

Semiconductor stack package apparatus

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor stack package device, and more particularly, to a semiconductor stack package device for easily dissipating heat generated from a package on package (POP) type semiconductor stack package device in which packages are stacked on a package to the outside air. It is about.

In general, a semiconductor package device may die bond at least one semiconductor chip to a surface of a member such as a lead frame or a printed circuit board, and electrically connect the terminals of the lead or the printed circuit board of the lead frame to the semiconductor chips. After wire bonding or soldering, the semiconductor chip is covered with an insulating encapsulant and sealed. In addition, as a technology for reducing the size of such a semiconductor package device, a package on package (POP) technology in which a package is stacked on a package, and a system on chip that makes a plurality of individual semiconductor chips into one chip On chip (SOC) technology, a system in package technology for integrating a plurality of semiconductor chips (for example, a memory chip and a control chip) that performs a plurality of functions into one package is known.

It is an object of the present invention to provide a semiconductor stack package apparatus in which a heat dissipation member is provided on an upper surface of a first semiconductor package so that heat generated from a semiconductor chip can be easily discharged to the outside, and electromagnetic waves can be blocked.

According to an aspect of the present invention, there is provided a semiconductor stack package apparatus including at least one first semiconductor chip; A first substrate supporting the first semiconductor chip and having a jointer disposed on a bottom surface thereof; A first signal transmission medium electrically connecting the first semiconductor chip and the first substrate; And a first encapsulation material surrounding and protecting the first semiconductor chip and the first signal transmission medium. At least one second semiconductor chip; A second substrate supporting the second semiconductor chip, a joint land connected to the jointer on an upper surface thereof, and a terminal on a lower surface thereof; A second signal transmission medium electrically connecting the second semiconductor chip and the second substrate; And a second encapsulation material surrounding and protecting the second semiconductor chip and the second signal transmission medium. And a first heat dissipation member installed on an upper surface of the first semiconductor package to release heat generated from the first semiconductor package and the second semiconductor package to the outside.

In addition, according to the spirit of the present invention, the first heat dissipation member may be a heat dissipation plate in contact with an upper surface of the first encapsulant.

In addition, according to the spirit of the present invention, the first heat dissipation member may be a heat dissipation plate covering an upper surface and a side surface of the first encapsulant, a side surface of the first substrate, and a side surface of the second substrate.

In addition, according to the spirit of the present invention, the first signal transmission medium may be a wire, the jointer may be a first solder ball, the terminal may be a second solder ball, and the second signal transmission medium may be a bump.

In addition, according to the spirit of the present invention, the first signal transmission medium is a wire, the jointer is a through electrode formed through the second encapsulant, the terminal is a solder ball, and the second signal transmission medium is It may be a bump.

In addition, according to the spirit of the present invention, the first signal transmission medium is a wire, the jointer is a through electrode formed through the second encapsulant, the terminal is a solder ball, and the second signal transmission medium is It may be a wire.

In addition, according to the spirit of the present invention, the first heat dissipation member is a heat dissipation plate, a part of which is in contact with the upper surface of the first encapsulation material, and a flange portion is provided at one end thereof, and the flange portion is greater than or equal to the width of the first substrate. It may be in contact with the upper surface of the edge of the second substrate having a width.

In addition, according to the spirit of the present invention, the first heat dissipation member is a heat dissipation plate, a part of which is in contact with the upper surface of the first encapsulation material, and a flange portion is provided at one end thereof, and the flange portion is greater than or equal to the width of the first substrate. It may be in contact with the second encapsulant having a width.

In addition, according to the spirit of the present invention, the first heat dissipation member is a heat dissipation plate, a part of which is in contact with the upper surface of the first encapsulation material, and a flange portion is provided at one end thereof, and the flange portion is greater than or equal to the width of the first substrate. It may be in contact with a through bar connected to the fixed land formed on the upper surface of the second substrate through the edge portion of the second encapsulant having a width.

In addition, according to the spirit of the present invention, the first heat dissipation member may be a heat dissipation plate in contact with an upper surface of the first encapsulant having a width greater than or equal to the width of the second substrate.

In addition, according to the spirit of the present invention, a heat transfer material (TIM) having an adhesive property may be installed between the first heat dissipation member and the first semiconductor package or the second semiconductor package.

In addition, according to the spirit of the present invention, the first heat dissipation member may have a through window formed on one side such that air between the first substrate and the second substrate may be connected to the outside air.

The semiconductor stack package apparatus may further include a second heat dissipation member installed on an upper surface of the second semiconductor package and thermally connected to the first heat dissipation member.

In addition, according to the spirit of the present invention, the first heat dissipation member may be provided with a fastening portion forcibly engaged with the first semiconductor package or the second semiconductor package.

On the other hand, the semiconductor stack package apparatus according to the idea of the present invention for solving the above problems, at least one first semiconductor chip; A first substrate supporting the first semiconductor chip and having a jointer disposed on a bottom surface thereof; A first signal transmission medium electrically connecting the first semiconductor chip and the first substrate; And a first encapsulation material surrounding and protecting the first semiconductor chip and the first signal transmission medium. At least one second semiconductor chip; A second substrate supporting the second semiconductor chip, a joint land connected to the jointer on an upper surface thereof, and a terminal on a lower surface thereof; A second signal transmission medium electrically connecting the second semiconductor chip and the second substrate; And a second encapsulation material surrounding and protecting the second semiconductor chip and the second signal transmission medium. A first heat dissipation member installed on an upper surface of the first semiconductor package to release heat generated from the first semiconductor package to the outside; A second heat dissipation member installed on an upper surface of the second semiconductor package so as to discharge heat generated from the second semiconductor package to the outside, and thermally connected to the first heat dissipation member; And a heat transfer material (TIM) disposed between the first heat dissipation member and the second heat dissipation member.

In the semiconductor stack package apparatus according to the spirit of the present invention, heat generated in each of the first semiconductor package and the second semiconductor package in a package on package (POP) type air is discharged through the first heat dissipation member or the second heat dissipation member. It can be easily discharged to prevent the operation error caused by overheating in advance, can block the external emission of electromagnetic waves, improve the reliability and durability of the product, and improve the productivity and assembly of the product. To have.

1 to 30 are partial cross-sectional views illustrating semiconductor stack package devices in accordance with some embodiments of the inventive concepts.
31 is a partial cross-sectional view illustrating a semiconductor stack package apparatus mounted on a board substrate according to some embodiments of the inventive concepts.
32 is a partial cross-sectional view illustrating a semiconductor stack package apparatus mounted on a board substrate in accordance with some embodiments of the inventive concept.
33 is a block diagram schematically illustrating a memory card including a semiconductor stack package apparatus according to some embodiments of the inventive concepts.
34 is a block diagram schematically illustrating an electronic system including a semiconductor stack package apparatus according to some embodiments of the inventive concepts.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are described in order to more fully explain the present invention to those skilled in the art, and the following embodiments may be modified into various other forms, It is not limited to the embodiment. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In addition, the thickness or size of each layer in the drawings is exaggerated for convenience and clarity of description.

It will be understood that throughout the specification, when referring to an element such as a film, an area or a substrate being "on", "connected", "laminated" or "coupled to" another element, It will be appreciated that elements may be directly "on", "connected", "laminated" or "coupled" to another element, or there may be other elements intervening therebetween. On the other hand, when one component is said to be located on another component "directly on", "directly connected", or "directly coupled", it is interpreted that there are no other components intervening therebetween. do. Like numbers refer to like elements. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

Although the terms first, second, etc. are used herein to describe various members, parts, regions, layers, and / or parts, these members, parts, regions, layers, and / or parts are defined by these terms. It is obvious that not. These terms are only used to distinguish one member, component, region, layer or section from another region, layer or section. Thus, the first member, part, region, layer or portion, which will be discussed below, may refer to the second member, component, region, layer or portion without departing from the teachings of the present invention.

Also, relative terms such as "top" or "above" and "bottom" or "bottom" may be used herein to describe the relationship of certain elements to other elements as illustrated in the figures. It may be understood that relative terms are intended to include other directions of the device in addition to the direction depicted in the figures. For example, if the device is turned over in the figures, elements depicted as present on the face of the top of the other elements are oriented on the face of the bottom of the other elements. Thus, the exemplary term "top" may include both "bottom" and "top" directions depending on the particular direction of the figure. If the device faces in the other direction (rotated 90 degrees relative to the other direction), the relative descriptions used herein can be interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. Also, as used herein, "comprise" and / or "comprising" specifies the presence of the mentioned shapes, numbers, steps, actions, members, elements and / or groups of these. It is not intended to exclude the presence or the addition of one or more other shapes, numbers, acts, members, elements and / or groups.

Hereinafter, embodiments of the present invention will be described with reference to the drawings schematically showing ideal embodiments of the present invention. In the figures, for example, variations in the shape shown may be expected, depending on manufacturing techniques and / or tolerances. Accordingly, the embodiments of the present invention should not be construed as limited to the particular shapes of the regions shown herein, but should include, for example, changes in shape resulting from manufacturing.

1 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

First, as shown in FIG. 1, a semiconductor stack package apparatus according to an exemplary embodiment of the present invention generally includes a first semiconductor package 100, a second semiconductor package 200, and a first heat radiating member 300. It may include.

Here, the semiconductor stack package apparatus exemplified below may be a package on package (POP) type semiconductor stack package apparatus 1000 in which the first semiconductor package 100 is stacked on the second semiconductor package 200. have.

The first semiconductor package 100 may include a first semiconductor chip 110, a first substrate 120, a first signal transmission medium 130, and a first encapsulant 140. . Here, the first semiconductor chip 110 may have a plurality of chip pads on an active surface, and may be formed of at least one semiconductor chip 110. In addition, in the case of a system in package type in which semiconductor chips (for example, a memory chip and a control chip) in charge of a plurality of functions are integrated into one package device, the first semiconductor chip 110 may be At least one or more memory chips may be applied. For example, in order to selectively control each of these memory chips, the second semiconductor package 200 may include at least one control chip having a control channel for controlling the memory chips. However, the number of installation of the first semiconductor chip 110 is not limited to two, and more or less can be provided.

In addition, the first substrate 120 supports the first semiconductor chip 110, and a jointer J may be installed on a lower surface thereof. The first substrate 120 may be provided with a wiring layer on the upper and lower portions of the insulating base substrate by adhesion, plating or thermocompression. However, the first substrate 120 is not limited to the material or method.

In addition, as the first signal transmission medium 130 electrically connects the first semiconductor chip 110 and the first substrate 120, the wire of FIG. 1 may be applied, and various bumps and solder balls may be applied. Or a penetrating electrode may be applied.

In addition, the first encapsulant 140 surrounds and protects the first semiconductor chip 110 and the first signal transmission medium 130, and includes various types of epoxy resins, curing agents, organic / inorganic fillers, and the like. It is made of a synthetic resin material that can be injection molded in a mold (mold: mold). The encapsulant 140 may be formed of a polymer such as resin, for example, an epoxy molding compound (EMC). However, the encapsulant 140 is not limited to the material or the method.

The second semiconductor package 200 may include a second semiconductor chip 210, a second substrate 220, a second signal transmission medium 230, and a second encapsulant 240. . Here, the second semiconductor chip 210, the second signal transmission medium 230 is formed on the active surface, a plurality of semiconductor chips (for example, a memory chip and a control chip) that is responsible for a plurality of functions In the case of a system in package type integrated into a package, the second semiconductor chip 210 may include at least one or more controls to selectively control at least one or more memory chips stacked on the first semiconductor package 100. It may be a control chip having a channel. In addition, as illustrated in FIG. 1, the second semiconductor chip 210 may be of a flip-chip type whose active surface faces downward. However, the second semiconductor chip 210 is not limited to the flip chip.

In addition, the second substrate 220 supports the second semiconductor chip 210, and a joiner land JL connected to the joiner J is provided on an upper surface thereof, and a terminal T is provided on a lower surface of the second substrate 220. ) Can be installed. The second substrate 220 may be provided with a wiring layer on the upper and lower portions of the insulating base substrate by adhesion, plating, or thermocompression. However, the second substrate 220 is not limited to the material or method.

In addition, the second signal transmission medium 230 electrically connects the second semiconductor chip 210 and the second substrate 220, and the bump of FIG. 1 may be applied. Wire, solder balls or through electrodes can be applied.

In addition, the second encapsulant 240 surrounds and protects the second semiconductor chip 210 and the second signal transmission medium 230, and an active surface and the second surface of the second semiconductor chip 210. An underfill member may be applied to fill a portion between the substrate 220 or a portion between the first semiconductor package 100 and the second semiconductor package 200. The second encapsulant 240 may be formed of an underfill resin such as an epoxy resin, and may include a silica filler, a flux, or the like. In addition, the second encapsulant 240 may be formed of a different material from the first encapsulant 140, but may also be formed of the same material. In addition, depending on the process, the second encapsulant 240 may be omitted, or may be replaced with other adhesive tapes or sealing tapes.

Meanwhile, the first substrate 120 described above may include a body layer 121, an upper passivation layer 122, and a lower passivation layer 123, and the second substrate 220 may also include a body layer. 221, an upper passivation layer 222, and a lower passivation layer 223. The body layers 121 and 221 may be formed with a plurality of wiring patterns, and the upper protective layer 122, 222 and the lower protective layer 123, 223 may be formed of the body layer 121 ( Each of the 221s may be protected, for example, a solder resist.

In addition, the first heat dissipation member 300 according to some exemplary embodiments of the present invention may discharge the heat generated from the first semiconductor package 100 and the second semiconductor package 200 to the outside air. As installed on the upper surface 140a of the semiconductor package 100, the first heat dissipation member 300 may be a heat dissipation plate contacting the upper surface 140a of the first encapsulant 140. Here, the first heat dissipation member 300 is thermally fused to the top surface 140a of the first semiconductor package 100, coated with a heat dissipating material, adhesive using an intermediate adhesive, pressing, taping adhesive using an adhesive tape, plating or sputtering It can be installed using a variety of methods such as metal processing such as ion implantation or welding. In addition, the material of the first heat dissipation member 300 is copper (Cu), aluminum (Al), iron (Fe), nickel (Ni), cobalt (Co), tungsten (W), chromium having excellent heat transfer and electromagnetic shielding properties. (Cr), magnesium (Mg), silicon (Si), gold (Au), silver (Ag), platinum (Pt), zinc (Zn), tin (Sn), stainless steel and alloys thereof Can be applied. However, the first heat dissipation member 300 is not limited to the material or method.

In addition, the first heat dissipation member 300 may have a width equal to the width of the first semiconductor package 100 so as to cover all of the top surface 140a of the first encapsulant 140. . In addition, the upper surface 140a of the first encapsulant 140 may be partially covered or overlaid by manufacturing the first heat dissipation member 300 by using more than or less than 10 micrometers in consideration of processing error. Can be.

Therefore, heat generated in the first semiconductor chip 110 and the second semiconductor chip 210 is collected by the first heat dissipation member 300 having excellent thermal conductivity, and the collected heat is thermally contacted with the outside air. The surface of the first heat dissipation member 300 may be discharged to the outside air.

Therefore, the first heat dissipation member 300 is installed on the upper surface of the first semiconductor package 100 so that heat can be generated smoothly, and at the same time, the first semiconductor package 100 and the second semiconductor package 200 The first heat dissipation member 300 absorbs the electromagnetic waves generated from the internal wirings to prevent the external radiation of the electromagnetic waves.

1, the first signal transmission medium 130 is a wire, the joiner J is a first solder ball SB1, and the terminal T is a second solder ball SB2. The second signal transmission medium 230 may be a bump. Here, the wire is a kind of signal transmission medium that electrically connects the chip pad and the substrate pad, and includes gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), and palladium ( A semiconductor bonding wire formed of Pd), nickel (Ni), cobalt (Co), chromium (Cr), titanium (Ti), or the like may be applied, and may be formed by a wire bonding apparatus. However, the wire is not limited to the material or method. In addition to the wire, various types of signal transmission media such as bumps, solder balls, and through electrodes may be applied. In addition, the bumps may be formed of gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), solder, and the like, and various deposition processes, sputtering processes, and pulses. It may be formed through processes including a plating process such as plating or direct current plating, a soldering process, an adhesion process, and the like. However, the bumps are not limited to the above materials and methods. In addition to the bumps, various types of signal transmission media such as wires, solder balls, and through electrodes may be applied.

2 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 2, the first heat dissipation member 301 may include an upper surface 140a and a side surface 140b of the first encapsulant 140, a side surface 120b of the first substrate 120, and the The heat sink may cover the side surface 220b of the second substrate 220. Here, the first signal transmission medium 130 is a wire, the jointer (J) is a first solder ball (SB1), the terminal (T) is a second solder ball (SB2), the second signal transmission medium 230 may be a bump.

Accordingly, the first heat dissipation member 301 may cover both the upper side and the side sides of the first semiconductor package 100 and the second semiconductor package 200, so that the first semiconductor package 100 and the second semiconductor member 100 are covered. The contact area with the semiconductor package 200 can be enlarged.

Therefore, the first heat dissipation member 301 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, the first semiconductor. The electromagnetic wave generated from the internal wirings of the package 100 and the second semiconductor package 200 may be absorbed in a larger area to more thoroughly prevent external emission of the electromagnetic wave.

In addition, as shown in Figure 2, the wire is a kind of signal transmission medium for electrically connecting the chip pad and the substrate pad, gold (Au), silver (Ag), platinum (Pt), aluminum (Al), A semiconductor bonding wire formed of copper (Cu), palladium (Pd), nickel (Ni), cobalt (Co), chromium (Cr), titanium (Ti), or the like may be applied, and may be formed by a wire bonding apparatus. Can be. However, the wire is not limited to the material or method. In addition to the wire, various types of signal transmission media such as bumps, solder balls, and through electrodes may be applied. In addition, the bumps may be formed of gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), solder, and the like, and various deposition processes, sputtering processes, and pulses. It may be formed through processes including a plating process such as plating or direct current plating, a soldering process, an adhesion process, and the like. However, the bumps are not limited to the above materials and methods. In addition to the bumps, various types of signal transmission media such as wires, solder balls, and through electrodes may be applied.

3 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 3, the first heat dissipation member 300 of the present invention may discharge the heat generated from the first semiconductor package 100 and the second semiconductor package 200 to the outside air. The first heat dissipation member 300 may be a heat dissipation plate contacting the upper surface 140a of the first encapsulant 140, which is installed on the first surface 140a of the semiconductor package 100. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signaling medium 231 may be a bump. In addition, the through electrode TE may be formed of gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), solder, or the like, and the second encapsulation. Through-holes are formed in the material 241 by etching, drilling, laser drilling, or the like, and metal processes including various deposition processes, sputtering processes, plating processes such as pulse plating and direct current plating, soldering processes, bonding processes, and the like. It may be formed by embedding a metal material in the through hole, inserting a metal pin or metal bar, or welding. However, the through electrode TE is not limited to the material or the method. In addition to the through electrode, various types of signal transmission media such as wires, bumps, and solder balls may be applied.

Therefore, heat generated in the first semiconductor chip 110 and the second semiconductor chip 210 is collected by the first heat dissipation member 300 having excellent thermal conductivity, and the collected heat is thermally contacted with the outside air. The surface of the first heat dissipation member 300 may be discharged to the outside air.

Therefore, the first heat dissipation member 300 is installed on the upper surface of the first semiconductor package 100 so that heat can be generated smoothly, and at the same time, the first semiconductor package 100 and the second semiconductor package 200 The first heat dissipation member 300 absorbs the electromagnetic waves generated from the internal wirings to prevent the external radiation of the electromagnetic waves.

4 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 4, the first heat dissipation member 301 includes an upper surface 140a and a side surface 140b of the first encapsulant 140, a side surface 120b of the first substrate 120, and the The heat sink may cover the side surface 220b of the second substrate 220. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signaling medium 231 may be a bump. In addition, the through electrode TE may be formed of gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), solder, or the like, and the second encapsulation. Through-holes are formed in the material 241 by etching, drilling, laser drilling, or the like, and metal processes including various deposition processes, sputtering processes, plating processes such as pulse plating and direct current plating, soldering processes, bonding processes, and the like. It may be formed by embedding a metal material in the through hole, inserting a metal pin or metal bar, or welding. However, the through electrode TE is not limited to the material or the method. In addition to the through electrode, various types of signal transmission media such as wires, bumps, and solder balls may be applied.

Accordingly, the first heat dissipation member 301 may cover both the upper side and the side sides of the first semiconductor package 100 and the second semiconductor package 200, so that the first semiconductor package 100 and the second semiconductor member 100 are covered. The contact area with the semiconductor package 200 can be enlarged.

Therefore, the first heat dissipation member 301 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, the first semiconductor. The electromagnetic wave generated from the internal wirings of the package 100 and the second semiconductor package 200 may be absorbed in a larger area to more thoroughly prevent external emission of the electromagnetic wave.

5 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 5, the first heat dissipation member 300 may be a heat dissipation plate contacting the upper surface 140a of the first encapsulant 140. In addition, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 242, and the terminal T is a solder ball ( SB), and the second signal transmission medium 232 may be a wire connected to the second semiconductor chip 212. Here, the first heat dissipation member 300, the first signal transmission medium 130, the through electrode TE, and the solder ball SB may have the same structure as described with reference to FIG. 4. Therefore, detailed description of these components is omitted.

Therefore, heat generated in the first semiconductor chip 110 and the second semiconductor chip 210 is collected by the first heat dissipation member 300 having excellent thermal conductivity, and the collected heat is thermally contacted with the outside air. The surface of the first heat dissipation member 300 may be discharged to the outside air.

Therefore, the first heat dissipation member 300 is installed on the upper surface of the first semiconductor package 100 so that heat can be generated smoothly, and at the same time, the first semiconductor package 100 and the second semiconductor package 200 The first heat dissipation member 300 absorbs the electromagnetic waves generated from the internal wirings to prevent the external radiation of the electromagnetic waves.

6 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concept.

As illustrated in FIG. 6, the first heat dissipation member 301 may include an upper surface 140a and a side surface 140b of the first encapsulant 140, a side surface 120b of the first substrate 120, and the The heat sink may cover the side surface 220b of the second substrate 220. In addition, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 242, and the terminal T is a solder ball ( SB), and the second signal transmission medium 232 may be a wire. Here, the first heat dissipation member 301, the first signal transmission medium 130, the through electrode TE, and the solder ball SB may have the same structure as described with reference to FIG. 4. Therefore, detailed description of these components is omitted.

Accordingly, the first heat dissipation member 301 may cover both the upper side and the side sides of the first semiconductor package 100 and the second semiconductor package 200, so that the first semiconductor package 100 and the second semiconductor member 100 are covered. The contact area with the semiconductor package 200 can be enlarged.

Therefore, the first heat dissipation member 301 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, the first semiconductor. The electromagnetic wave generated from the internal wirings of the package 100 and the second semiconductor package 200 may be absorbed in a larger area to more thoroughly prevent external emission of the electromagnetic wave.

7 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 7, the first heat dissipation member 400 is partially in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F may contact the upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120. The first heat dissipation member 400 is heat-sealed and heat-radiating material on the upper surface 140a of the first semiconductor package 100 and the upper surface of the edge of the second substrate 220 corresponding to the flange portion F. It can be installed using a variety of methods such as coating, bonding with an intermediate adhesive, pressing, taping bonding with an adhesive tape, metal processing such as plating or sputtering or ion implantation or welding. Here, the first signal transmission medium 130 is a wire, the jointer (J) is a first solder ball (SB1), the terminal (T) is a second solder ball (SB2), the second signal transmission medium 230 may be a bump. The first signal transmission medium 130, the joiner J, the terminal T, and the second signal transmission medium 230 may have the same structure as described above with reference to FIG. 1. Therefore, detailed description of these specific components will be omitted.

Therefore, the first heat dissipation member 400 may cover the upper side and the side of the first semiconductor package 100 and the upper side of the second semiconductor package 200, and the width of the first semiconductor package 100 ( Even when W1 is smaller than the width W2 of the second semiconductor package 200, the contact area between the first semiconductor package 100 and the second semiconductor package 200 may be increased.

Therefore, the first heat dissipation member 400 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, various types of widths. The semiconductor package 100 may be fixed to the first semiconductor package 100 and the second semiconductor package 200. In addition, by absorbing the electromagnetic wave generated in the internal wiring of the first semiconductor package 100 and the second semiconductor package 200 to a larger area, it is possible to more thoroughly prevent the external emission of the electromagnetic wave.

8 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 8, the first heat dissipation member 400 is partially in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F may contact the upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signaling medium 231 may be a bump. Here, the first signal transmission medium 130, the through electrode TE, and the solder ball SB may have the same structure as described above with reference to FIG. 4. Therefore, detailed description of these components is omitted.

Therefore, the first heat dissipation member 400 may cover the upper side and the side of the first semiconductor package 100 and the upper side of the second semiconductor package 200, and the width of the first semiconductor package 100 ( Even when W1 is smaller than the width W2 of the second semiconductor package 200, the contact area between the first semiconductor package 100 and the second semiconductor package 200 may be increased.

Therefore, the first heat dissipation member 400 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, various types of widths. The semiconductor package 100 may be fixed to the first semiconductor package 100 and the second semiconductor package 200. In addition, by absorbing the electromagnetic wave generated in the internal wiring of the first semiconductor package 100 and the second semiconductor package 200 to a larger area, it is possible to more thoroughly prevent the external emission of the electromagnetic wave.

9 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

9, a portion of the first heat dissipation member 400 is in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange part F may be in direct contact with the upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signal transmission medium 232 may be a wire connected to the second semiconductor chip 212. The first signal transmission medium 130, the through electrode TE, the solder ball SB, and the second signal transmission medium 232 may have the same structure as described above with reference to FIG. 4. Therefore, detailed description of these components is omitted.

Therefore, the first heat dissipation member 400 may cover the upper side and the side of the first semiconductor package 100 and the upper side of the second semiconductor package 200, and the width of the first semiconductor package 100 ( Even when W1 is smaller than the width W2 of the second semiconductor package 200, the contact area between the first semiconductor package 100 and the second semiconductor package 200 may be increased.

Therefore, the first heat dissipation member 400 may further improve the heat generating performance by widening the contact area between the first semiconductor package 100 and the second semiconductor package 200, and at the same time, various types of widths. The semiconductor package 100 may be fixed to the first semiconductor package 100 and the second semiconductor package 200. In addition, by absorbing the electromagnetic wave generated in the internal wiring of the first semiconductor package 100 and the second semiconductor package 200 to a larger area, it is possible to more thoroughly prevent the external emission of the electromagnetic wave.

10 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 10, a portion of the first heat dissipation member 401 is in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F may be in direct contact with the second encapsulant 241 having a width W2 greater than or equal to the width W1 of the first substrate 120. The first heat dissipation member 401 may be thermally fused to the top surface 140a of the first semiconductor package 100 and the top surface of the second encapsulant 241, coated with a heat dissipating material, and bonded or compressed using an intermediate adhesive. It can be installed using a variety of methods such as taping adhesion using an adhesive tape, metal processing such as plating or sputtering or ion implantation or welding. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signaling medium 231 may be a bump.

11 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 11, a portion of the first heat dissipation member 402 is in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F passes through an edge portion of the second encapsulant 241 having a width W2 greater than or equal to the width W1 of the first substrate 120. It may be in contact with the through bar TR connected to the fixed land (FL) formed on the upper surface. Here, the through bar TR may be formed of gold (Au), silver (Ag), platinum (Pt), aluminum (Al), copper (Cu), solder (Solder), and the like, and the second encapsulation. Through-holes are formed in the material 241 by etching, drilling, laser drilling, or the like, and metal processes including various deposition processes, sputtering processes, plating processes such as pulse plating and direct current plating, soldering processes, bonding processes, and the like. It may be formed by embedding a metal material in the through hole, inserting a metal pin or metal bar, or welding. However, the through rod TR is not limited to the material or the method. In addition, the through bar TR may be manufactured by the same method as the through electrode TE described above with reference to FIG. 3, but the through bar TR transmits a signal unlike the through electrode TE. The through rod TR serves to fix the first heat dissipation member 402 on the second semiconductor package 200, and may be insulated from the surroundings. Separate wiring (eg, ground) to transfer heat from the second substrate 220 to the first heat dissipation member 402 or to easily transfer heat and electromagnetic waves absorbed through the first heat dissipation member 402 to the outside. Ground wire). That is, the through bar TR may be manufactured by the same method as the method of manufacturing the through electrode TE. However, the through bar TR has an electrical purpose different from that of the through electrode TE. Rather than transmitting a signal, the first heat dissipation member 402 is fixed to the second substrate 220, and the heat of the second substrate 220 is transferred to the first heat dissipation member 402 or other external parts. It can play a role of transferring to the wiring. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 241, and the terminal T is a solder ball ( SB), and the second signaling medium 231 may be a bump.

12 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 12, a portion of the first heat dissipation member 403 is in contact with the upper surface 140a of the first encapsulation member 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F passes through an edge portion of the second encapsulant 242 having a width W2 greater than or equal to the width W1 of the first substrate 120. It may be in contact with the through bar TR connected to the fixed land (FL) formed on the upper surface. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 242, and the terminal T is a solder ball ( SB), and the second signal transmission medium 232 may be a wire. The through bar TR may be manufactured by the same method as the method of manufacturing the through electrode TE. However, the through bar TR has an electrical purpose different from that of the through electrode TE. Instead of transmitting a signal, the first heat dissipation member 403 is fixed to the second substrate 220, and the heat of the second substrate 220 is transferred to the first heat dissipation member 403 or the outside. It can play a role of transferring to the wiring.

13 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 13, a portion of the first heat dissipation member 404 is in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange part F may be in contact with the second encapsulant 242 having a width W2 greater than or equal to the width W1 of the first substrate 120. Here, the first signal transmission medium 130 is a wire, the joiner J is a through electrode TE formed through the second encapsulant 242, and the terminal T is a solder ball ( SB), and the second signal transmission medium 232 may be a wire. The first heat dissipation member 404 is heat-sealed and heat dissipated on an upper surface 140a of the first semiconductor package 100 and an upper surface of the edge of the second encapsulant 242 corresponding to the flange portion F. FIG. It can be installed using a variety of methods, such as material coating, bonding with an intermediate adhesive, pressing, taping bonding with an adhesive tape, metal processing such as plating or sputtering or ion implantation or welding.

14 through 16 are partial cross-sectional views illustrating semiconductor stack package devices in accordance with some example embodiments of the inventive concepts.

14 to 16, the first heat dissipation member 500 has an upper surface of the first encapsulant 140 having a width W3 greater than or equal to the width W4 of the second substrate 220. It may be a heat sink in contact with (140a). The first heat dissipation member 500 may be thermally fused to an upper surface 140a of the first semiconductor package 100, coated with a heat dissipating material, adhesively bonded using an intermediate adhesive, pressed, taped adhesively using an adhesive tape, plating or sputtering, and the like. It can be installed using a variety of methods such as metal processing such as ion implantation or welding.

Here, as shown in FIG. 14, the first signal transmission medium 130 is a wire, the jointer J is a first solder ball SB1, and the terminal T is a second solder ball SB2. The second signal transmission medium 230 may be a bump. In addition, as shown in FIG. 15, the first signal transmission medium 130 is a wire, and the joiner J is a through electrode TE formed through the second encapsulant 241. The terminal T may be a solder ball SB, and the second signal transmission medium 231 may be a bump. In addition, as shown in FIG. 16, the first signal transmission medium 130 is a wire, and the joiner J is a through electrode TE formed through the second encapsulant 242. The terminal T may be a solder ball SB, and the second signal transmission medium 232 may be a wire. The first signal transmission medium 130, the jointer J, the terminal T, and the second signal transmission medium 231 may have the same structure as described with reference to FIGS. 1 to 6. . Therefore, detailed description of these components is omitted.

17 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 17, the first heat dissipation member 300 according to some embodiments of the present invention emits heat generated from the first semiconductor package 100 and the second semiconductor package 200 to the outside air. Heat transfer material (TIM) may be installed on the upper surface (140a) of the first semiconductor package 100 to have an adhesive property between the first heat dissipation member 300 and the first semiconductor package 100 Thermal Interface Material (TIM) can be installed. Here, the heat transfer material (TIM) is adhesively adhered to the gap formed on the surface of the material because the surface of the material is adhesive, thereby increasing the contact area between the boundary of the material and at the same time high heat transfer efficiency It is a substance that enables heat transfer. The heat transfer material (TIM) may be prepared as a material having a suitable viscosity by dispersing the thermally conductive particles in a monomer or a low molecular weight polymer and then partially polymerizing the monomer or a low molecular weight polymer, It may be used in the form of gel or adhesive tape. However, the heat transfer material (TIM) is not limited to the material or method.

Therefore, heat generated in the first semiconductor package 100 is transferred to the first heat dissipation member 300 having excellent thermal conductivity through the heat transfer material TIM, and is collected by the first heat dissipation member 300. Heat may be emitted to the outside air from the surface of the first heat dissipation member 300 that is in thermal contact with the outside air.

Therefore, the thermal contact between the first semiconductor package 100 and the first heat dissipation member 300 may be improved by the heat transfer material TIM, and the assemblability of the first heat dissipation member 300 may be improved. At the same time, the first heat dissipation member 300 may absorb the electromagnetic waves generated from the internal wirings of the first semiconductor package 100 and the second semiconductor package 200 to prevent external emission of the electromagnetic waves.

18 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 18, the first heat dissipation member 301 may include an upper surface 140a and a side surface 140b of the first encapsulant 140, a side surface 120b of the first substrate 120, and the It may be a heat sink to cover the side surface (220b) of the second substrate 220, the heat transfer having adhesiveness between the first heat dissipation member 301, the first semiconductor package 100 and the second semiconductor package 200 Material (TIM) may be installed. Therefore, heat generated in the first semiconductor package 100 is transferred to the first heat dissipation member 301 having excellent thermal conductivity through the heat transfer material TIM, and is collected by the first heat dissipation member 301. Heat may be emitted to the outside air from the surface of the first heat dissipation member 301 which is in thermal contact with the outside air.

Therefore, the thermal contact between the first semiconductor package 100 and the first heat dissipation member 301 may be improved by the heat transfer material TIM, and the assemblability of the first heat dissipation member 301 may be improved. At the same time, the first heat dissipation member 301 absorbs the electromagnetic waves generated from the internal wirings of the first semiconductor package 100 and the second semiconductor package 200 to prevent the external emission of the electromagnetic waves.

19 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 19, the first heat dissipation member 400 is partially in contact with the upper surface 140a of the first encapsulant 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F may be in contact with an upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120. An adhesive heat transfer material TIM may be installed between the 400 and the first semiconductor package 100 and the second semiconductor package 200. Therefore, heat generated in the first semiconductor package 100 is transferred to the first heat dissipation member 400 having excellent thermal conductivity through the heat transfer material TIM, and is collected by the first heat dissipation member 400. Heat may be emitted to the outside air from the surface of the first heat dissipation member 400 that is in thermal contact with the outside air.

Therefore, thermal contact between the first semiconductor package 100 and the first heat dissipation member 400 may be improved by the heat transfer material TIM, and assembling property of the first heat dissipation member 400 may be improved. At the same time, the first heat dissipation member 400 may absorb electromagnetic waves generated from internal wirings of the first semiconductor package 100 and the second semiconductor package 200 to prevent external emission of the electromagnetic waves.

20 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 20, the first heat dissipation member 301 has a through-window W formed at one side thereof so that air between the first substrate 120 and the second substrate 220 can be connected to the outside air. Can be. Therefore, heat generated in the first semiconductor package 100 is transferred to the first heat dissipation member 301 having excellent thermal conductivity through the heat transfer material TIM, and is collected by the first heat dissipation member 301. Heat may be emitted to the outside air from the surface of the first heat dissipation member 301 which is in thermal contact with the outside air. In addition, external air may flow in and out of the space between the first substrate 120 and the second substrate 220 through the through-window W, so that the second semiconductor chip 210 (for example, It is possible to cool the high temperature heat generated by the control chip which is likely to generate heat more quickly.

Therefore, thermal contact between the first semiconductor package 100 and the first heat dissipation member 301 is improved by the heat transfer material TIM, and at the same time, inflow and outflow of internal air is prevented by using the through-window W. By smoothly cooling, the first semiconductor package 100 and the second semiconductor package 200 may be cooled in multiple.

21 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 21, a portion of the first heat dissipation member 400 is in contact with the upper surface 140a of the first encapsulation member 140, and a heat dissipation plate having a flange portion F installed at one end thereof. The flange portion F may be bonded to the upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120 by the heat transfer material TIM. The first heat dissipation member 400 may have a through window W formed at one side thereof so that air between the first substrate 120 and the second substrate 220 may be connected to the outside air.

Therefore, heat generated in the first semiconductor package 100 is transferred to the first heat dissipation member 400 having excellent thermal conductivity through the heat transfer material TIM, and is collected by the first heat dissipation member 400. Heat may be emitted to the outside air from the surface of the first heat dissipation member 400 that is in thermal contact with the outside air. In addition, external air may flow in and out of the space between the first substrate 120 and the second substrate 220 through the through-window W, so that the second semiconductor chip 210 (for example, It is possible to cool the high temperature heat generated by the control chip which is likely to generate heat more quickly.

Therefore, thermal contact between the first semiconductor package 100 and the first heat dissipation member 400 may be improved by the heat transfer material TIM, and the inflow and outflow of internal air may be prevented by using the through window W. By smoothly cooling, the first semiconductor package 100 and the second semiconductor package 200 may be cooled in multiple.

22 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As illustrated in FIG. 22, a semiconductor stack package apparatus according to some embodiments of the present inventive concept may include a first semiconductor package 100, a second semiconductor package 200, a first heat dissipation member 300, and a first semiconductor package. It may include a heat dissipation member 600. Here, the second heat dissipation member 600 is installed on the upper surface of the second semiconductor package 200 and may be thermally connected to the first heat dissipation member 301. The second heat dissipation member 600 may be thermally fused to an upper surface of the second semiconductor package 200, coated with a heat dissipating material, adhered using an intermediate adhesive, pressed, taped adhered using an adhesive tape, plating, sputtering or ion. It can be installed using various methods such as metal processing such as injection or welding. In addition, the material of the second heat dissipation member 600 is copper (Cu), aluminum (Al), iron (Fe), nickel (Ni), cobalt (Co), tungsten (W), chromium having excellent heat transfer and electromagnetic shielding properties. (Cr), magnesium (Mg), silicon (Si), gold (Au), silver (Ag), platinum (Pt), zinc (Zn), tin (Sn), stainless steel and alloys thereof Can be applied. However, the second heat dissipation member 600 is not limited to the material or the method.

Therefore, the heat generated from the first semiconductor package 100 is transferred to the first heat dissipation member 301 having excellent thermal conductivity, and the heat generated from the second semiconductor package 200 has the excellent thermal conductivity. 2 may be transmitted to the heat dissipation member 600 and discharged to the outside air from the surface of the first heat dissipation member 301. Therefore, the second heat dissipation member 600 installed between the first semiconductor chip 110 and the second semiconductor chip 210 can be easily discharged to the outside heat generated from the second semiconductor package 200. Can block electromagnetic waves that may affect each other in the middle to prevent electromagnetic interference between the first semiconductor package 100 and the second semiconductor package 200.

23 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 23, a semiconductor stack package apparatus according to some embodiments of the present inventive concept may largely include a first semiconductor package 100, a second semiconductor package 200, a first heat dissipation member 400, and a first semiconductor package. 2 may include a heat dissipation member 601. Here, the second heat dissipation member 601 may be installed on the upper surface of the second semiconductor package 200 and may be thermally connected to each other through the first heat dissipation member 400 and the heat transfer material TIM. .

In addition, the first heat dissipation member 400 is a heat dissipation plate, a part of which is in contact with the upper surface 140a of the first encapsulation member 140, and a flange portion F is provided at one end thereof. F) may contact the upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120. Therefore, the heat generated from the first semiconductor package 100 is transferred to the first heat dissipation member 301 having excellent thermal conductivity, and the heat generated from the second semiconductor package 200 has the excellent thermal conductivity. 2 may be transmitted to the heat dissipation member 600 and discharged to the outside air from the surface of the first heat dissipation member 301.

24 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As illustrated in FIG. 24, a semiconductor stack package apparatus according to some embodiments of the present inventive concept may largely include a first semiconductor package 100, a second semiconductor package 200, a first heat dissipation member 500, and a first semiconductor package. 2 may include a heat dissipation member 602. Here, the second heat dissipation member 602 may be installed on an upper surface of the second semiconductor package 200 and may be thermally connected to the first heat dissipation member 500. In addition, the first heat dissipation member 500 may be a heat dissipation plate which is in contact with the upper surface 140a of the first encapsulant 140 having a width W3 greater than or equal to the width W4 of the second substrate 220. have. In addition, the second heat dissipation member 602 may be thermally and physically contacted by the first heat dissipation member 500 and the heat transfer material TIM.

Therefore, the heat generated from the first semiconductor package 100 is transferred to the first heat dissipation member 500 having excellent thermal conductivity, and the heat generated from the second semiconductor package 200 has the excellent thermal conductivity. 2 may be transferred to the heat dissipation member 602 and discharged to the outside air from the surfaces of the first heat dissipation member 500 and the second heat dissipation member 602.

24 to 29 are partial cross-sectional views illustrating semiconductor stack package devices in accordance with some embodiments of the inventive concepts.

As shown in FIG. 24, the first heat dissipation member 700 may include a fastening groove 141 formed on one side of the first semiconductor package 100 and a fastening portion 710 forcibly bite. As illustrated in FIG. 26, the first heat dissipation member 701 may include a fastening part 720 fitted to a space between the first semiconductor package 100 and the second semiconductor package 200. As shown in FIG. 27, the first heat dissipation member 702 may be provided with a fastening portion 730 forcibly engaged with one side of the second semiconductor package 200. The first heat dissipation member 700 may be fastened by only one-touch operation of simply pushing the first heat dissipation members 700, 701, and 702 by using the fastening parts 710, 720, and 730. 701, 702 can be improved, and the assembly process can be simplified.

As illustrated in FIG. 28, the first heat dissipation member 703 may be provided with a fastening groove 201 formed at one side of the second semiconductor package 200 and a fastening portion 740 forcibly bitten. . Here, the first heat dissipation member 703 is a heat dissipation plate, a part of which is in contact with the upper surface 140a of the first encapsulant 140, and the flange portion F is installed at one end thereof. F) may be simply fastened through an upper surface of the edge of the second substrate 220 having a width W2 greater than or equal to the width W1 of the first substrate 120 and the fastening portion 740.

As illustrated in FIG. 29, the first heat dissipation member 704 may be provided with a fastening portion 750 that is forcibly sewed on one side of the first semiconductor package 100. Here, the first heat dissipation member 704 is in contact with the upper surface 140a and the side surface 140b of the first encapsulant 140, and the first heat dissipation member 704 is the second substrate 220. Contact with an upper surface 140a of the first encapsulant 140 having a width W3 greater than or equal to the width W4, and fastening to one side of the first semiconductor package 100 through the fastening part 750. Can be.

30 is a partial cross-sectional view illustrating a semiconductor stack package apparatus in accordance with some embodiments of the inventive concepts.

As shown in FIG. 30, the first heat dissipation member 705 may include a fastening groove 142 formed on an upper side of the first encapsulant 140 and a fastening portion 760 that is forcibly sewed. . In addition, the first heat dissipation member 705 may be in contact with the top surface 140a of the first encapsulant 140, and at least one heat dissipation fin 770 may be formed on the surface thereof. Therefore, the first heat dissipation member 705 can be fastened with the first encapsulant 140 in a one-touch manner and can be fastened by increasing the heat dissipation area by using a large surface area of the plurality of heat dissipation fins 770. The heat dissipation of can be made smooth.

31 and 32 are partial cross-sectional views illustrating a state in which semiconductor stack package devices are mounted on a board substrate 3000 according to some embodiments of the inventive concept.

The semiconductor stack package apparatus of FIG. 31 may include a first semiconductor package 100, a second semiconductor package 200, a first heat dissipation member 300, and a board substrate 3000, and the semiconductor stack of FIG. 32. The package device may include a first semiconductor package 100, a second semiconductor package 200, a first heat dissipation member 301, and a board substrate 3000. Here, the first semiconductor package 100 and the second semiconductor package 200 may have the same structure as described with reference to FIGS. 1 and 2. Therefore, detailed description of the components of the first semiconductor package 100 and the second semiconductor package 200 will be omitted.

The first semiconductor package 100 and the second semiconductor package 200 may be mounted on the board substrate 3000. The board substrate 3000 may include a body layer 3100, an upper protective layer 3200, a lower protective layer 3300, an upper pad 3400, and a connection member 3500. A plurality of wiring patterns may be formed on the body layer 3100. The upper protective layer 3200 and the lower protective layer 3300 serve to protect the body layer 3100, and may be, for example, solder resists. Such a board substrate 3000 is standardized as described above, and there is a limit in size reduction. Therefore, the description of the board substrate 3000 will be omitted.

33 is a block diagram schematically illustrating a memory card 7000 including a semiconductor stack package apparatus according to some embodiments of the present inventive concept.

As shown in FIG. 33, in the memory card 7000, the controller 7100 and the memory 7200 may be arranged to exchange electrical signals. For example, when the controller 7100 issues an instruction, the memory 7200 can transmit data. The controller 7100 and / or the memory 7200 may include a semiconductor stack package apparatus according to any one of embodiments of the present invention. The memory 7200 may include a memory array (not shown) or a memory array bank (not shown).

The card 7000 may be a variety of cards, for example a memory stick card, a smart media card (SM), a secure digital (SD), a mini secure digital card (mini) memory device such as a secure digital card (mini SD) or a multi media card (MMC).

34 is a block diagram schematically illustrating an electronic system 8000 including a semiconductor stack package device according to some embodiments of the inventive concept.

As shown in FIG. 27, the electronic system 8000 may include a controller 8100, an input / output device 8200, a memory 8300, and an interface 8400. The electronic system 8000 may be a mobile system or a system for transmitting or receiving information. The mobile system may be a PDA, a portable computer, a web tablet, a wireless phone, a mobile phone, a digital music player, or a memory card .

Herein, the controller 8100 may execute a program and control the electronic system 8000. The controller 8100 may be, for example, a microprocessor, a digital signal processor, a microcontroller, or a similar device. Also, the input / output device 8200 may be used to input or output data of the electronic system 8000.

In addition, the electronic system 8000 may be connected to an external device such as a personal computer or a network by using an input / output device 8200 to exchange data with the external device. The input / output device 8200 may be, for example, a keypad, a keyboard, or a display. The memory 8300 may store code and / or data for operating the controller 8100, and / or store data processed by the controller 8100. The controller 8100 and the memory 8300 may include a semiconductor stack package apparatus according to any one of embodiments of the present invention. In addition, the interface 8400 may be a data transmission path between the system 8000 and other external devices. The controller 8100, the input / output device 8200, the memory 8300, and the interface 8400 may communicate with each other via a bus 8500.

For example, such electronic system 8000 may be a mobile phone, MP3 player, navigation, portable multimedia player (PMP), solid state disk (SSD) or consumer electronics ( household appliances).

It is needless to say that the present invention is not limited to the above-described embodiment, and can be modified by those skilled in the art without departing from the spirit of the present invention.

Therefore, the scope of the claims in the present invention will not be defined within the scope of the detailed description, but will be defined by the following claims and their technical spirit.

100: first semiconductor package 200: second semiconductor package
110: first semiconductor chip 120: first substrate
J: Joiner 130: First Signaling Media
140: first encapsulant 140a: upper surface
140b, 120b, 220b: Side 210: Second Semiconductor Chip
220: second substrate JL: joiner land
T: terminals 230, 231, 232: second signal transmission medium
240, 241, 242: second encapsulant
300, 301, 400, 401, 402, 403, 404, 500, 700, 701, 702, 703, 704, 705: first heat radiation member
121, 221: body layer 122, 222: upper protective layer
123 and 223: Lower protective layer SB1: First solder ball
SB2: second solder ball TE: through electrode
SB: Solder Ball F: Flange
W1, W2, W3, W4: Width FL: Fixed Land
TR: Through Bar TIM: Heat Transfer Material
W: through window 600: second heat dissipation member
601, 602: second heat radiation member 141, 142, 201: fastening groove portion
710, 720, 730, 740, 750, 760: fastening portion 770: heat radiation fin
3000: Board Substrate 3100: Body Layer
3200: upper protective layer 3300: lower protective layer
3400: upper pad 3500: connecting member
7000: memory card 7100: controller
7200: memory 8000: electronic system
8100: controller 8200: input / output device
8300: Memory 8400: Interface
8500: bus

Claims (10)

At least one first semiconductor chip; A first substrate supporting the first semiconductor chip and having a jointer disposed on a bottom surface thereof; A first signal transmission medium electrically connecting the first semiconductor chip and the first substrate; And a first encapsulation material surrounding and protecting the first semiconductor chip and the first signal transmission medium.
At least one second semiconductor chip; A second substrate supporting the second semiconductor chip, a joint land connected to the jointer on an upper surface thereof, and a terminal on a lower surface thereof; A second signal transmission medium electrically connecting the second semiconductor chip and the second substrate; And a second encapsulation material surrounding and protecting the second semiconductor chip and the second signal transmission medium. And
A first heat dissipation member installed on an upper surface of the first semiconductor package to release heat generated in the first semiconductor package and the second semiconductor package to the outside;
Semiconductor stack package device comprising a. The method of claim 1,
And the first heat dissipation member is a heat dissipation plate in contact with an upper surface of the first encapsulant. The method of claim 1,
And the first heat dissipation member is a heat dissipation plate covering an upper surface and a side surface of the first encapsulant, a side surface of the first substrate, and a side surface of the second substrate. The method of claim 1,
The first heat dissipation member is a heat dissipation plate, a part of which is in contact with an upper surface of the first encapsulation material, and a flange portion is provided at one end thereof.
The flange portion is in contact with the upper surface of the edge of the second substrate having a width greater than the width of the first substrate. The method of claim 1,
The first heat dissipation member is a heat dissipation plate, a part of which is in contact with an upper surface of the first encapsulation material, and a flange portion is provided at one end thereof.
And the flange portion is in contact with the second encapsulant having a width greater than or equal to the width of the first substrate. The method of claim 1,
The first heat dissipation member is a heat dissipation plate, a part of which is in contact with an upper surface of the first encapsulation material, and a flange portion is provided at one end thereof.
And the flange portion is in contact with a through bar connected to a fixed land formed on an upper surface of the second substrate through an edge of the second encapsulant having a width greater than or equal to the width of the first substrate. The method of claim 1,
And a heat transfer material (TIM) having an adhesive property between the first heat dissipation member and the first semiconductor package or the second semiconductor package. The method of claim 1,
The first heat dissipation member, the semiconductor stack package apparatus is a through-winding is formed on one side so that air between the first substrate and the second substrate can be connected to the outside air. The method of claim 1,
A second heat radiation member installed on an upper surface of the second semiconductor package and thermally connected to the first heat radiation member;
Semiconductor stack package device further comprising. The method of claim 1,
The first heat dissipation member, the semiconductor stack package apparatus is provided with a fastening portion forcibly interlocked with the first semiconductor package or the second semiconductor package.

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