KR20130035331A - Method for forming elctrode of hetero-junction with intrinsic thin layer solar cell device - Google Patents

Method for forming elctrode of hetero-junction with intrinsic thin layer solar cell device Download PDF

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KR20130035331A
KR20130035331A KR1020110099542A KR20110099542A KR20130035331A KR 20130035331 A KR20130035331 A KR 20130035331A KR 1020110099542 A KR1020110099542 A KR 1020110099542A KR 20110099542 A KR20110099542 A KR 20110099542A KR 20130035331 A KR20130035331 A KR 20130035331A
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forming
electrode
seed layer
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KR101288189B1 (en
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표성규
김창현
김수원
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(주)에임스팩
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884Manufacture of transparent electrodes, e.g. TCO, ITO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer or HIT® solar cells; solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

PURPOSE: A method for forming an electrode of a heterojunction solar cell is provided to easily form a metal electrode wire using a selective electroless depositing method. CONSTITUTION: A texturing layer is formed on the front and the rear of an n-type Si layer. An intrinsic amorphous Si layer is formed on the front or the rear of the n-type Si layer. A p-type amorphous Si layer is formed on the front or the rear of the intrinsic amorphous Si layer. A TCO layer is formed on the front or the rear of the p-type amorphous Si layer(140). A seed layer is formed on the front and the rear of the TCO layer(150).

Description

이종접합 태양전지의 전극 형성 방법{METHOD FOR FORMING ELCTRODE OF HETERO-JUNCTION WITH INTRINSIC THIN LAYER SOLAR CELL DEVICE}Electrode formation method of heterojunction solar cell {METHOD FOR FORMING ELCTRODE OF HETERO-JUNCTION WITH INTRINSIC THIN LAYER SOLAR CELL DEVICE}

본 발명은 이종접합 태양전지의 전극 배선 형성 방법에 관한 것으로, 더욱 상세하게는, 무전해 증착 공정기술을 이용하여 종래의 Ag paste를 적용한 전극의 별도의 소성공정 없이 완전히 금속층으로 매립할 수 있는 고효율, 초저비용 금속 전극 형성 방법에 관한 것이다. 이종접합 실리콘 태양전지의 금속전극은 현재 Silver paste를 이용한 screen printing방법이 대세를 이루고 있다. 하지만 cell전체의 효율적인 측면과 비용적인 측면에서 매우 큰 영향을 끼치는 실리콘 태양전지의 분야에 있어서 silver paste를 적용한 screen printing방법은 실리콘 태양전지의 고 효율화에는 하나의 큰 단점으로 지적될 수 있다. 또한, 전극 설계 나 전극 형성과정은 전극재료 및 전극재료 증착방법에 매우 민감할 수 밖에 없으며 이러한 전극재료 및 형성방법은 저비용, 고효율을 지향할 수 있도록 최적화 된 선정이 필요하며, 기판의 접합구조에 따른 전극재료와 적절한 형성 기법의 선정이 중요하다. 현재 상용화 된 태양전지에 널리 쓰이고 있는 스크린 프린팅 기법은 비교적 재료와 단위공정 장비가 저가이며 다량의 제품을 대기 중에서 대면적으로 빠른 시간내에 생산할 수 있고, 적합한 전극재료를 선택적으로 적용 할 수 있다는 장점이 있다. 직면하고 있다. 또한 전극 재료 자체가 glass frit 성분을 포함하고 있어 비저항이 매우 크다는 단점이 있어서 이 또한 효율 향상에는 장애 요인으로 지적되고 있다. 또한 에미터의 전면에 스크린 프린팅으로 형성한 Ag 전면 전극은 열처리 공정과정에서 전극과 에미터 표면의 접합면에서부터 시작하여 기판 쪽으로 확산 침투를 일으키는 현상으로 인하여 전극 저항이 매우 커질 수 있고 이로 인한 전극효율 감소는 피할 수 없는 상황이라 하겠다. 또한 실리콘 태양전지의 두께가 얇아지면서 실버 스크린 프린팅시 압력에 의하여 기판이 깨지는 불량율도 증가되는 추세여서 이를 극복하기 위한 새로운 전극형성 방법의 개발이 필요하다. Printing 및 고온 Firing시 wafer가 얇아지면서 불량률 발생이 높아질 위험이 있으며, Ag전극내에 Glass Frit으로 인한 저항이 높아지면서 고효율화에 대한 장애요인이 되고 있고, 무엇보다도 Ag원재료의 단가가 급격히 상승하고 있어서 Cost를 줄이기 위해서는 Ag를 대체할 새로운 재료 및 공정, 장비기술이 절실히 요청되고 있는 상황이다.The present invention relates to a method for forming electrode wiring of a heterojunction solar cell, and more particularly, to a high efficiency that can be completely embedded in a metal layer without a separate firing process of the electrode using a conventional Ag paste using an electroless deposition process technology And a method for forming an ultra low cost metal electrode. The metal electrode of the heterojunction silicon solar cell is currently using the screen printing method using silver paste. However, the screen printing method using silver paste in the field of silicon solar cells, which has a great influence on the efficiency and cost of the entire cell, can be pointed out as one of the major disadvantages in the high efficiency of silicon solar cells. In addition, electrode design and electrode formation process must be very sensitive to electrode materials and electrode material deposition methods, and these electrode materials and formation methods need to be optimized for low cost and high efficiency. It is important to select the proper electrode material and proper formation technique. The screen printing technique widely used in commercially available solar cells has the advantages of relatively low cost of materials and unit processing equipment, large quantities of products can be produced in a large area in a short time in the air, and suitable electrode materials can be selectively applied. have. Facing. In addition, since the electrode material itself contains a glass frit component, the specific resistance is very high, which is also pointed out as an obstacle to improving efficiency. In addition, the Ag front electrode formed by screen printing on the front side of the emitter may have a large electrode resistance due to the phenomenon of diffusion penetration into the substrate starting from the junction surface of the electrode and the emitter surface during the heat treatment process, resulting in electrode efficiency. The decline is inevitable. In addition, as the thickness of the silicon solar cell becomes thinner, the defect rate at which the substrate is broken due to the pressure during the silver screen printing is also increasing. Therefore, a new electrode formation method is needed to overcome this problem. During printing and firing at high temperatures, wafers become thinner, resulting in high defect rate.The resistance of glass frit in Ag electrode increases, which is a barrier to high efficiency. Above all, the cost of Ag raw materials is rising rapidly. To reduce, there is an urgent need for new materials, processes, and equipment technologies to replace Ag.


아몰퍼스 실리콘과 단결정 실리콘의 장점을 동시에 이용한 HIT(Hetero-junction with Intrinsic Thin layer) 구조의 태양전지가 일본의 산요전기에서 개발 되었다. 기존의 태양전지가 고온의 확산공정에 의해 에미터를 형성시킨 것과는 달리 HIT 구조에서는 p-type과 intrinsic 아몰퍼스 실리콘을 이용하여 결정질 실리콘에 형성시킨 것이 특징이다. 아몰퍼스 층은 접합만 형성시켜주고 실제 빛을 흡수하는 영역은 그 아래의 결정질 실리콘이다. 그리고 접합계면에 절연층을 둠으로써 전지의 역포화 밀도를 줄여 일반 태양전지에 비해서 온도 특성이 우수하다. 아몰퍼스 박막의 형성은 보통 400 ℃이하에서 가능하기 때문에 전 공정이 저온에서 이루어진다는 것도 큰 장점이다. 그러나 전면의 아몰퍼스가 전도도가 낮아서 보조전극으로 투명 전도막을 사용해야 하는데 투명전도막에서의 반사나 흡수는 변환효율을 줄이는 단점이 있다. Intrinsic 층을 사용한 경우 연구실 레벨에서의 변화효율은 23%에 이른다. 기존 결정질 실리콘 태양전지와 HIT 태양전지의 구조의 차이점은 에미터 형성에 있다. 동종접합으로 에미터를 형성하였는지 이종접합으로 형성하였는가로 구분이 된다. 동종접합의 경우는 웨이퍼 표면에 도핑을 이용하여 형성을 하는 방식으로 고온의 열처리 과정이 필수적이다. 뿐만 아니라 후면 전계를 형성하기 위해서도 고온의 열처리 공정이 필요하다. 반면 HIT cell의 경우에는 전면의 에미터와 후면의 전계를 형성하기 위하여 a-Si:H 박막을 이용함으로써 이런 고온의 열처리 공정을 거치지 않는 장점을 가진다. 본 발명에서는 이러한 이종접합 실리콘 태양전지에 적용되는 새로운 전극형성 방법 및 그 적층 구조에 관한 발명이다.
A HIT (Hetero-junction with Intrinsic Thin layer) structured solar cell using the advantages of amorphous silicon and single crystal silicon was developed at Sanyo Electric Co., Ltd. in Japan. Unlike conventional solar cells, where emitters are formed by high temperature diffusion, HIT structures feature p-type and intrinsic amorphous silicon to form crystalline silicon. The amorphous layer only forms a junction and the area that actually absorbs light is the crystalline silicon beneath it. In addition, by providing an insulating layer on the junction interface, the desaturation density of the battery is reduced, which is excellent in temperature characteristics compared to general solar cells. It is also a big advantage that the entire process is carried out at low temperature since the amorphous thin film is usually possible under 400 ° C. However, since the front amorphous has low conductivity, a transparent conductive film should be used as an auxiliary electrode. However, reflection or absorption in the transparent conductive film reduces the conversion efficiency. Using intrinsic layers, the change efficiency at the lab level is 23%. The difference between the structure of conventional crystalline silicon solar cells and HIT solar cells is the formation of emitters. It is divided into whether the emitter is formed by homogeneous junction or heterojunction. In the case of homogeneous bonding, a high temperature heat treatment process is essential by forming doping on the wafer surface. In addition, a high temperature heat treatment process is required to form a backside electric field. On the other hand, in the case of the HIT cell, the a-Si: H thin film is used to form an emitter on the front side and an electric field on the back side, which does not go through such a high temperature heat treatment process. The present invention relates to a novel electrode formation method and a laminated structure thereof applied to such heterojunction silicon solar cells.

본 발명은, 실리콘 이종접합 태양전지의 전극을 형성하는 방법으로서 선택적 무전해 증착법을 이용한 태양전지 소자에서 금속전극배선을 형성하는 방법에 있어서, HIT이종접합 태양전지를 전극 전 공정까지 제작 한 후에 이어서 전면 후면에 씨드층(seed layer)을 형성하는 단계와 이어서 씨드층 패터닝하는 방법으로서 스크린프린팅을 적용하는 방법과, 스퍼터링 방법을 적용하는 방법과 잉크젯을 이용하는 방법과 스탬핑(stamping)을 적용하는 방법과 카본잉크를 적용하는 방법을 통한 씨드패터닝이 가능한 방법을 포함하며 이후 전, 후면에 동시 증착 방법으로 Cu를 형성하는 단계와 이어 캡 증착 단계를 포함하는 증착공정을 적용하여 전극 공정을 처리하는 방법을 실시하는 방법으로 선택적 무전해 증착공정을 적용한 실리콘 이종접합 태양전지의 금속전극배선을 형성하는 발명.
The present invention is a method for forming a metal electrode wiring in a solar cell device using a selective electroless deposition method as a method for forming an electrode of a silicon heterojunction solar cell, after fabricating the HIT heterojunction solar cell to the entire electrode step Forming a seed layer on the front and back, followed by seed layer patterning, a method of applying screen printing, a method of applying a sputtering method, a method of using an inkjet, a method of applying stamping, The present invention includes a method of seed patterning using a carbon ink method, and then a method of treating an electrode process by applying a deposition process including a step of forming Cu on the front and back surfaces by a simultaneous deposition method followed by a cap deposition step. Metallic field of silicon heterojunction solar cell applying selective electroless deposition process Invention to form a wiring.

씨드층 패터닝하는 방법으로서 스크린프린팅 방법, 스퍼터링 방법, 잉크젯 방법과 스탬핑(stamping) 방법과 카본잉크를 적용하는 방법을 통한 씨드패터닝이 가능한 방법을 포함하며 이후 전, 후면에 동시 증착 방법으로 Cu를 형성하는 단계와 이어 캡 증착 단계를 포함하는 증착공정을 적용하여 전극 공정을 처리하는 방법을 실시하는 방법으로 선택적 무전해 증착공정을 적용한 실리콘 이종접합 태양전지의 금속전극배선을 형성.
Seed layer patterning methods include screen printing, sputtering, inkjet, stamping, and carbon ink application methods, and then forming Cu by simultaneous deposition on the front and back sides. Forming a metal electrode wiring of a silicon heterojunction solar cell applying a selective electroless deposition process by applying a deposition process including a cap deposition step followed by an electrode process.

선택적 증착법을 이용한 이종접합 태양전지 소자에서 금속전극배선을 형성하는 방법에 있어서, n-type Si 전후면에 텍스쳐링(texturing)을 형성하는 단계와, 전면 또는 후면에 intrinsic 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 p-type 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 TCO layer를 형성하는 단계와 이어서 전면 후면에 씨드층(seed layer)을 형성하는 단계와 이어서 전, 후면에 동시 증착 방법으로 Cu를 형성하는 단계와 이어 캡 증착 단계를 포함하는 증착공정을 적용하여 이후 어닐링(annealing)을 하는 단계와 이후 에지 아이솔레이션(edge isolation) 공정을 처리하는 방법을 실시하는 방법으로 고효율 저비용 태양전지의 전극배선에 적용 가능하다.
A method of forming a metal electrode wiring in a heterojunction solar cell device using a selective deposition method, the method comprising: forming a texturing on the front and back n-type Si, and intrinsic amorphous-Si on the front or back Forming, followed by forming a p-type amorphous-Si on the front or back, followed by forming a TCO layer on the front or back, followed by forming a seed layer on the back of the front. Next, a method of performing annealing and then an edge isolation process by applying a deposition process including forming Cu on the front and back surfaces by a simultaneous deposition method followed by a cap deposition step. It can be applied to electrode wiring of high efficiency low cost solar cell.

본 발명에 의하면, 아아크레이어의 금속전극 형성부분을 패터닝한 후에 무전해도금법을 이용하여 아아크레이어에는 니켈 또는 구리층을 형성을 제어하여 금속전극 형성부분만을 선택적 증착함으로써 별도의 포토레지스트 형성공정이 필요 없이 진행이 가능하며 또한 저항이 낮은 구리를 선택적으로 증착함으로써 태양전지의 전극면적 감소를 통한 효율 향상과 저저항으로 인한 효율개선을 할 수 있는 새로운 전극배선 형성 공정에 관한 것이다.According to the present invention, after forming the metal electrode forming portion of the arc layer, a separate photoresist forming process is required by selectively depositing only the metal electrode forming portion by controlling the formation of a nickel or copper layer on the arc layer using an electroless plating method. The present invention relates to a process for forming a new electrode wiring, which can be performed without any copper, and selectively deposits low-resistance copper, thereby improving efficiency by reducing electrode area of a solar cell and improving efficiency due to low resistance.

상기 목적을 달성하기 위해, 본 발명에 따른 선택적 증착 특성을 이용한 이종접합 태양전지의 전극 배선 형성 방법은, 선택적 증착법을 이용한 이종접합 태양전지 소자에서 금속전극배선을 형성하는 방법에 있어서, n-type Si 전후면에 텍스쳐링(texturing)을 형성하는 단계와, 전면 또는 후면에 intrinsic 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 p-type 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 TCO layer를 형성하는 단계와 이어서 전면 후면에 씨드층(seed layer)을 형성하는 단계와 이어서 전, 후면에 동시 증착 방법으로 Cu를 형성하는 단계와 이어 캡 증착 단계를 포함하는 증착공정을 적용하여 이후 어닐링(annealing)을 하는 단계와 이후 에지 아이솔레이션(edge isolation) 공정을 처리하는 방법을 실시하는 방법을 포함하는 것을 특징으로 한다. In order to achieve the above object, the electrode wiring forming method of a heterojunction solar cell using the selective deposition characteristics according to the present invention, in the method of forming a metal electrode wiring in a heterojunction solar cell device using the selective deposition method, n-type Forming texturing on the front and back surfaces, forming intrinsic amorphous Si on the front or back, and then forming p-type amorphous-Si on the front or back And subsequently forming a TCO layer on the front or rear surface, followed by forming a seed layer on the front rear surface, followed by forming Cu on the front and rear surfaces by a simultaneous deposition method, and then cap cap deposition step. Applying an evaporation process, followed by annealing, and then performing a method of processing an edge isolation process. And that is characterized.

이하, 첨부도면을 참조하여 본 발명의 바람직한 실시형태에 관해 상세하게 설명한다. 도 1b는 본 발명에 따른 이종접합 태양전지의 금속 전극 배선 형성 방법을 나타내는 단면도이다.EMBODIMENT OF THE INVENTION Hereinafter, preferred embodiment of this invention is described in detail with reference to an accompanying drawing. 1B is a cross-sectional view illustrating a metal electrode wiring forming method of a heterojunction solar cell according to the present invention.

도 1a의 실리콘 기판(100)상에 P타입 또는 N타입을 형성하고 Texturing을 습식식각(Wet etch)또는 플라즈마 에치(Plasma etch)를 포함하는 건식각(Dry etch)공정으로 진행하게 된다. 이어서 intrinsic 아몰포스 레이어를 증착한다. 이어서, 전면 또는 후면에 p-type 아몰포스(amorphous)-Si을 형성하는 단계로서 (120), (130) 물리증착법이나 화학증착법이 가능하며, SiON, Si3N4, SiOx막 형성 방법으로도 적용이 가능하다. 이어서 전, 후면에 TCO(Transparence conducting oxide)를 형성하는 단계에 있어서 투명 전도성 산화물로는 ITO(Indium Tin Oxide) 및 ZnO(Al)등 의 TCO를 증착하는 방법이 가능하다. TCO증착후 씨드층을 형성하는 방법이 가능하다. Forming P-type or N-type on the silicon substrate 100 of FIG. 1A and proceeding the texturing by a dry etch process including a wet etch or a plasma etch. Subsequently, an intrinsic amorphous layer is deposited. Subsequently, as a step of forming a p-type amorphous-Si on the front or the back, (120), (130) physical vapor deposition or chemical vapor deposition is possible, and can be applied to SiON, Si3N4, and SiOx film formation methods. Do. Subsequently, in the step of forming a transparence conducting oxide (TCO) on the front and rear surfaces, a method of depositing TCO, such as indium tin oxide (ITO) and ZnO (Al), may be used as the transparent conductive oxide. It is possible to form a seed layer after TCO deposition.

씨드층을 형성하는 단계로서 씨드층으로는 Ag paste, Ag, Cu, Ni, Mo, Sn, Co, W를 적용하는 씨드층을 형성하는 방법이 가능하며 씨드층으로 적용하는 물질 및 공정을 포함하며 씨드층의 증착방식으로는 스크린프린팅, sputtering 방법이 가능하며,, CVD법, evaporation법, ALD법, 무전해/전해 도금 법을 적용한 증착이 가능한 이종접합 태양전지 전극 형성 방법이 가능하다. 이러한 전극형성을 위한 전극부위 이외의 씨드층을 제거하는 씨드층 패터닝하는 방법으로서 스크린프린팅을 적용하는 방법과, 스퍼터링 방법을 적용하는 방법과 잉크젯을 이용하는 방법과 스탬핑(stamping)을 적용하는 방법과 카본잉크를 적용하는 방법을 통한 씨드패터닝이 가능한 방법을 포함하며 전극의 캡을 형성하여 이종접합 태양전지의 전극을 형성한다.
Forming a seed layer, the seed layer may be a method of forming a seed layer applying Ag paste, Ag, Cu, Ni, Mo, Sn, Co, W, and includes a material and a process applied as a seed layer As a deposition method of the seed layer, screen printing and sputtering methods are possible, and a heterojunction solar cell electrode formation method capable of depositing by applying a CVD method, an evaporation method, an ALD method, and an electroless / electrolytic plating method is possible. As a method of seed layer patterning for removing seed layers other than electrode portions for forming electrodes, a method of applying screen printing, a method of applying a sputtering method, a method of using inkjet, a method of applying stamping, and carbon It includes a method capable of seed patterning through the method of applying the ink to form the cap of the electrode to form the electrode of the heterojunction solar cell.

100: 실리콘기판
110: intrinsic a-Si Layer
120: 전면 p-type a-Si Layer
130: 후면 p-type a-Si Layer
140: 투명전도성옥사이드(TCO) 레이어층
150: 씨드 형성 및 씨드패터닝(seed patterning) 단계
160: 선택적 무전해 구리증착 단계
170: 무전해/전해 캡형성 단계
100: silicon substrate
110: intrinsic a-Si Layer
120: front p-type a-Si Layer
130: rear p-type a-Si layer
140: transparent conductive oxide (TCO) layer layer
150: seed formation and seed patterning step
160: optional electroless copper deposition step
170: electroless / electrolytic capping step

Claims (6)

실리콘 이종접합 태양전지의 전극을 형성하는 방법으로서 무전해/전해 도금법을 이용한 태양전지 소자에서 금속전극배선을 형성하는 방법에 있어서, n-type Si 전후면에 텍스쳐링(texturing)을 형성하는 단계와, 전면 또는 후면에 intrinsic 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 p-type 아몰포스(amorphous)-Si을 형성하는 단계와 이어서 전면 또는 후면에 ITO,ZnO(Al)등의 TCO layer를 형성하는 단계와 이어서 전면 후면에 Ag, Cu, Ni, Sn, Co,W 씨드층(seed layer)을 형성하는 단계와 이어서 씨드층 패터닝하는 방법과 이어서 전, 후면에 동시 증착 방법으로 Cu를 형성하는 단계와 이어 캡 증착 단계를 포함하는 증착공정을 적용하여 이후 어닐링(annealing)을 하는 단계와 이후 에지 아이솔레이션(edge isolation) 공정을 처리하는 방법을 실시하는 방법으로 무전해/전해 증착공정을 적용한 실리콘 이종접합 태양전지의 금속전극배선을 형성하는 발명. A method of forming a metal electrode wiring in a solar cell device using an electroless / electrolytic plating method as a method of forming an electrode of a silicon heterojunction solar cell, comprising the steps of: forming texturing on the front and rear surfaces of n-type Si; Forming intrinsic amorphous-Si on the front or rear, followed by forming p-type amorphous-Si on the front or rear, followed by ITO, ZnO (Al), etc. Forming a TCO layer, followed by forming an Ag, Cu, Ni, Sn, Co, and W seed layer on the front rear surface, followed by seed layer patterning followed by simultaneous deposition on the front and back surfaces. The method of performing annealing and then an edge isolation process by applying a deposition process including forming a film and then cap deposition. / Electrolytic deposition process applying the invention to form a metal electrode wiring of the silicon heterojunction solar cells. 제 1 항에 있어서 전극형성을 위한 전극부위 이외의 씨드층을 패터닝하는 방법을 적용하는 이종접합 태양전지 전극 형성 방법으로서 이어서 씨드층 패터닝하는 방법으로서 스크린프린팅을 적용하는 방법이 가능하다. The method for forming a heterojunction solar cell electrode applying the method of patterning a seed layer other than the electrode portion for electrode formation according to claim 1, and then, a method of applying screen printing as a method of seed layer patterning is possible. 제 1 항에 있어서,,
전극형성을 위한 전극부위 이외의 씨드층을 패터닝하는 방법을 적용하는 이종접합 태양전지 전극 형성 방법으로서 이어서 씨드층 패터닝하는 방법으로서 스퍼터링을 적용하는 방법이 가능하다.
The method of claim 1,
As a method of forming a heterojunction solar cell electrode applying a method of patterning a seed layer other than an electrode portion for forming an electrode, a method of applying sputtering as a method of seed layer patterning is possible.
제 1 항에 있어서,,
전극형성을 위한 전극부위 이외의 씨드층을 패터닝하는 방법을 적용하는 이종접합 태양전지 전극 형성 방법으로서 이어서 씨드층 패터닝하는 방법으로서 잉크젯을 적용하는 방법이 가능하다.
The method of claim 1,
As a method of forming a heterojunction solar cell electrode which applies a method of patterning a seed layer other than an electrode portion for forming an electrode, a method of applying inkjet as a method of seed layer patterning is possible.
제 1 항에 있어서,,
전극형성을 위한 전극부위 이외의 씨드층을 패터닝하는 방법을 적용하는 이종접합 태양전지 전극 형성 방법으로서 이어서 씨드층 패터닝하는 방법으로서 스탬핑(stamping)을 적용하는 방법이 가능하다.
The method of claim 1,
As a method of forming a heterojunction solar cell electrode applying a method of patterning a seed layer other than an electrode portion for forming an electrode, a method of applying stamping as a method of patterning a seed layer is possible.
제 1 항에 있어서,,
전극형성을 위한 전극부위 이외의 씨드층을 패터닝하는 방법을 적용하는 이종접합 태양전지 전극 형성 방법으로서 이어서 씨드층 패터닝하는 방법으로서 카본잉크를 적용하는 방법이 가능하다.







The method of claim 1,
As a method of forming a heterojunction solar cell electrode which applies a method of patterning a seed layer other than an electrode portion for electrode formation, a method of applying carbon ink as a method of seed layer patterning is possible.







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