KR20120032764A - Substrate for flip chip package and method of manufacturing flip chip package using the same - Google Patents

Abstract

PURPOSE: A substrate for a flip chip package and a manufacturing method of the flip chip package using the same are provided to reduce flow rate of a mold resin using a resistance pattern formed on the substrate, thereby uniformly injecting the mold resin on the substrate. CONSTITUTION: A solder resist layer is formed on a substrate(100). A flip chip(200) is mounted on the upper surface of the solder resist layer. A resistance pattern(120) is formed on a region of the solder resist layer in which the flip chips are not mounted. A hole which exposes a part of a circuit formed on the substrate is formed on the solder resist layer. A pillar made of a cooper material or a solder bump is formed on the lower surface of the flip chip.

Description

SUBSTRATE FOR FLIP CHIP PACKAGE AND METHOD OF MANUFACTURING FLIP CHIP PACKAGE USING THE SAME

The present invention relates to a substrate for a flip chip package and a method for manufacturing a flip chip package using the same, and more particularly, to a substrate for a flip chip package and a method for manufacturing a flip chip package using the same to reduce the occurrence of voids. It is about.

Recently, electronic devices have been miniaturized, and accordingly, the size of semiconductor packages used in electronic devices has also been demanded. In response to the demand for miniaturization of semiconductor packages, flip chip packages have emerged.

The flip chip package refers to a semiconductor package formed by forming a solder bump on a pad formed on an upper portion of a semiconductor chip and connecting a solder bump and a pad printed on a substrate by a soldering method. The flip chip package has a shorter connection distance between the pads of the semiconductor chip and the substrate than the semiconductor package of the conventional method of connecting the semiconductor chip and the substrate, and thus can be miniaturized, has excellent electrical characteristics, and has a high signal transmission speed. There is a quick advantage.

In the flip chip package, the semiconductor chip and the substrate are filled with a resin such as epoxy, which is called an underfill process. Currently, the underfill method includes a CUF (Capillary Under Fill) process and a MUF (Molded Under Fill) process. The CUF process is a method of filling a separate underfill process before the mold step, and filling the resin between the semiconductor chip and the substrate with a resin such as epoxy using a separate equipment. The MUF process is a method of simultaneously filling a mold resin between the semiconductor chip and the substrate in the entire mold process without the separate underfill step.

The MUF process has an advantage that a separate underfill step is not required in the CUF process, but the underfill process must be performed together with only the mold resin, which increases the possibility that voids are formed between the semiconductor chip and the substrate. Particularly, in the mold process, the mold resin is supplied from one side of the molding apparatus to which the substrate is mounted and filled on the substrate. When the moving speed of the mold resin is not uniform, the occurrence of the voids increases. do.

Accordingly, the technical problem of the present invention was conceived in this respect, and an object of the present invention is to provide a flip chip package substrate for reducing the generation of voids by uniformly moving the mold resin.

Another object of the present invention is to provide a method for manufacturing a flip chip package using the flip chip package substrate.

According to an embodiment of the present invention, a substrate for a flip chip package includes a substrate on which a circuit is formed, a solder resist layer having a hole formed on the substrate and exposing a portion of the circuit, and the substrate. A plurality of flip chips including a solder bump is mounted on top and electrically connected to a circuit of the substrate through a hole formed in the solder resist layer. A resistive pattern is formed in a region where the flip chips are not mounted in the solder resist layer.

In one embodiment of the present invention, the resistance pattern may be formed in a region between the adjacent flip chips, located in parallel with the direction in which the mold resin is injected.

In one embodiment of the present invention, the flip chips are mounted on the substrate in a matrix form, so that the regions where the resistance pattern is formed may be spaced apart from each other by a predetermined interval.

In one embodiment of the present invention, the resistance pattern may be a concave-convex pattern arbitrarily formed recesses and convex portions.

In one embodiment of the present invention, the resistance pattern is formed to protrude perpendicularly to the direction in which the mold resin is injected, it may interfere with the flow of the mold resin.

In a method of manufacturing a flip chip package according to another embodiment for realizing the object of the present invention described above, a solder resist layer having holes for exposing a portion of a circuit formed on a substrate is formed on the substrate. A resist pattern is formed in a region where flip chips of the solder resist layer are not mounted. On the solder resist layer, a plurality of flip chips including solder bumps electrically connected to a circuit of the substrate through holes in the solder resist layer are mounted. A flip chip package may be manufactured by further including a mold resin injection step and a separation step.

In one embodiment of the present invention, the resistance pattern may be formed by uniformly forming the solder resist layer.

According to the flip chip package substrate and the method of manufacturing the flip chip package using the same, the flow rate of the mold resin is reduced by the resistance pattern formed on the substrate, it is possible to uniformly inject the mold resin on the substrate as a whole. have.

In addition, since uniform injection of the mold resin can be performed, generation of voids formed between the flip chip and the substrate can be reduced.

1 is a plan view showing a substrate for a flip chip package according to an embodiment of the present invention.
FIG. 2 is an enlarged cross-sectional view of the substrate of FIG. 1 taken along AA ′.
3 is a flowchart illustrating a method of manufacturing a flip chip package using the substrate illustrated in FIG. 1.
4 is a schematic view showing a process of injecting a mold resin in the manufacturing method of FIG.
5 is a plan view showing a substrate for a flip chip package according to another embodiment of the present invention.
6 is a plan view showing a substrate for a flip chip package according to another embodiment of the present invention.
FIG. 7 is an enlarged perspective view of the substrate of FIG. 6 by cutting an X region.

As the inventive concept allows for various changes and numerous modifications, the embodiments will be described in detail in the text. However, this is not intended to limit the present invention to a specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing the drawings, similar reference numerals are used for similar elements. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "consist of" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present disclosure does not exclude the existence or the possibility of addition of numbers, steps, operations, components, parts or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

1 is a plan view showing a substrate for a flip chip package according to an embodiment of the present invention. FIG. 2 is an enlarged cross-sectional view taken along the line AA ′ of the substrate of FIG. 1.

1 and 2, a substrate for a flip chip package according to an embodiment of the present invention may include a substrate 100, a solder resist layer 110 formed on the substrate, and a plurality of flips mounted on the substrate. Chips 200.

A circuit pattern (not shown) is formed on the upper surface of the substrate 100. The solder resist layer 110 is formed on the upper surface of the substrate. The flip chip 200 is mounted on an upper surface of the solder resist layer formed on the substrate 100. More specifically, the solder resist layer has a hole 220 exposing a circuit formed in the substrate in a portion of the region where the flip chip is mounted. A solder bump 210 or a copper pillar (not shown) is formed on a lower surface of the flip chip 200, and may be attached to the upper surface of the substrate 100 through the solder bumps and the filler. . The solder bumps 210 or the fillers are electrically connected to the circuit patterns formed on the substrate through the holes 220 formed in the solder resist layer. The material of the solder bumps 210 may include tin (Sn) and lead (Pb), or may include lead-free materials suitable for RoHS (Restriction of Hazardous Substances). . The lower surface of the substrate 100 may further include a solder ball (300).

The flip chips are arranged in a matrix on the substrate. In order to efficiently produce a plurality of flip chip packages on one substrate, the flip chips are disposed on the substrate while maintaining a proper distance from each other.

Circuit patterns are formed on the lower surfaces of the flip chips facing the substrate. Solder bumps 210 are formed on the bottom surfaces of the flip chips to electrically connect the flip chips and the substrate and simultaneously support the flip chips. Therefore, an open space exists between the flip chips and the substrate.

In the solder resist layer 110, a resistance pattern 120 is formed in a region C in which the flip chip is not mounted. The resistance pattern 120 is formed to be spaced apart from the flip chip by a predetermined distance so as not to affect the connection structure between the flip chip and the substrate. The shape of the resistance pattern 120 may be variously modified. For example, the resistance pattern may have the same and uniform shape as a whole, and may be a concave-convex pattern 120 in which recesses and protrusions are arbitrarily formed.

In general, the substrate on which the flip chip is mounted as described above is molded between the flip chip and the substrate and the entire upper part of the flip chip through a molding process. As such, after the upper chip is protected by a mold resin and then cut into individual flip chip packages, one flip chip package is finally manufactured. In the molding process, the substrate is mounted on a molding apparatus, the mold resin is injected from one side of the substrate, and the mold resin is flowed to the entire upper surface of the substrate, thereby molding the substrate as a whole. The molding resin may be an epoxy mold compound (EMC). In particular, in the MUF process, the average filler size of the EMC should be smaller than the existing average size. That is, the filler size of the mold resin in the MUF process should be 30-50 μm or less, while the existing average size is 60 μm.

When the mold resin is injected in the molding process as described above, the mold resin is formed by the flip chips in the region B in which the flip chips are mounted on the substrate based on the direction in which the mold resin is injected. There is resistance to flow. However, since little resistance is received in the section C between the flip chips, the mold resin flows at a higher speed in the section C. Therefore, the flow rate of the mold resin is different for each section, the overall uniform flow is difficult. In particular, in the MUF process, since the space between the flip chip and the substrate is filled with the mold resin, uniform injection of the mold resin becomes more important. Therefore, such a difference in flow rate of the mold resin eventually causes a problem of increasing the generation of voids between the flip chip and the substrate.

The uneven pattern 120 formed on the solder resist layer according to the exemplary embodiment of the present invention is formed in a region C parallel to the direction in which the mold resin is injected in the molding process among the regions where the flip chip is not mounted on the substrate. Can be. That is, a region where the uneven pattern is formed may correspond to a stripe region parallel to a direction in which the mold resin is injected on the substrate.

When the mold resin is injected in the molding process, the flow rate of the mold resin decreases by a certain amount due to the frictional force by the uneven pattern, as well as the section B on which the flip chip is formed, as well as the section C on which the uneven pattern is formed. do. By appropriately changing the height or spacing of the uneven pattern to adjust the degree of friction, thereby reducing the difference between the flow rate of the mold resin in the section where the flip chip is formed and the flow rate of the mold resin in the section where the uneven pattern is formed. The mold resin can be injected uniformly as a whole. Therefore, generation of voids in the molding process can be efficiently reduced.

3 is a flowchart illustrating a method of manufacturing a flip chip package using the substrate illustrated in FIG. 1. 4 is a schematic view showing a process of injecting a mold resin in the manufacturing method of FIG.

3 and 4, a solder resist layer is formed on the substrate 100. In the solder resist layer, holes for exposing a part of a circuit formed on the substrate are formed in a region where flip chips are to be mounted (S110). In the solder resist layer, a resistance pattern is formed in an area except for an area in which flip chips are to be mounted (S120). A circuit pattern of a matrix structure is formed on the substrate to allow a plurality of flip chips to be mounted. A resistance pattern is formed to correspond to an area except for a region where the flip chips are to be mounted. The resistance pattern is formed to be spaced apart from a region where the flip chips are to be mounted so as not to affect the connection structure between the flip chips and the substrate. The resistance pattern may be formed in various ways, but the resistance pattern should be formed to have the same and uniform shape as a whole. For example, the shape of the resistance pattern may be a concave-convex pattern arbitrarily formed with concave portions and convex portions.

The resistance pattern 120 is formed in a region C parallel to a direction 410 in which a mold resin is injected in a molding process performed later in a region where flip chips are not mounted on the substrate. That is, the region where the resistance pattern is formed may correspond to the stripe region C parallel to the direction 410 in which the mold resin is injected on the substrate.

The operation of forming the resistance pattern may be performed in various ways without damaging the structures of the flip chip and the substrate. For example, in the process of forming the solder resist layer, the resist pattern may form a desired resist pattern structure by uniformly applying or forming a solder resist layer in a region where the resist pattern is formed. In addition, the resist pattern may be formed on the solder resist layer using a mask based on the resist pattern.

The shape of the resistance is merely to maintain a constant resistance to the overall flow, it is not intended to simply increase the resistance, it is only necessary to have a height and spacing that can maintain a certain degree.

Subsequently, a plurality of flip chips 200 are mounted on the substrate 100 (S130). For example, the solder bumps formed on the lower surfaces of the flip chips may be mounted to be connected to the circuit formed on the substrate through holes formed in the solder resist layer. The flip chips are arranged in a matrix on the substrate.

Subsequently, the substrate is mounted on the mold apparatus 400 and a mold resin is injected (S140). The mold resin is generally injected to one side of the substrate to spread throughout, thereby molding the substrate as a whole. The molding resin may be an epoxy mold compound (EMC). In particular, in the MUF process, the average filler size of the EMC should be smaller than the existing average size. In addition, the vacuum pressure of the mold apparatus is characterized by a very high in order to reduce the possibility of the generation of voids.

In the process of injecting the mold resin, the flow rate of the mold resin is reduced due to the frictional force by the resistance pattern formed on the solder resist layer. As a result, by reducing the difference between the flow rate of the mold resin in the section where the flip chip is formed and the flow rate of the mold resin in the section where the resistance pattern is formed, the mold resin may be uniformly injected as a whole. Therefore, generation of voids in the molding process can be efficiently reduced.

Subsequently, a plurality of flip chip packages can be manufactured by curing the molds for a predetermined time and separating them separately. The molded flip chip package protects the semiconductor chip and solder bumps and allows the flip chip package to be handled conveniently. It also enables the flip chip to withstand the operating environment, including high temperatures. As described above, the substrate on which the molding process is completed is separated into respective flip chip packages to produce individual flip chip packages.

5 is a plan view showing a substrate for a flip chip package according to another embodiment of the present invention. In the present embodiment, since the region in which the resist pattern is formed in the solder resist layer is the same as the resist pattern of the embodiment described with reference to FIG. 1, the same reference numerals are used and overlapping descriptions are omitted. do.

Referring to FIG. 5, a resistance pattern 130 is formed in a region C in which the flip chip is not mounted on the solder resist layer formed on the upper surface of the substrate. The resistance pattern 130 is formed to be spaced apart from the flip chip at a predetermined distance so as not to affect the connection structure between the flip chip and the substrate. The shape of the resistance pattern 130 may be variously modified. For example, the resistance pattern may have the same and uniform shape as a whole, and may be a concave-convex pattern in which recesses and protrusions are arbitrarily formed.

The uneven pattern 130 is formed in a region C parallel to a direction in which the mold resin is injected in the molding process among the regions where the flip chip is not mounted on the substrate, and the two adjacent flip chips among the regions C are formed. It can be formed in the area between. That is, the uneven pattern may be formed on the substrate in the form of a matrix.

By forming the region where the uneven pattern is formed in the solder resist layer as a matrix as described above, even in the region where the flip chip is not formed in the direction in which the mold resin is injected, the same resistance effect as the flip chip is formed may be obtained. . Therefore, by controlling the flow rate of the mold resin in the molding process, it is possible to inject the mold resin evenly on the substrate as a whole. However, the region where the uneven pattern is formed is not limited to the above-described embodiment. In order to equalize the flow rate of the entire mold resin in the molding process, the position where the uneven pattern is formed may be appropriately modified.

6 is a plan view showing a substrate for a flip chip package according to another embodiment of the present invention. FIG. 7 is an enlarged perspective view of the substrate of FIG. 6 by cutting an X region. In the present exemplary embodiment, since the resistance pattern formed on the solder resist layer has the shape of protruding perpendicular to the direction in which the mold resin is injected, the same reference numerals are used as those of the embodiment described with reference to FIG. 1. Duplicate descriptions are omitted.

6 and 7, a resistance pattern 130 is formed in a region C in which the flip chip is not mounted on the solder resist layer formed on the upper surface of the substrate. The resistance pattern 130 is formed to be spaced apart from the flip chip at a predetermined distance so as not to affect the connection structure between the flip chip and the substrate. The resistance pattern 130 is formed to protrude perpendicularly to the direction in which the mold resin is injected in the molding process, and a plurality of protruding shapes are uniformly spaced at regular intervals. That is, the shape of the resistance pattern may be formed to have a constant wave pattern when viewed in a cross section parallel to the direction in which the mold resin is injected.

As described above, the resistance pattern formed on the solder resist layer is formed to protrude perpendicularly to the direction in which the mold resin is injected, and a plurality of protruding shapes are formed to be uniformly spaced at regular intervals. Therefore, even in a region where the flip chip is not formed in the direction in which the mold resin is injected, the same resistance effect as the flip chip is formed may be obtained.

As described above, according to the embodiment of the present invention, since the flow rate of the mold resin is reduced by the resistance pattern formed on the substrate in the molding process, the mold resin may be uniformly injected on the substrate as a whole.

In addition, since uniform injection of the mold resin can be performed, generation of voids formed between the flip chip and the substrate can be reduced.

Although described above with reference to the embodiments, those skilled in the art can be variously modified and changed within the scope of the present invention without departing from the spirit and scope of the invention described in the claims below. I can understand.

100: substrate 110: solder resist layer
120, 130, 140: resistance pattern 200: flip chip
210: solder bump 300: solder ball
400: molding apparatus

Claims (8)

A substrate on which a circuit is formed;
A solder resist layer formed on the substrate and having holes for exposing a portion of the circuit; And
A plurality of flip chips mounted on the substrate and including a plurality of solder bumps electrically connected to a circuit of the substrate through holes formed in the solder resist layer;
And a resistive pattern is formed in a region where the flip chips are not mounted in the solder resist layer. The flip chip package substrate of claim 1, wherein the resistance pattern is formed in a region between the adjacent flip chips, the region being parallel to a direction in which a mold resin is injected. The flip chip package substrate of claim 1, wherein the flip chips are mounted on the substrate in a matrix form, and regions in which the resistance patterns are formed are spaced apart from each other by a predetermined interval. The flip chip package substrate according to claim 1, wherein the resistance pattern is a concave-convex pattern arbitrarily formed with a concave portion and a convex portion. The flip chip package substrate of claim 1, wherein the resistance pattern is formed to protrude perpendicularly to a direction in which the mold resin is injected, thereby hindering the flow of the mold resin. Forming a solder resist layer having a hole on the substrate, the hole resist layer exposing a portion of the circuit formed on the substrate;
Mounting a plurality of flip chips on the solder resist layer, the plurality of flip chips including solder bumps electrically connected to circuits of the substrate through holes in the solder resist layer; And
And forming a resistance pattern in a region in which the flip chips of the solder resist layer are not mounted. The method of claim 6, further comprising a mold resin injection step and a separation step. The method of claim 6, wherein the resistance pattern is formed by uniformly forming the solder resist layer.

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