KR20120026255A - Method for forming semiconductor device - Google Patents

Method for forming semiconductor device Download PDF

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Publication number
KR20120026255A
KR20120026255A KR1020100088378A KR20100088378A KR20120026255A KR 20120026255 A KR20120026255 A KR 20120026255A KR 1020100088378 A KR1020100088378 A KR 1020100088378A KR 20100088378 A KR20100088378 A KR 20100088378A KR 20120026255 A KR20120026255 A KR 20120026255A
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KR
South Korea
Prior art keywords
pattern
forming
hard mask
layer
silicon oxide
Prior art date
Application number
KR1020100088378A
Other languages
Korean (ko)
Inventor
민수련
진규안
최원준
Original Assignee
주식회사 하이닉스반도체
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Priority to KR1020100088378A priority Critical patent/KR20120026255A/en
Publication of KR20120026255A publication Critical patent/KR20120026255A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: A method for forming a semiconductor device is provided to reduce a time and costs by simplifying a process of forming a hard mask pattern to make a fine pattern. CONSTITUTION: A target layer(102) is formed in the top side a semiconductor substrate(100). A hard mask layer(104) is formed in the top side of the target layer. . A silicon oxide film is formed in the top side of the hard mask layer. The silicon oxide film is etched and the silicon oxide film pattern(106a) is formed. A metal hard mask layer is formed in the top side of the silicon oxide film pattern. A metal hard mask pattern(112a) is formed by performing dry etching the metal hard mask layer.

Description

Method for forming semiconductor device

The present invention relates to a method for forming a semiconductor device, and more particularly, to a method for forming a semiconductor device including a fine pattern.

Most modern electronic appliances have semiconductor devices. Semiconductor devices include electronic elements such as transistors, resistors, and capacitors, which are designed to perform partial functions of electronic products and then integrated on a semiconductor substrate. For example, electronic products such as a computer or a digital camera include semiconductor devices, such as a memory chip for storing information and a processing chip for controlling information, and the memory chip and the processing chip include a semiconductor substrate. Electronic components integrated on the substrate.

Semiconductor devices need to be increasingly integrated to meet consumer demands for superior performance and low cost. As the degree of integration of semiconductor memory devices increases, design rules decrease, and the pattern of semiconductor devices becomes smaller. As miniaturization and high integration of a semiconductor device progresses, the overall chip area increases in proportion to an increase in memory capacity, but the area of a cell area where a semiconductor device pattern is formed is actually decreasing. Therefore, in order to secure a desired memory capacity, more patterns must be formed in a limited cell region, so that a fine pattern with a reduced critical dimension of the pattern must be formed.

However, the development of exposure equipment for realizing the fine pattern required due to the high integration of the device is not satisfied with the development of technology. In particular, when a photoresist pattern containing silicon is formed by exposing and developing a photoresist film containing silicon using existing exposure equipment, there is a limit to the resolution capability of the exposure equipment.

In addition, various process steps are required to realize the fine pattern required due to the high integration of the device. Specifically, in order to form a hard mask pattern for forming a fine pattern, a mask forming process consisting of several steps, a double exposure etching technique (DEET) method, or a hard mask pattern (spacer) forming process should be performed. This process method not only increases the overall process step, but also causes an increase in device mass production cost. In addition, as the pattern size becomes finer, the pattern (eg, a photoresist pattern) may be inclined or collapsed.

In general, a hard mask pattern includes a carbide film, an oxide film, an oxide oxide film, and the like. When forming a pattern of 30 nanometers or less, the etching rate of the hard mask layer must be increased to increase the thickness of the hard mask layer. In addition, since a physical etching mechanism for forming a vertical pattern is required, there is a problem that hardening of the hard mask pattern occurs, so that the removal after the pattern formation is not easy.

The present invention can solve the problem of reducing the productivity of the semiconductor device by increasing the time and cost required to form a hard mask pattern to implement a fine pattern is complicated.

The method of forming a semiconductor device of the present invention includes forming an etched layer on a semiconductor substrate, forming a metal hard mask pattern on the etched layer, and etching the etched layer using the metal hard mask pattern as a mask. And forming a final pattern.

The method may further include forming a hard mask layer on the etched layer after forming the etched layer on the semiconductor substrate, and forming a silicon oxide layer pattern on the hard mask layer.

The forming of the silicon oxide layer pattern may include forming a silicon oxide layer on the hard mask layer, forming a photoresist layer pattern on the silicon oxide layer, and etching the silicon oxide layer using the photosensitive layer pattern as a mask. Characterized in that it comprises a.

The forming of the photoresist pattern may be performed such that a ratio of the width of the photoresist pattern and the width therebetween is 1: 3.

The forming of the photoresist pattern may include applying a negative photoresist film on the silicon oxide layer and performing an exposure and development process on the negative photoresist film.

The forming of the metal hard mask pattern may include forming a metal hard mask layer on the hard mask layer including the silicon oxide layer pattern, performing dry etching on the metal hard mask layer, and And removing the silicon oxide pattern.

The forming of the metal hard mask layer is characterized by using atomic layer deposition (ALD).

In addition, the forming of the metal hard mask layer may include forming Ti, W, Al, Ta, and TaN.

In addition, the dry etching may be performed using an inert gas plasma.

The method may further include removing the metal hard mask pattern after the forming of the final pattern.

In addition, the removing of the metal hard mask pattern may be performed using an oxygen plasma.

The present invention has the advantage that it is possible to form a fine pattern, it is possible to reduce the time and cost by simplifying the process when forming a hard mask pattern for forming a fine pattern and provides an effect that the hard mask pattern is easily removed. .

1A to 1I are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

Hereinafter, with reference to the accompanying drawings in accordance with an embodiment of the present invention will be described in detail.

As shown in FIG. 1A, the etched layer 102 is formed on the semiconductor substrate 100, the hard mask layer 104 is formed on the etched layer 102, and the silicon is formed on the hard mask layer 104. After the oxide film 106 is formed, a photosensitive film 108 is formed over the silicon oxide film 106. Here, the hard mask layer 104 preferably includes an amorphous carbon film, and the photosensitive film 108 may include a positive type or a negative type. In the embodiment of the present invention, a negative photosensitive film is taken as an example. Subsequently, it is preferable to perform the exposure process using the mask M on the photosensitive film 108.

For reference, the positive type photoresist film is characterized in that the exposure source and the photoresist film react to remove the photoresist film in the area exposed to the exposure source by the developing process. The photosensitive film in the unheated area is removed by the developing process.

As illustrated in FIG. 1B, a photosensitive film pattern 110 is formed by performing a developing process on the photosensitive film 108 on which an exposure process has been performed. Here, since the photoresist layer 108 is a negative type, the photoresist pattern 110 is preferably formed by removing an area not exposed by the mask M. Referring to FIG. At this time, when the width of the photosensitive film pattern 110 is 'a', the space between the adjacent photosensitive film patterns 110 is preferably '3a'. That is, the width: space width ratio of the photosensitive film pattern 110 is preferably 1: 3.

As illustrated in FIG. 1C, the silicon oxide layer 106 is etched using the photoresist layer 110 as a mask to form the silicon oxide layer pattern 106a.

As shown in FIG. 1D, a metal hard mask layer 112 is formed on the silicon oxide layer pattern 106a. The metal hard mask layer 112 is preferably formed by an atomic layer deposition (ALD) method, and preferably formed to have a uniform thickness. Since the metal hard mask layer 112 is formed by an atomic layer deposition method, it is easy to control the thickness. In addition, since the deposition method in atomic units is used, the thickness can be controlled in 'Å' units. The metal hard mask layer 112 preferably includes Ti, W, Al, Ta, and TaN. Among them, when using a fluorine-based etching gas in a dry etching process, Ti, Al, chlorine may be used. When using a series of etching gas, it is preferable to apply W, Ta, TaN.

As illustrated in FIG. 1E, dry etching is performed on the metal hard mask layer 112 to form the metal hard mask pattern 112a on the sidewall of the silicon oxide layer pattern 106a. Since the metal hard mask layer 112 is formed by the atomic layer deposition method as described above, the thickness can be adjusted to form a very thin thickness. Accordingly, the metal hard mask pattern 112a may be formed to have a very small width. Since the metal hard mask pattern 112a is used as a mask for determining the width of the final pattern in a subsequent process, a smaller width of the metal hard mask pattern 112a means a smaller width of the final pattern. Therefore, it is preferable to adjust the deposition thickness of the metal hard mask layer 112 according to the width of the final pattern.

Dry etching of the above-described metal hard mask layer 112 is preferably performed using an inert gas plasma. In this case, the dry etching is performed so that only the metal hard mask layer 112 formed on the silicon oxide layer pattern 106a and the hard mask layer 104 is removed and does not affect the metal hard mask layer 112 remaining on the sidewalls. It is desirable to.

As shown in FIG. 1F, the silicon oxide film pattern 106a remaining between the metal hard mask patterns 112a is removed. The silicon oxide film pattern 106a is preferably removed by a cleaning solution. It is preferable that the width of the metal hard mask pattern 112a and the width of the neighboring metal hard mask pattern 112a are the same after the silicon oxide film pattern 106a is removed. That is, it is preferable to have a ratio of 1: 1.

As shown in FIGS. 1G and 1H, the hard mask layer 104 is etched using the metal hard mask pattern 112 a as a mask to form the hard mask pattern 104 a (FIG. 1G). Subsequently, the etching target layer 102 is etched using the hard mask pattern 104a as a mask to form a final pattern 102a (FIG. 1H).

As shown in FIG. 1I, the hard mask pattern 104a and the metal hard mask pattern 112a remaining on the final pattern 102a are removed. Here, it is preferable to remove the hard mask pattern 104a and the metal hard mask pattern 112a by using an oxygen plasma.

As described above, in order to form a semiconductor device having a fine line width, the present invention forms a metal hard mask layer by using an atomic layer deposition method, and then forms a metal hard mask pattern through dry etching, and uses the mask to form a final pattern. By forming the fine pattern can be easily formed.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention as defined by the appended claims. Of the present invention.

Claims (11)

Forming an etched layer on the semiconductor substrate;
Forming a metal hard mask pattern on the etched layer; And
And etching the etched layer using the metal hard mask pattern as a mask to form a final pattern. The method according to claim 1,
After forming an etched layer on the semiconductor substrate
Forming a hard mask layer on the etched layer; And
And forming a silicon oxide pattern on the hard mask layer. The method according to claim 2,
Forming the silicon oxide film pattern
Forming a silicon oxide layer on the hard mask layer;
Forming a photoresist pattern on the silicon oxide film; And
And etching the silicon oxide film using the photoresist pattern as a mask. The method according to claim 3,
Forming the photoresist pattern
And a ratio of the width of the photosensitive film pattern to the width therebetween is 1: 3. The method according to claim 3,
Forming the photoresist pattern
Applying a negative photosensitive film on the silicon oxide film; And
And exposing and developing the negative photosensitive film. The method according to claim 2,
Forming the metal hard mask pattern is
Forming a metal hard mask layer on the hard mask layer including the silicon oxide layer pattern;
Performing dry etching on the metal hard mask layer; And
Removing the silicon oxide layer pattern. The method of claim 6,
Forming the metal hard mask layer is
A method of forming a semiconductor device, characterized by using an atomic layer deposition method (ALD). The method of claim 6,
Forming the metal hard mask layer is
A method of forming a semiconductor device, comprising forming Ti, W, Al, Ta, and TaN. The method of claim 6,
Performing the dry etching is
A method of forming a semiconductor device, characterized in that performed using an inert gas plasma. The method according to claim 1,
After forming the final pattern
The method of claim 1, further comprising removing the metal hard mask pattern. The method according to claim 10,
Removing the metal hard mask pattern is
A method of forming a semiconductor device, characterized in that performed using oxygen plasma.
KR1020100088378A 2010-09-09 2010-09-09 Method for forming semiconductor device KR20120026255A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180051707A (en) * 2016-11-07 2018-05-17 삼성전자주식회사 Method of fabricating a semiconductor device
US10937804B2 (en) 2019-07-30 2021-03-02 SK Hynix Inc. Semiconductor memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180051707A (en) * 2016-11-07 2018-05-17 삼성전자주식회사 Method of fabricating a semiconductor device
US10937804B2 (en) 2019-07-30 2021-03-02 SK Hynix Inc. Semiconductor memory device
US11538831B2 (en) 2019-07-30 2022-12-27 SK Hynix Inc. Semiconductor memory device

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