KR20110102630A - Nitride semiconductor light emitting device and manufacturing method of the same - Google Patents

Nitride semiconductor light emitting device and manufacturing method of the same Download PDF

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KR20110102630A
KR20110102630A KR1020100021732A KR20100021732A KR20110102630A KR 20110102630 A KR20110102630 A KR 20110102630A KR 1020100021732 A KR1020100021732 A KR 1020100021732A KR 20100021732 A KR20100021732 A KR 20100021732A KR 20110102630 A KR20110102630 A KR 20110102630A
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layer
forming
light emitting
emitting device
quantum well
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KR1020100021732A
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Korean (ko)
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성한규
손철수
정훈재
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삼성엘이디 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements

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Abstract

The present invention relates to a nitride semiconductor light emitting device capable of improving the light efficiency of the device and a method for manufacturing the same, the nitride semiconductor light emitting device according to an embodiment of the present invention comprises a first conductive semiconductor layer; A pattern layer formed on the first conductivity type semiconductor layer and having a plurality of through holes; Nanowires formed on the first conductive semiconductor layer exposed by the plurality of through holes, respectively, vertically grown from the exposed first conductive semiconductor layer, a metal catalyst layer positioned on an upper surface of the nanowire, and the nanowires; And at least one quantum well layer formed on the surface of each of the metal catalyst layers. A second conductivity type semiconductor layer formed on the surface of the active layer; And first and second electrodes electrically connected to the first and second conductivity-type semiconductor layers, respectively.

Description

Nitride semiconductor light emitting device and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor light emitting device, and more particularly, to a nitride semiconductor light emitting device having improved light efficiency by improving internal quantum efficiency and a method of manufacturing the same.

A light emitting diode (LED) is a semiconductor device capable of generating light of various colors when current is applied, based on recombination of electrons and holes at junctions of p-type and n-type semiconductors. These LEDs have a number of advantages, such as long life, low power, excellent initial driving characteristics and high vibration resistance, compared to filament based light emitting devices, and the demand is continuously increasing. It is used in various applications such as lighting, light source for backlight unit of display.

In most LEDs, when the light emitted by the combination of electrons and holes is extracted out of the crystal from the active region, internal reflection due to the critical angle occurs at the interface such as semiconductor and air, which causes some light to be trapped inside the LED. Light loss occurs. When the amount of light trapped inside the device increases, the light output of the LED is reduced and the light emission characteristics are deteriorated. Therefore, in recent years, as an attempt to use LEDs in high-brightness lighting devices increases, there is a demand for a method for improving light extraction efficiency of LEDs.

In accordance with such a demand, recently, a nanowire-based light emitting device that is a one-dimensional nanostructure and a manufacturing technology thereof have been developed. The nanowire, which is the one-dimensional nanostructure, is a hair-shaped nanomaterial having a large aspect ratio of 5 to 100 nm in diameter and several μm in length. Since these nanowires have new physical and chemical properties due to quantum limitation effects and excellent electrical, optical and magnetic properties, they are recognized as the most promising materials for implementing bottom-up semiconductor nanodevices. . Nanowires are also ideal for high quality device development due to flawless single crystals, free standing properties unaffected by substrates, and ease of device construction. That is, a nanowire-based light emitting device can realize light emission by forming a GaN / InGaN multiple quantum well structure (MQW) using GaN nanowires as an active layer.

However, it is difficult to form GaN nanowires uniformly at desired positions in an actual heterogeneous substrate. As a result, it is difficult to properly control the diameter, length, growth position, and crystal growth direction of the GaN nanowires on the substrate, making it difficult to form a light emitting structure of a desired shape and acting as a defect, thereby increasing driving voltage and deteriorating operation characteristics of the device. do. In particular, in the case of an optoelectronic device, such a defect acts as a recombination center of a carrier, causing a problem of lowering luminous efficiency and shortening the life time of the device.

Therefore, the problem of securing GaN nanowires having a uniform diameter, length and spacing in a large area substrate and growing vertically at a desired position is an important problem to be solved in order to increase the quantum efficiency of the light emitting device.

The present invention is to solve the problems of the prior art as described above, by providing an active layer comprising a nanowire formed in a uniform diameter, length and spacing, to provide a nitride semiconductor light emitting device that can improve the light efficiency The purpose is.

Another object of the present invention is to provide a nitride semiconductor light emitting device capable of improving light emission characteristics and simplifying a manufacturing process by providing a Ti metal layer forming nanowires and spontaneous electrodes.

Another object of the present invention is to provide a method of manufacturing the nitride semiconductor light emitting device.

In order to achieve the above object, an embodiment of the present invention, the first conductive semiconductor layer; A pattern layer formed on the first conductivity type semiconductor layer and having a plurality of through holes; Nanowires formed on the first conductive semiconductor layer exposed by the plurality of through holes, respectively, vertically grown from the exposed first conductive semiconductor layer, a metal catalyst layer positioned on an upper surface of the nanowire, and the nanowires; And at least one quantum well layer formed on the surface of each of the metal catalyst layers. A second conductivity type semiconductor layer formed on the surface of the active layer; And first and second electrodes electrically connected to the first and second conductive semiconductor layers, respectively.

In this case, the metal catalyst layer is at least one metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof, and the metal catalyst layer has a diameter of 10 to 600 nm. The through holes have the same diameter and are formed at equal intervals, and the through holes have a horizontal cross section of any one of a polygon including a circle, a rectangle, and a hexagon.

The nanowire is a quantum barrier layer made of GaN, the quantum well layer is made of InGaN, and the quantum well layer is formed to cover the top and side surfaces of the metal catalyst layer and the side surface of the nanowire. The second conductive semiconductor layer is formed on the entire surface of the quantum well layer, and the second electrode is formed on the upper surface of the second conductive semiconductor layer.

The nitride semiconductor light emitting device may further include an insulating layer formed under the second electrode and filled with an insulating material to fill between the second conductive semiconductor layers, wherein the second electrode is a transparent electrode. The quantum well layer is formed to surround only the side of the nanowire, the second conductivity type semiconductor layer is formed to surround only the side of the quantum well layer, the second electrode is formed on the second conductivity type semiconductor layer It is formed on the upper surface of the pattern layer exposed by

The nitride semiconductor light emitting device may further include an insulating layer formed on an upper surface of the second electrode and filled with an insulating material to fill between the second conductive semiconductor layers, wherein the second electrode is a transparent electrode. The active layer is formed of the same nitride semiconductor layer as the nanowires, and includes a plurality of quantum barrier layers and quantum well layers formed on side and top surfaces of the quantum well layer, and the quantum barrier layer and the quantum well layer alternate with each other. It is formed to have a shell shape.

In addition, the active layer is formed of the same nitride semiconductor layer as the nanowire, and provided with a plurality of quantum barrier layer and the quantum well layer formed so as to surround only the side of the quantum well layer, the quantum barrier layer and the quantum well layer alternate with each other. To be formed, but will be formed only on each side.

The nitride semiconductor light emitting device may further include a Ti metal layer formed between the first conductive semiconductor layer and the pattern layer and having a through hole formed in a region corresponding to the through hole of the pattern layer. The side surface of the through hole of the metal layer is in contact with the outer circumferential surface of the nanowire.

On the other hand, another embodiment of the present invention, forming a first conductive semiconductor layer on the substrate; Forming a pattern layer having a plurality of nano-sized through holes on the first conductive semiconductor layer; Forming a metal catalyst layer on each of the first conductivity type semiconductor layers exposed by the plurality of through holes; Vertically growing a nanowire made of a nitride semiconductor under each of the metal catalyst layers; Forming at least one quantum well layer in contact with a surface of each of the nanowires to form an active layer; Forming a second conductivity type semiconductor layer to cover the surface of the active layer; And forming first and second electrodes to be electrically connected to the first and second conductivity-type semiconductor layers.

In this case, in the forming of the pattern layer, the through holes are formed at the same diameter and at the same interval, and in the forming of the pattern layer, the through holes are any one of a polygon including a circle, a rectangle, and a hexagon. The metal catalyst layer is formed of at least one metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof. In the forming of the metal catalyst layer, the metal catalyst layer is formed to be less than or equal to the thickness of the through hole.

The forming of the nanowires may be performed by a Vapor-Liquid-Solid (VLS) process, and the forming of the nanowires may increase the length of the nanowires by increasing the VSL process time. It is to let.

In the forming of the active layer, the quantum well layer may be formed to cover the top and side surfaces of the metal catalyst layer and the side surface of the nanowire, and the forming of the second conductive semiconductor layer may include forming the quantum well layer. The second conductive semiconductor layer is formed on the entire surface, and the forming of the second electrode is performed by forming the second electrode on the upper surface of the second conductive semiconductor layer.

The method of manufacturing the nitride semiconductor light emitting device may further include forming an insulating layer formed under the second electrode, and filling an insulating material to fill between the second conductive semiconductor layers. The second electrode is a transparent electrode.

The forming of the active layer may be performed by forming the quantum well layer to cover only the side surface of the nanowire, and the forming of the second conductive semiconductor layer may cover only the side surface of the quantum well layer. It is carried out by forming the second conductive semiconductor layer.

The forming of the second electrode may be performed by forming the second electrode on an upper surface of the pattern layer exposed by the second conductivity type semiconductor layer, and the method of manufacturing the nitride semiconductor light emitting device may include It is formed on the upper surface of the second electrode, and further comprising the step of forming an insulating layer by filling an insulating material to fill between the second conductive semiconductor layer, the second electrode is a transparent electrode.

The forming of the active layer may include forming a quantum barrier layer formed of the same nitride semiconductor layer as the nanowire on the side and the top of the at least one quantum well layer; And forming a quantum well layer in a shell shape to cover the quantum barrier layer, and alternately repeating the forming of the quantum barrier layer and the quantum well layer to form an active layer having a multi-quantum well structure. .

The forming of the active layer may include forming a quantum barrier layer formed of the same nitride semiconductor layer as the nanowires so as to surround only at least one side of the at least one quantum well layer; And forming a quantum well layer on the side of the quantum barrier layer, and alternately repeating the forming of the quantum barrier layer and the quantum well layer to form an active layer having a multi-quantum well structure.

The method of manufacturing the nitride semiconductor light emitting device may further include forming a Ti metal layer on the substrate before forming the pattern layer, wherein the Ti metal layer is formed by forming the pattern layer. The plurality of through holes are formed in the nanowires, and the vertical growth of the nanowires is performed such that an outer circumferential surface of the nanowires contacts a side surface of the through hole of the Ti metal layer.

According to the present invention, by having an active layer including nanowires vertically grown at uniform diameters, lengths, and intervals, interference between nanowires can be minimized and light can be emitted to the entire surface of the nanowires. Therefore, the internal quantum efficiency is improved by increasing the emission area, and the light extraction efficiency can be improved by reducing the amount of light due to total internal reflection. Thereby, the light efficiency of a light emitting element can be improved.

Further, according to the present invention, by providing a Ti metal layer patterned to grow nanowires, a spontaneous electrode is formed between the Ti metal layer and the nanowires without bonding by a separate bonding material, whereby the Ti metal layer and the nanowires are formed. The interfacial properties between them, and the resistance due to the bonding and bonding of the material can be minimized. As a result, maximum light emission characteristics can be obtained at a low voltage. And a manufacturing process can be simplified.

1 is a side sectional view showing a structure of a nitride semiconductor light emitting device according to a first embodiment of the present invention.
2 to 8 are side cross-sectional views for each process for describing a process of manufacturing the nitride semiconductor light emitting device shown in FIG. 1.
FIG. 9 is a side cross-sectional view showing another embodiment of the nanowire structure shown in FIG. 6.
Fig. 10 is a side sectional view showing the structure of the nitride semiconductor light emitting device according to the second embodiment of the present invention.
11 to 17 are side cross-sectional views illustrating processes for manufacturing the nitride semiconductor light emitting device illustrated in FIG. 10.
FIG. 18 is a side cross-sectional view showing another embodiment of the nanowire structure shown in FIG. 15.
Fig. 19 is a side sectional view schematically showing the structure of a nitride semiconductor light emitting device according to the third embodiment of the present invention.
20 to 25 are side cross-sectional views illustrating processes for manufacturing the nitride semiconductor light emitting device illustrated in FIG. 19.
Fig. 26 is a side sectional view schematically showing the structure of the nitride semiconductor light emitting device according to the fourth embodiment of the present invention.
FIG. 27 is a plan view schematically illustrating an upper surface of the nitride semiconductor light emitting device illustrated in FIG. 26.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

The nitride semiconductor light emitting device according to the present invention can minimize the integration density of nanowires and the interference between nanowires by forming nanowires vertically grown from a first conductivity type semiconductor layer using a metal catalyst, and thereby internal quantum. The efficiency can be increased. In the present invention, the vertical growth of the nanowires is performed by a vapor-liquid-solid (hereinafter, referred to as 'VLS') method using a metal catalyst and using the free mobility of the metal catalyst.

1 is a side sectional view showing a structure of a nitride semiconductor light emitting device according to a first embodiment of the present invention. Here, the nitride semiconductor light emitting device has an active layer having a plurality of nanowires, but five nanowires are shown for convenience of description, and the structure of each nanowire is the same.

As shown in FIG. 1, the nitride semiconductor light emitting device 100 of the present invention includes a substrate 110, an n-type semiconductor layer 120, a pattern layer 130 having a plurality of through holes, and at least one nanowire ( 150a), at least one quantum well layer 150b, and a p-type semiconductor layer 160. In addition, the insulating layer 170, p-type semiconductor layer 160 and n-type semiconductor layer (filled with an insulating material between the metal catalyst layer 140 and the p-type semiconductor layer 160 formed on the upper surface of the nanowire 150a ( Each of the p-type electrode 180 and the n-type electrode 190 is formed to be electrically connected to the 120. Here, the active layer is a nanowire 150a vertically grown on the n-type semiconductor layer 120 exposed by the plurality of through holes and a shell-shaped quantum well layer formed to surround the nanowire 150a ( 150b).

Specifically, the substrate 110 is a growth substrate for growing semiconductor single crystals, in particular, nitride single crystals, and includes sapphire, Si, ZnO, GaAs, SiC, MgAl 2 O 4 , MgO, LiAlO 2 , LiGaO 2 , A substrate made of a material such as GaN can be used. In this case, the sapphire is a Hexa-Rhombo R3c symmetric crystal and the lattice constants of c-axis and a-direction are 13.001 13. and 4.758Å, respectively, C (0001) plane, A (1120) plane, R 1102 surface and the like. In this case, since the C surface is relatively easy to grow a nitride thin film and stable at high temperature, the C surface may be mainly used as a substrate for growing a nitride semiconductor.

The n-type semiconductor layer 120 and the p-type semiconductor layer 160 are nitride semiconductor layers, and the Al x In y Ga (1-xy) N composition formula (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ n + impurity and p-type impurity having x + y ≦ 1) and the semiconductor material doped with the p-type impurity are representative of GaN, AlGaN, and InGaN. Si, Ge, Se, Te, etc. may be used as the n-type impurity, and Mg, Zn, Be, etc. may be used as the p-type impurity. The n-type and p-type semiconductor layers 120 and 160 may be grown by MOCVD, MBE, HVPE processes and the like known in the art.

The pattern layer 130 is formed on the n-type semiconductor layer 120, and a patterned region, that is, a nano-sized through hole is formed so that the plurality of nanowires 150a maintain a constant size and spacing. The through holes are formed at a constant size and spacing. In addition, the pattern layer 130 prevents the n-type semiconductor layer 120 and the p-type semiconductor layer 160 from coming into contact with each other. In consideration of such a function, the pattern layer 130 is formed using silicon oxide or silicon nitride. For example, it may be SiO2, Si3N4 and the like.

The active layer emits light having a predetermined energy by luminescence recombination of electrons and holes, and the quantum well layer and the quantum barrier layer have In x Ga 1 - x N (0≤x≤) so that the band gap energy is adjusted according to the indium content. It may be made of the material of 1), preferably, the quantum barrier layer is made of GaN, the quantum well layer is made of InGaN. The active layer is composed of a nanowire 150a and a shell-shaped quantum well layer 150b formed to surround the nanowire 150a. The nanowires 150a are vertically grown on the n-type semiconductor layer 120 exposed by the through holes of the pattern layer 130, and the metal catalyst layer 140 is formed on the top surface of the nanowires 150a. have. The nanowires 150a are grown perpendicular to the surface direction of the substrate by using free movement of the metal particles constituting the metal catalyst layer 140, and the growth direction is coincident with the crystal growth direction of the n-type semiconductor layer 120. Is grown. The quantum well layer 150b is formed in a shell shape so as to cover all of the nanowires 150a and the metal catalyst layer 140.

The metal catalyst layer 140 is a metal catalyst that enables the growth of the nanowires 150a and uses a metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and a combination thereof. It can be formed in the through hole using sputtering, evaporation techniques.

The insulating layer 170 is made of an insulating material to fill the gap while exposing the top surface of the p-type semiconductor layer 160, the p-type electrode 180 is a transparent electrode, for example, ITO, ZnO, etc. have. The p-type electrode 180 may be formed on the entire upper surface of the p-type semiconductor layer 160 and the insulating layer 170. In this embodiment, the insulating layer 170 is formed to fill the p-type semiconductor layer 160, but the p-type electrode 180 is formed on the upper surface of the p-type semiconductor layer 160 without forming the insulating layer 170. Can also form only.

As in the present embodiment, as the active layer is formed to include the nanowires, light may be emitted through the entire nanowire, thereby increasing the emission area and forming the p-type semiconductor layer 160 to cover the surface of the active layer. The contact area of the active layer and the p-type semiconductor layer 160, that is, the current injection area, is increased.

A method of manufacturing the nitride semiconductor light emitting device 100 according to the first embodiment of the present invention will be described. 2 to 8 are side cross-sectional views for each process for describing a process of manufacturing the nitride semiconductor light emitting device shown in FIG. 1.

First, as shown in FIG. 2, a flat n-type semiconductor layer 120 is formed on the substrate 110. In this case, the n-type semiconductor layer 120 may be grown by MOCVD, MBE, HVPE process and the like.

Next, as shown in FIG. 3, the pattern layer 130 having a plurality of through-flows is formed on the n-type semiconductor layer 120. The pattern layer 130 may be formed by depositing SiO 2, Si 3 N 4, or the like after forming a mask to form a plurality of through holes on the n-type semiconductor layer 120 in a room temperature environment.

The through hole is a pattern for designating a position of a nanowire to be grown thereafter, and is formed to have a predetermined diameter and a gap, and may have a horizontal cross-sectional shape of one of polygons including a circle, a rectangle, and a hexagon.

Subsequently, as shown in FIG. 4, the metal catalyst layer 140 is formed in each of the plurality of through holes formed in the pattern layer 130. In this case, the metal catalyst layer 140 is a metal catalyst that enables the growth of the nanowires 150a, using a metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof. And may be formed in the through-hole using sputtering and evaporation techniques. Since the metal catalyst layer 140 melts when the temperature is applied thereafter, the volume thereof becomes larger, and thus, the metal catalyst layer 140 may be formed to have a thickness of the through hole, and may have a thickness of 10 to 100 nm, and preferably, a thickness of 50 nm or less. can do.

Then, as shown in FIG. 5, the nitride semiconductors are vertically grown on the n-type semiconductor layer 120 exposed by the plurality of through holes of the pattern layer 130 to form nanowires 150a. The nanowire 150a is formed of a metal catalyst layer 140 formed of an organic compound, preferably TMGa and n-type dopant (preferably Si-based), by a gas-liquid-solid (VLS) method. It may be formed in the shape of a nanowire by moving the material to the interface of the n-type semiconductor layer 120.

Specifically, the structure formed as shown in FIG. 4 is set in a reactor in the MOCVD sheet and heated. By this heating, the metal catalyst layer 140 is melted to change phase into a liquid phase. Then, Ga and N are adsorbed onto the surface of the metal catalyst layer 140 by supplying the GaN crystal-growing growth gases TMGa (trimethyl gallium) and NH 3 (ammonia) by hydrogen or nitrogen carrier gas. do. The adsorbed Ga and N are absorbed into the metal catalyst layer 140 and diffused into the metal catalyst layer 140 to reach the interface between the metal catalyst layer 140 and the n-type semiconductor layer 120. At this time, Ga and N are bonded to each other to form a GaN crystal lattice, thereby growing vertically. In the present embodiment, the nanowires are described as being formed of GaN crystals, but the present invention is not limited thereto, and gallium nitride doped with Ga, Al, In, or the like or a combination thereof may be formed. .

The growth direction of the nanowires grows in accordance with the growth direction of the n-type semiconductor layer 120 by the VLS method, and thus the growth direction of the substrate 110 may determine the growth direction of the nanowires 150a. In addition, the length of the nanowires can be controlled by controlling the reaction time at the growth temperature, in which case the diameter of the nanowires is kept constant. In other words, if the reaction time is increased in the VLS process, nanowires can be grown longer.

Subsequently, as shown in FIG. 6, the quantum well layer 150b and the p-type semiconductor layer 160 are formed to cover the nanowire 150a formed on the upper surface of the metal catalyst layer 140. Here, the active layer is composed of a nanowire 150a and a quantum well layer 150b, but is not limited thereto, and may be implemented as a multi-quantum well structure, which will be described with reference to FIG. 9.

Since the quantum well layer 150b is formed at a temperature of 100 to 300 ° C. lower than the temperature at which the nanowires 150a are formed, the metal catalyst layer 140 is not applied to the VLS method and exists as a solid phase. Therefore, the quantum well layer 150b may be grown to cover all of the nanowires 150a and the metal catalyst layer 140 by MOCVD, MBE, and HVPE processes, but not by the VLS method. Then, the p-type semiconductor layer 160 is formed to completely cover the quantum well layer 150b along the shape of the nanowire, and MOCVD, MBE, and HVPE processes are used. In addition, in the present embodiment, the quantum well layer 150b and the p-type semiconductor layer 160 are described as being formed only on the nanowire 150a, but the present invention is not limited thereto. It may also be formed on layer 130.

Subsequently, as shown in FIG. 7, the insulating layer 170 is formed by filling the p-type semiconductor layer 160 with an insulating material. In this case, the insulating layer 170 is formed so as not to cover the upper surface of the p-type semiconductor layer 160, and serves to support the active layer having the nanowire 150a.

Then, as shown in FIG. 8, the p-type electrode 180 is formed on the upper surface of the p-type semiconductor layer 160 and the insulating layer 170, and the n-type electrode on the n-type semiconductor layer 120. Form 190. Here, the p-type electrode 180 is a transparent electrode, and may be, for example, ITO or ZnO. The n-type electrode 190 is formed on the n-type semiconductor layer 120. As a result, the nitride semiconductor light emitting device 100 according to the first embodiment is finally formed.

In the nitride semiconductor light emitting device 100 manufactured as described above, the crystallinity of the active layer is improved by forming the nanocrystals 150a of the single crystal, whereby the light emission recombination efficiency of electrons and holes is increased, thereby improving light emission efficiency. Can be. In addition, by forming the quantum well layer 150b in a shell shape to cover the nanowires 150a, a wide light emitting area may be secured, thereby improving internal quantum efficiency. In addition, by forming the p-type semiconductor layer 160 to cover the entire surface of the active layer, the contact area of the active layer and the p-type semiconductor layer 160, that is, the current injection area can be increased.

In addition, in the present invention, the diameter and length of the nanowires can be controlled by adjusting the diameter of the through hole A and the reaction time of the VLS process, and thus the nanowires can be formed to have a uniform diameter and length at a desired position. As a result, the integration density and the mutual interference of the nanowires can be minimized, and the light emission efficiency can be improved.

FIG. 9 is a side cross-sectional view showing another embodiment of the nanowire structure shown in FIG. 6. Here, since the basic configuration is the same as that of the nitride semiconductor light emitting device shown in FIG. 6, detailed descriptions of the same components will be omitted.

As shown in FIG. 9, the active layer 150 ′ is formed of the same nitride semiconductor layer as the nanowire 150a, and has a quantum barrier layer 150a ′ and a quantum barrier layer 150 formed to cover the quantum well layer 150b. The well layer 150b may be formed of an alternating multi-quantum well structure. In this case, the quantum barrier layer and the quantum well layer except for the nanowire 150a may be formed in a shell shape, and the metal catalyst layer 140 may be formed. It is formed on the upper surface of the silver nanowire 150a and is included in the quantum well layer 150b. This is because the quantum well layer 150b is not applied to the VLS method as it is formed at a temperature lower than the temperature at which the nanowires 150a are formed.

In the present embodiment, the nanowires 150a may be formed of Ga, Al, In, or the like, or gallium nitride doped with a material in combination thereof. Therefore, the active layer 150 ′ of the multi-quantum well structure may have a structure in which gallium nitride (GaN) / indium gallium nitride (InGaN) is repeatedly formed, and aluminum gallium nitride (AlGaN) / gallium nitride (GaN) is repeatedly formed. Can be.

Fig. 10 is a side sectional view showing the structure of the nitride semiconductor light emitting device according to the second embodiment of the present invention. Here, the nitride semiconductor light emitting element shown in FIG. 10 is substantially the same in structure as the nitride semiconductor light emitting element of the first embodiment shown in FIG. However, since there is a difference in that the quantum well layer 250b and the p-type semiconductor layer 260 are formed only on the side surface of the nanowire 250a, the description of the same components will be omitted and only different configurations will be described.

As illustrated in FIG. 10, the nitride semiconductor light emitting device 200 of the present invention may include a substrate 210, an n-type semiconductor layer 220, a pattern layer 230 having a plurality of through holes, a nanowire 250a, A quantum well layer 250b and a p-type semiconductor layer 260 are formed. The p-type electrode 280 and the n-type electrode 290 formed to be electrically connected to the metal catalyst layer 240, the p-type semiconductor layer 260, and the n-type semiconductor layer 220 formed on the nanowire 250a, respectively. ), and filling the p-type semiconductor layer 260 with an insulating layer 270 formed on the p-type electrode 280. Here, the active layer is a nanowire 250a vertically grown on the n-type semiconductor layer 220 exposed by the plurality of through holes, and a quantum well layer 250b formed to surround only the side surface of the nanowire 150a. Is done.

The nanowires 250a have a nanowire shape vertically grown on the n-type semiconductor layer 220 exposed by the plurality of through holes formed in the pattern layer 230, and the metal catalyst layer (on the nanowires 250a) is formed on the nanowires 250a. 240 is formed, and is grown perpendicular to the plane direction of the substrate by the free movement of the metal particles constituting the metal catalyst layer 240, the growth direction coincides with the crystal growth direction of the n-type semiconductor layer 220 Is grown. The quantum well layer 150a is formed on the surface of the nanowire 150a. In this case, unlike the nitride semiconductor light emitting device 100 according to the first embodiment illustrated in FIG. 1, the nitride semiconductor according to the second embodiment is provided. The light emitting device 200 is formed such that the quantum well layer 250b does not cover the metal catalyst layer 240 and covers only the side surface of the nanowire 250a. The p-type semiconductor layer 260 also includes the quantum well layer 250b. It is formed so as to surround only the side.

In this structure, the p-type electrode 280 is formed on the pattern layer 230 exposed between the p-type semiconductor layers 260, and the insulating layer 270 is formed between the p-type semiconductor layers 260. While filling the p-type electrode 280, the upper surface is formed to form the same plane as the quantum well layer 250b and the p-type semiconductor layer 260. However, the present invention is not limited thereto, and the insulating layer 270 may be formed to cover the metal catalyst layer 260.

As in the present embodiment, as the active layer is formed to include nanowires, the emission area may be increased, and the p-type semiconductor layer 260 is formed to cover the surface of the active layer, thereby forming the active layer and the p-type semiconductor layer 260. The contact area of ie, the current injection area can be increased.

A method of manufacturing the nitride semiconductor light emitting device 200 according to the second embodiment of the present invention will be described. 11 to 17 are side cross-sectional views illustrating processes for manufacturing the nitride semiconductor light emitting device illustrated in FIG. 10.

First, as shown in FIG. 11, a flat n-type semiconductor layer 220 is formed on the substrate 210. In this case, the n-type semiconductor layer 220 may be grown by MOCVD, MBE, HVPE process and the like.

Next, as shown in FIG. 12, a pattern layer 230 having a plurality of through flows A is formed on the n-type semiconductor layer 220. The pattern layer 230 may be formed by depositing SiO 2, Si 3 N 4, or the like after forming a mask for forming a through hole on the n-type semiconductor layer 220 in a room temperature environment.

Here, the through hole is a pattern for designating the position of the nanowire to be grown thereafter, and is formed to have a predetermined diameter and a gap, and may be formed to have a horizontal cross-sectional shape of one of polygons including a circle, a rectangle, and a hexagon.

Subsequently, as illustrated in FIG. 13, metal catalyst layers 240 are formed in the plurality of through holes formed in the pattern layer 230, respectively. In this case, the metal catalyst layer 240 is a metal catalyst that enables the growth of the nanowires 250a and includes at least one metal selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof. An element is used and can be formed in the through hole using sputtering, evaporation techniques. Since the metal catalyst layer 240 is melted when the temperature is applied thereafter, its volume is increased, it is formed below the thickness of the through hole, and may have a thickness of 10 to 100 nm, preferably formed to a thickness of 50 nm or less. can do.

Then, as shown in FIG. 14, the nitride semiconductor layer is vertically grown on the n-type semiconductor layer 220 exposed by the plurality of through holes of the pattern layer 230 to form the nanowire 250a. . The nanowire 250a is formed of an organic compound, preferably TMGa, and an n-type dopant (preferably Si-based) metal catalyst layer 240 by a gas-liquid-solid (VLS) method. By moving the material to the interface of the n-type semiconductor layer 220 may be formed in the shape of a nanowire.

Specifically, the structure formed as shown in FIG. 13 is set in a reactor in a MOCVD sheet and heated. By this heating, the metal catalyst layer 240 is melted to change phase into a liquid phase. Then, Ga and N are adsorbed onto the surface of the metal catalyst layer 240 when TMGa (trimethyl gallium) and NH 3 (ammonia), which are growth gases of GaN crystals, are supplied into the reactor by a carrier gas of hydrogen or nitrogen. do. The adsorbed Ga and N are absorbed into the metal catalyst layer 240 and diffused into the metal catalyst layer 240 to reach the interface between the metal catalyst layer 240 and the n-type semiconductor layer 220. In this case, Ga and N combine with each other to form a GaN crystal lattice, and vertically grow on the n-type semiconductor layer 220. In the present embodiment, the nanowires are described as being formed of GaN crystals. However, the present invention is not limited thereto, and Ga, Al, and In may be used alone, or may be formed of gallium nitride doped with a combination thereof. .

The growth direction of the nanowires grows in accordance with the growth direction of the n-type semiconductor layer 220 by the VLS method, and thus the growth direction of the substrate 210 may determine the growth direction of the nanowires 250a. In addition, the length of the nanowires can be controlled by controlling the reaction time at the growth temperature, in which case the diameter of the nanowires is kept constant. That is, as the reaction time increases, the nanowires can be grown longer.

Subsequently, as shown in FIG. 15, the quantum well layer 250b and the p-type semiconductor layer 260 are formed to surround the side surface of the nanowire 250a of the nanowire formed on the upper surface of the metal catalyst layer 240. Here, the active layer is a structure consisting of the nanowire 150a and the quantum well layer 150b, but is not limited thereto, and may be implemented as a multi-quantum well structure, which will be described with reference to FIG. 19.

Since the quantum well layer 250b is formed at a temperature of 100 to 300 ° C. lower than the temperature at which the nanowires 250a are formed, the metal catalyst layer 240 is not applied to the VLS method and exists as a solid phase. Therefore, the quantum well layer 250b may be grown to cover only the side surface of the nanowire 250a by MOCVD, MBE, HVPE, or the like, rather than the VLS method. Then, the p-type semiconductor layer 260 is also formed to surround only the side of the quantum well layer 150b. At this time, the metal catalyst layer 240 is exposed to the outside.

Next, as illustrated in FIG. 16, the p-type electrode 280 is formed on the pattern layer 230 exposed between the p-type semiconductor layer 260. Here, the p-type electrode 180 is a transparent electrode, and may be, for example, ITO or ZnO. The insulating layer 270 is formed by filling the nanowire structures with an insulating material. In this case, the insulating layer 270 is formed not to cover the upper surface of the p-type semiconductor layer 160, and serves to support the active layer having a nanowire.

Next, as shown in FIG. 17, an n-type electrode 290 is formed on the n-type semiconductor layer 220. That is, the n-type electrode 290 is formed on the n-type semiconductor layer 220. As a result, the nitride semiconductor light emitting device 200 according to the second embodiment is finally formed.

In the nitride semiconductor light emitting device 200 manufactured as described above, the crystallinity of the active layer is improved by forming the nanocrystals 250a of the single crystal, whereby the light emission recombination efficiency of electrons and holes is increased, thereby improving light emission efficiency. Can be. In addition, by forming the quantum well layer 250b to surround the side surface of the nanowire 250a, a wide light emitting area may be secured, thereby improving internal quantum efficiency. In addition, by forming the p-type semiconductor layer 260 to completely cover the surface of the active layer, the contact area of the active layer and the p-type semiconductor layer 260, that is, the current injection area can be increased. In addition, the present invention can control the diameter and length of the nanowires by adjusting the diameter and reaction time of the through-holes, it is possible to form a nanowire with a uniform diameter and length in a desired position. As a result, the mutual interference of the nanowires can be minimized, and the light emission efficiency can be improved.

FIG. 18 is a side cross-sectional view showing another embodiment of the nanowire structure shown in FIG. 15. Here, since the basic configuration is the same as that of the nitride semiconductor light emitting device illustrated in FIG. 15, detailed descriptions of the same components will be omitted.

As shown in FIG. 18, the active layer 250 'is formed of the same nitride semiconductor layer as the nanowire 250a, and the quantum well layer 250b' and the quantum barrier are formed to surround only the side surfaces of the nanowire 250a. The layer 250b ′ may have a multi-quantum well structure in which alternating layers are formed. Here, the nanowire 250a may be formed of Ga, Al, In, or the like, or gallium nitride doped with a material in combination thereof. have. Accordingly, the multi-quantum well structure may be a structure in which gallium nitride (GaN) / indium gallium nitride (InGaN) is repeatedly formed and aluminum gallium nitride (AlGaN) / gallium nitride (GaN) is repeatedly formed.

At this time, each of the quantum well layer 250b 'and the quantum barrier layer 250a' except for the nanowire 250a is formed in a cylindrical shape to surround the side, and the metal catalyst layer 240 is exposed to the outside. This is because the quantum well layer 250b 'is not applied to the VLS method as the quantum well layer 250b' is formed at a temperature lower than the temperature at which the nanowires 250a are formed.

As such, the present invention can grow the nanowires by using a metal catalyst, thereby keeping the diameter of the nanowires constant, and can easily control the length of the nanowires by controlling the reaction time of the VLS process. Therefore, by forming the nanowires to have a uniform diameter, length and spacing, it is possible to improve the light efficiency of the light emitting device.

Fig. 19 is a side sectional view schematically showing the structure of a nitride semiconductor light emitting device according to the third embodiment of the present invention. Here, the nitride semiconductor light emitting device shown in FIG. 19 is substantially the same in structure as the nitride semiconductor light emitting device according to the first embodiment shown in FIG. However, since there is a difference in that the Ti metal layer is further provided between the n-type semiconductor layer and the pattern layer, the description of the same configuration is omitted, and only the different configuration will be described.

As shown in FIG. 19, the nitride semiconductor light emitting device 300 according to the third embodiment includes a substrate 310, an n-type semiconductor layer 320, a Ti metal layer 325 having a plurality of through holes, and a pattern layer. 330, at least one nanowire 350a and at least one quantum well layer 350b are formed of an active layer and a p-type semiconductor layer 360 alternately stacked. The metal catalyst layer 340 formed on the upper surface of the nanowire 350a, the transparent conductive layer 370 filled between the p-type semiconductor layers 360, the transparent conductive layer 370, and the n-type semiconductor layer 320 And p-type electrode 380 and n-type electrode 390 respectively formed to be electrically connected to each other. The plurality of through holes are formed in the Ti metal layer 325 and the pattern layer 330 at regular sizes and intervals.

In the present embodiment, unlike the nitride semiconductor light emitting device 100 shown in FIG. 1, the Ti metal layer 325 formed between the n-type semiconductor layer 320 and the pattern layer 330 is further provided. The Ti metal layer 325 serves as a metal electrode for supplying current to the active layer, and has a structure in contact with the outer circumferential surface of the nanowire 350a, thereby improving current dispersion, and also providing current to each of the plurality of nanowires. Injection efficiency can be increased. Here, Ti is a metal that does not affect nanowire growth, and may form an ohmic contact with the n-type semiconductor layer 320. In addition, the Ti metal layer 325 is patterned to have a plurality of through holes. As the nano wires 350a grow in the through holes, the Ti metal layer 325 contacts the side surfaces of the nano wires 350a, thereby improving current dispersion and current injection efficiency. Can be improved.

Hereinafter, a method of manufacturing the nitride semiconductor light emitting device 300 according to the third embodiment of the present invention will be described. 20 to 25 are side cross-sectional views illustrating processes for manufacturing the nitride semiconductor light emitting device illustrated in FIG. 19.

First, as shown in FIG. 20, a substrate 310 is provided in a chamber, and the temperature in the chamber is raised to 700 to 1050 ° C. (preferably 900 to 1000 ° C.), and then an n-type semiconductor is placed on the substrate 310. The layer 320, the Ti metal layer 325, and the pattern layer 330 are sequentially formed. That is, after the n-type semiconductor layer 310 is grown on the substrate 310, Ti is deposited to a thickness of 2 to 100 nm to form the Ti metal layer 325. The pattern layer 330 is formed on the Ti metal layer 325 using silicon oxide or silicon nitride, for example, SiO 2 or Si 3 N 4.

Next, as shown in FIG. 21, a plurality of through holes having a predetermined size and a gap are formed in the Ti metal layer 325 and the pattern layer 330, and the plurality of through holes of the n-type semiconductor layer 320 are formed. Some areas are exposed.

Then, as shown in FIG. 22, a metal catalyst layer 340 is formed in each of the plurality of through holes formed in the Ti metal layer 325 and the pattern layer 330. In this case, the metal catalyst layer 340 is a metal catalyst that enables the growth of the nanowires 350a in a subsequent process, and selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof. Elements can be used and formed in the through-holes using sputtering, evaporation techniques. Since the metal catalyst layer 340 is melted when the temperature is applied thereafter, the volume thereof becomes large, and thus, the metal catalyst layer 340 is formed to have a thickness of 10 to 100 nm or less, preferably formed to a thickness of 50 nm or less. can do.

Subsequently, as shown in FIG. 23, the nanowires 350a are formed by vertically growing a nitride semiconductor through the metal catalyst layer 340 on the n-type semiconductor layer 320 exposed by the plurality of through holes. . The nanowire 350a is formed of a metal catalyst layer 340 formed of an organic compound, preferably TMGa and n-type dopant (preferably Si-based), by a gas-liquid-solid (VLS) method. By moving the material to the interface of the n-type semiconductor layer 320 may be formed in the shape of a nanowire. By forming an electrode structure in which the outer circumferential surface of the nanowires 350a grown as described above is surrounded by the Ti metal layer 325, a conduction channel may be formed along the outer circumferential surface of the nanowires 350a, thereby forming an active layer of the light emitting device. This can reduce the current consumption at the shell surface.

Specifically, the growth process of the nanowire 350a will be described. Here, it is assumed that the nanowire 350a is made of GaN, and the metal catalyst layer 340 uses nickel (Ni). The Ga-N source activated by the temperature in the chamber is attached to the surface of the metal catalyst layer 340 in the patterned region. Nickel particles located on the surface of the metal catalyst layer 340 are activated by high temperature to move freely, move in an elliptical shape, and function as nuclei of Ga-Ni. Accordingly, GaN grows on the surface of the metal catalyst layer 340 in a direction perpendicular to the surface of the metal catalyst layer 340. The grown GaN has a nanowire shape, for example, a rod. In this case, the GaN nanowires 350a grown at high temperature and the Ti metal layer 325 form ohmic contacts with the GaN nanowires 350a grown at the circumferential surface of the through hole of the Ti metal layer 325. Since the circumferential line of the nanowire 350a made of GaN and the Ti metal layer 325 are not bonded by a separate bonding material but are grown in a rod shape at the periphery of the through hole of the Ti metal layer 325, the interface characteristics between the two are Very good, which can reduce the resistance caused by bonding and bonding of dissimilar materials. In addition, since the GaN nanowires 350a are formed by growing on the circumferential surface of the through-hole of the Ti metal layer 325, a separate bonding process for bonding the nanowires 350a and the Ti metal layer 325 may be omitted. The process can be simplified.

Next, as shown in FIG. 24, the quantum well layer 350b and the p-type semiconductor layer 360 are formed so that the metal catalyst layer 340 covers the nanowire 350a formed on the upper surface. Here, the active layer is a structure consisting of a nanowire (350a) and the quantum well layer (350b), but is not limited to this, it may be implemented in a multi-quantum well structure, as shown in Figure 9, 10 and 18 As illustrated, the quantum well layer and the p-type semiconductor layer may be formed to surround only the side surfaces of the nanowires.

For example, as illustrated in FIG. 25, the transparent conductive layer 370 is formed to cover the nanowire structures including the active layer having the nanowires 350a and the p-type semiconductor layer 360. The transparent conductive layer 370 may be ITO, ZnO, or the like. The transparent conductive layer 370 serves to support the nanowire structure together with an electrode for injecting current into the nanowire structure. The p-type electrode 380 is formed on the upper surface of the transparent conductive layer 370, and the n-type electrode 390 is formed on the Ti metal layer 325. As a result, the nitride semiconductor light emitting device 300 according to the third embodiment is finally formed.

FIG. 26 is a side sectional view schematically showing the structure of the nitride semiconductor light emitting device according to the fourth embodiment of the present invention, and FIG. 27 is a plan view schematically showing the top surface of the nitride semiconductor light emitting device shown in FIG. Here, the structure of the nitride semiconductor light emitting element shown in FIG. 26 is substantially the same as that of the nitride semiconductor light emitting element 300 of the third embodiment shown in FIG. However, since there is a difference in that the n-type electrode is formed along the side edge of the device, the description of the same components will be omitted, and only different configurations will be described.

26 and 27, the nitride semiconductor light emitting device 400 of the fourth embodiment of the present invention includes a quantum well layer 450b and a p-type semiconductor formed to cover the nanowire 450a and the metal catalyst layer 440. A plurality of nanowire structures including a layer 460 are provided, and a transparent conductive layer 470 is formed to cover the plurality of nanowire structures. The n-type electrode 490 is formed on the Ti metal layer 425 along the side surface of the transparent conductive layer 470 while being spaced apart from the transparent conductive layer 470.

As described above, in the nitride semiconductor light emitting devices of the third and fourth embodiments of the present invention, the Ti metal layer is patterned before the nanowire growth, and the nanowires are vertically grown in the through holes of the patterned Ti metal layer. A spontaneous electrode is formed between the Ti metal layer and the nanowires without bonding by the bonding material, thereby minimizing the interface characteristics between the Ti metal layer and the nanowires, and the resistance due to the bonding and bonding of the material. Therefore, maximum light emission characteristics can be obtained at low voltage.

The present invention is not limited by the above-described embodiment and the accompanying drawings, but by the appended claims. Therefore, it will be apparent to those skilled in the art that various forms of substitution, modification, and alteration are possible without departing from the technical spirit of the present invention described in the claims, and the appended claims. Will belong to the technical spirit described in.

110 substrate 120 n-type semiconductor layer
130: pattern layer 140: metal catalyst layer
150a: nanowire 150b: quantum well layer
160: p-type semiconductor layer 170: insulating layer
180: p-type electrode 190: n-type electrode

Claims (40)

A first conductive semiconductor layer;
A pattern layer formed on the first conductivity type semiconductor layer and having a plurality of through holes;
Nanowires formed on the first conductive semiconductor layer exposed by the plurality of through holes, respectively, vertically grown from the exposed first conductive semiconductor layer, a metal catalyst layer positioned on an upper surface of the nanowire, and the nanowires; And at least one quantum well layer formed on the surface of each of the metal catalyst layers.
A second conductivity type semiconductor layer formed on the surface of the active layer; And
And first and second electrodes electrically connected to the first and second conductive semiconductor layers, respectively.
The method of claim 1,
The metal catalyst layer is at least one metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn, and combinations thereof.
The method of claim 1,
The metal catalyst layer is a nitride semiconductor light emitting device, characterized in that having a diameter of 10 ~ 600nm.
The method of claim 1,
The through hole has the same diameter, and formed in the same interval nitride semiconductor light emitting device.
The method of claim 1
The through hole has a horizontal cross-section of any one of a polygon including a circle, a square and a hexagon.
The method of claim 1,
The nanowire is a quantum barrier layer made of GaN, the quantum well layer is nitride semiconductor light emitting device, characterized in that made of InGaN. The method of claim 1,
The quantum well layer is nitride semiconductor light emitting device, characterized in that formed to cover the upper surface and the side of the metal catalyst layer, and the side of the nanowire.
The method of claim 7, wherein
The second conductive semiconductor layer is formed on the front surface of the quantum well layer, the second electrode is a nitride semiconductor light emitting device, characterized in that formed on the upper surface of the second conductive semiconductor layer.
The method of claim 8,
The nitride semiconductor light emitting device of claim 2, further comprising an insulating layer formed under the second electrode and filled with an insulating material to fill between the second conductive semiconductor layers.
The method according to claim 1 or 8,
The second electrode is a nitride semiconductor light emitting device, characterized in that the transparent electrode.
The method of claim 1,
The quantum well layer is formed so as to surround only the side of the nanowire, the second conductive semiconductor layer is nitride semiconductor light emitting device, characterized in that formed to cover only the side of the quantum well layer.
The method of claim 11,
And the second electrode is formed on an upper surface of the pattern layer exposed by the second conductivity type semiconductor layer.
The method of claim 12,
And an insulating layer formed on an upper surface of the second electrode and filled with an insulating material to fill the gap between the second conductivity-type semiconductor layers.
The method of claim 12,
The second electrode is a nitride semiconductor light emitting device, characterized in that the transparent electrode.
The method of claim 7, wherein
The active layer is formed of the same nitride semiconductor layer as the nanowire, and includes a plurality of quantum barrier layers and quantum well layers formed on side and top surfaces of the quantum well layer, and the quantum barrier layer and the quantum well layer are alternately formed. A nitride semiconductor light emitting device characterized by having a shell shape.
The method of claim 11,
The active layer is formed of the same nitride semiconductor layer as the nanowire, and includes a plurality of quantum barrier layers and quantum well layers formed to cover only the side surfaces of the quantum well layers, and the quantum barrier layers and the quantum well layers are alternately formed. The nitride semiconductor light emitting device, characterized in that formed on each side only.
The method of claim 1,
And a Ti metal layer formed between the first conductivity type semiconductor layer and the pattern layer and having a through hole formed in a region corresponding to the through hole of the pattern layer.
According to claim 17,
The side surface of the through hole of the Ti metal layer is in contact with the outer peripheral surface of the nanowires nitride semiconductor light emitting device.
Forming a first conductivity type semiconductor layer on the substrate;
Forming a pattern layer having a plurality of nano-sized through holes on the first conductive semiconductor layer;
Forming a metal catalyst layer on each of the first conductivity type semiconductor layers exposed by the plurality of through holes;
Vertically growing a nanowire made of a nitride semiconductor under each of the metal catalyst layers;
Forming at least one quantum well layer in contact with a surface of each of the nanowires to form an active layer;
Forming a second conductivity type semiconductor layer to cover the surface of the active layer; And
And forming first and second electrodes to be electrically connected to the first and second conductivity-type semiconductor layers.
The method of claim 19,
In the forming of the pattern layer, the through hole is a method of manufacturing a nitride semiconductor light emitting device, characterized in that formed with the same diameter and the same interval.
The method of claim 19
In the forming of the pattern layer, the through hole is a method of manufacturing a nitride semiconductor light emitting device, characterized in that it has a horizontal cross-section of any one of a polygon including a circle, a square and a hexagon.
The method of claim 19,
In the forming of the metal catalyst layer, the metal catalyst layer is formed of at least one metal element selected from the group consisting of Ni, Pt, Au, Cr, Fe, Co, Mn and combinations thereof. Manufacturing method.
The method of claim 19,
In the forming of the metal catalyst layer, the metal catalyst layer is a method of manufacturing a nitride semiconductor light emitting device, characterized in that formed below the thickness of the through hole.
The method of claim 19,
The forming of the nanowires, the method of manufacturing a nitride semiconductor light emitting device, characterized in that carried out by a V-S (Vapor-Liquid-Solid, VLS) process.
25. The method of claim 24,
In the forming of the nanowires, the length of the nanowires is increased by increasing the VLS process time.
The method of claim 19,
In the forming of the active layer, the quantum well layer is a method of manufacturing a nitride semiconductor light emitting device, characterized in that formed to cover the upper surface and the side of the metal catalyst layer, and the side of the nanowire.
The method of claim 26,
The forming of the second conductive semiconductor layer is performed by forming the second conductive semiconductor layer on the entire surface of the quantum well layer.
The method of claim 27,
The forming of the second electrode is performed by forming the second electrode on the upper surface of the second conductive semiconductor layer.
The method of claim 28,
A method of manufacturing a nitride semiconductor light emitting device, the method comprising: forming an insulating layer formed under the second electrode, and filling an insulating material to fill between the second conductive semiconductor layers.
The method of claim 19 or 28,
The second electrode is a manufacturing method of the nitride semiconductor light emitting device, characterized in that the transparent electrode.
The method of claim 19,
The forming of the active layer is performed by forming the quantum well layer so as to surround only the side surface of the nanowires.
32. The method of claim 31,
The forming of the second conductive semiconductor layer is performed by forming the second conductive semiconductor layer so as to surround only the side surface of the quantum well layer.
33. The method of claim 32,
The forming of the second electrode may be performed by forming the second electrode on an upper surface of the pattern layer exposed by the second conductivity-type semiconductor layer.
The method of claim 33, wherein
A method of manufacturing a nitride semiconductor light emitting device, the method comprising: forming an insulating layer formed on an upper surface of the second electrode, and filling an insulating material to fill between the second conductive semiconductor layers.
The method of claim 33, wherein
The second electrode is a manufacturing method of the nitride semiconductor light emitting device, characterized in that the transparent electrode.
The method of claim 26,
The forming of the active layer may include forming a quantum barrier layer formed of the same nitride semiconductor layer as the nanowires on side and top surfaces of the at least one quantum well layer; And
And forming a quantum well layer in a shell shape so as to cover the quantum barrier layer, and alternately repeating the forming of the quantum barrier layer and the quantum well layer to form an active layer having a multi-quantum well structure. A method of manufacturing a nitride semiconductor light emitting device.
32. The method of claim 31,
The forming of the active layer may include forming a quantum barrier layer formed of the same nitride semiconductor layer as the nanowires so as to surround only at least one side of the at least one quantum well layer; And
And forming a quantum well layer on the side of the quantum barrier layer, and repeatedly forming the quantum barrier layer and the quantum well layer alternately to form an active layer having a multi-quantum well structure. Method of manufacturing a semiconductor light emitting device.
The method of claim 19,
Before forming the patterned layer, forming a Ti metal layer on the substrate.
The method of claim 38,
And forming the plurality of through holes in the Ti metal layer by forming the pattern layer.
The method of claim 39,
The vertical growth of the nanowires may be performed such that the outer circumferential surface of the nanowires contacts the side surfaces of the through holes of the Ti metal layer.
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CN105280773A (en) * 2014-07-21 2016-01-27 三星电子株式会社 Semiconductor light emitting device
KR20160136070A (en) * 2015-05-19 2016-11-29 엘지이노텍 주식회사 Light emitting device
WO2023033427A1 (en) * 2021-09-01 2023-03-09 삼성디스플레이 주식회사 Light-emitting element and display device comprising same

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