KR20110101405A - Method for forming pattern of the semiconductor device - Google Patents

Method for forming pattern of the semiconductor device Download PDF

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Publication number
KR20110101405A
KR20110101405A KR1020100020383A KR20100020383A KR20110101405A KR 20110101405 A KR20110101405 A KR 20110101405A KR 1020100020383 A KR1020100020383 A KR 1020100020383A KR 20100020383 A KR20100020383 A KR 20100020383A KR 20110101405 A KR20110101405 A KR 20110101405A
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KR
South Korea
Prior art keywords
pattern
exposure
photosensitive film
exposure process
exposure mask
Prior art date
Application number
KR1020100020383A
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Korean (ko)
Inventor
이정형
Original Assignee
주식회사 하이닉스반도체
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Publication date
Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020100020383A priority Critical patent/KR20110101405A/en
Publication of KR20110101405A publication Critical patent/KR20110101405A/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2022Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70466Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

The present invention relates to a method of forming a pattern of a semiconductor device, and discloses a technique of forming a hole pattern of 40 nm or less by performing a negative type double exposure process.
In the method of forming a pattern of a semiconductor device according to the present invention, forming an etched layer and a photoresist film on a semiconductor substrate, and performing a first exposure process on the photoresist film using an exposure mask to form an unexposed first region. Moving the exposure mask to perform a second exposure process on the photosensitive film to form an unexposed second region, and developing the first photosensitive film and the second region on the photosensitive film. And forming a photosensitive film pattern on the overlapping portion.

Description

METHODS FOR FORMING PATTERN OF THE SEMICONDUCTOR DEVICE

The present invention relates to a method of forming a pattern of a semiconductor device. In particular, it relates to a double exposure process.

Recently, since semiconductor devices are required to operate at a high speed and have a large storage capacity, developments have been made to improve electrical characteristics that enable a large amount of data to be processed quickly.

In particular, as the degree of integration increases, the design rule is reduced, so that the technology for implementing the pattern has been variously developed. For this purpose, the wavelength of the exposure source for implementing the pattern is gradually shortened.

However, the critical dimension of the pattern currently under development is required to be 40 nm or less, and since it is very difficult to form a pattern satisfying such a condition, it is almost impossible to form a pattern using one exposure mask as before.

Therefore, we are developing technologies for implementing a desired pattern using two or three exposure masks, which are conventionally patterned with one exposure mask, and for this purpose, double patterning technology (hereinafter referred to as 'DPT'), Spacer patterning technology and the like have been proposed, but there is a limit in making a hole pattern of 40 nm or less using this.

An object of the present invention is to form a pattern having a fine line width by performing a negative type double exposure process.

In the method of forming a pattern of a semiconductor device according to the present invention, forming an etched layer and a photoresist film on a semiconductor substrate, and performing a first exposure process on the photoresist film using an exposure mask to form an unexposed first region. Moving the exposure mask to perform a second exposure process on the photosensitive film to form an unexposed second region, and developing the first photosensitive film and the second region on the photosensitive film. Forming a photosensitive film pattern by superimposing the.

Here, the photosensitive film may be a positive or negative photosensitive film. The exposure mask may include a plurality of light blocking patterns, and the light blocking patterns may have a rectangular shape. The light blocking patterns are spaced apart by one third of the light blocking pattern line width.

Preferably, the secondary exposure process is performed by moving the exposure mask along the X and Y axes, and more preferably, moves the exposure mask by 2/3 of the light shielding pattern line width.

In the method of forming a pattern of a semiconductor device according to the present invention, a negative pattern double exposure process may be performed to form a hole pattern of 40 nm or less.

1A and 1B are cross-sectional views illustrating positive and negative exposure methods.
2 is a layout showing an exposure mask according to the present invention;
3A to 3C are plan views illustrating a method of forming a pattern of a semiconductor device according to the present invention.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

1A and 1B are cross-sectional views illustrating a positive type exposure process and a negative type exposure process.

Referring to FIG. 1A, a positive type exposure process is illustrated. An exposure process is performed using an exposure mask 150 on a semiconductor substrate 100 to which a photosensitive film (not shown) is applied. In this case, it may be seen that light is blocked by the light shielding pattern 155 included in the exposure mask 150, so that the unexposed area that is not exposed is left as the pattern 105.

Referring to FIG. 1B, a negative type exposure process is illustrated. An exposure process is performed using an exposure mask 150 on a semiconductor substrate 100 to which a photosensitive film (not shown) is applied. In this case, it can be seen that light is blocked by the light shielding pattern 155 included in the exposure mask 150 to remove the non-exposed areas that are not exposed. That is, the exposed area is left in the pattern 105.

2 shows a layout of an exposure mask according to the present invention.

Referring to FIG. 2, the exposure mask 200 includes a plurality of rectangular light blocking patterns 210. Here, the light shielding pattern 210 is formed in a square shape, more preferably in a square shape.

Each of the light blocking patterns 200 has a line width of 'W', and each of the light blocking patterns 200 is spaced apart by '1 / 3W'. In this case, the above-described layout may be changed and may be applied to an exposure process after OPC (Optical Proximity Correcrtion).

3A to 3C are plan views illustrating a pattern formation method of a negative tone double exposure process using the exposure mask of FIG. 2 described above. Here, the negative type double exposure is an exposure method having the feature that the non-exposed areas that have never been exposed are removed.

Referring to FIG. 3A, an etched layer (not shown) is formed on a semiconductor substrate (not shown), and a photosensitive film 300 is coated on the etched layer (not shown). Here, the photosensitive film 300 may use a positive photosensitive film (Positive PR) or a negative photosensitive film (Negative PR). Since the negative type exposure process can be performed according to the kind of developing solution in a subsequent process, you may use what kind of photosensitive film. For example, in the case of using a positive photoresist film, it is possible to use a supernatant and a rinse liquid to remove the unlighted portion.

Then, the first exposure process is performed on the photosensitive film 300 using the above-described exposure mask of FIG. 2. In this case, the light corresponding to the light blocking pattern 210 of FIG. 2 does not transmit light, and the light corresponding to the light transmitting area between the light blocking patterns 210 of FIG. 2 transmits light. Here, a portion where light is not transmitted is defined as the first non-exposed area 300a.

3B and 3C, the second exposure process is performed on the photosensitive film 300 on which the first exposure process is performed. In this case, a portion where light is not transmitted is defined as the second non-exposed area 300b.

The above-described secondary exposure process uses an exposure mask used in the primary exposure process without replacing the exposure mask, but it is preferable to move the exposure mask by a certain distance. In this case, the second exposure process is preferably moved in the X and Y directions by '2 / 3W' of the light shielding pattern (210 in FIG. 2). That is, it shifts by 1/2 pitch of the light shielding pattern (210 of FIG. 2). As such, by using the first and second exposure processes as one exposure mask, an overlay error may be minimized during the double exposure process.

Here, since the secondary exposure process is performed on the photoresist film 300 on which the primary exposure process is performed, it may be divided into a region exposed once or a region exposed twice and an area not exposed.

However, in the negative type of exposure process, it is meaningless whether the exposure is performed once or twice. Therefore, it is possible to distinguish between an exposure area and an unexposed area where exposure is never performed. Here, the non-exposed area 310 that has never been exposed becomes a portion where the first non-exposed area 310a and the second non-exposed area 310b overlap each other.

Next, the development process is performed to form the photosensitive film pattern 300a. In this case, when the positive photoresist film is used, it is preferable to use a developer or a rinse solution from which the non-exposed areas 310 are removed. It is preferable to use a developing solution or a rinse solution.

Here, the portion where the first non-exposed area 310a and the second non-exposed area 310b overlap is removed to form a photoresist pattern 300a including the hole 320.

Next, a hole pattern is formed by etching the lower etching layer (not shown) using the photoresist pattern 300a as a mask.

As described above, the negative type double exposure process may be performed to form a hole pattern having a fine line width.

It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.

300: photosensitive film 300a: photosensitive film pattern
310: non-exposed area 310a: first non-exposed area
310b: second non-exposed area 320: hole

Claims (7)

Forming an etched layer and a photosensitive film on the semiconductor substrate;
Performing a first exposure process on the photosensitive film using an exposure mask to form an unexposed first region;
Moving the exposure mask to perform a second exposure process on the photosensitive film to form an unexposed second region; And
Developing the photoresist to form a photoresist pattern by overlapping the first region and the second region;
Pattern forming method of a semiconductor device comprising a.
The method of claim 1,
The photosensitive film is a pattern forming method of a semiconductor device, characterized in that the positive or negative photosensitive film.
The method of claim 1,
The exposure mask includes a plurality of light blocking patterns.
The method of claim 3, wherein
The light shielding pattern has a rectangular shape pattern forming method of a semiconductor device.
The method of claim 3, wherein
The light blocking patterns may be arranged to be spaced apart by 1/3 of the light shielding pattern line width.
The method of claim 1,
And the second exposure process is performed by moving the exposure mask to the upper, lower, left and right sides.
The method of claim 3, wherein
And wherein the secondary exposure step is performed by moving the exposure mask by 2/3 of the light shielding pattern line width.
KR1020100020383A 2010-03-08 2010-03-08 Method for forming pattern of the semiconductor device KR20110101405A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020100020383A KR20110101405A (en) 2010-03-08 2010-03-08 Method for forming pattern of the semiconductor device

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KR1020100020383A KR20110101405A (en) 2010-03-08 2010-03-08 Method for forming pattern of the semiconductor device

Publications (1)

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KR20110101405A true KR20110101405A (en) 2011-09-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9324563B2 (en) 2013-07-11 2016-04-26 Samsung Electronics Co., Ltd. Methods of forming patterns

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9324563B2 (en) 2013-07-11 2016-04-26 Samsung Electronics Co., Ltd. Methods of forming patterns

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