KR20110083474A - Process of producing field effect transistor, process of producing display device, process of producing x-ray imaging device and process of producing optical sensor - Google Patents

Abstract

PURPOSE: A method for manufacturing a field effect transistor, a method for manufacturing a display device, a method for manufacturing an x ray photographing device, and a method for manufacturing an optical sensor are provided to perform a heating process at a temperature lower than 240°C, thereby reducing the power consumption of a heating furnace. CONSTITUTION: An active layer(18) is made of an amorphous oxide semiconductor. The active layer includes In, Ga, and Zn. The active layer is heated at a temperature lower than 240°C when the composition ratio of elements is In:Ga:Zn=a:b:c.

Description

Manufacturing Method of Field Effect Transistor, Manufacturing Method of Display Device, Manufacturing Method of X-ray Imaging Device and Manufacturing Method of Optical Sensor PROCESS OF PRODUCING OPTICAL SENSOR}

The present invention relates to a method of manufacturing a field effect transistor, a method of manufacturing a display device, a method of manufacturing an X-ray imaging device, and a method of manufacturing an optical sensor.

In recent years, development of the field effect transistor which used the oxide semiconductor material for the active layer, especially the thin film transistor (TFT) thinned is progressing. And as an oxide semiconductor material used for the said active layer, the IGZO type transparent oxide semiconductor, ie, the oxide semiconductor containing In, Ga, and Zn (henceforth IGZO) attracts attention. It has been reported that IGZO is not only transparent but also capable of forming amorphous IGZO at room temperature by sputtering, and having excellent transistor characteristics such as higher carrier mobility than amorphous silicon even if amorphous.

For example, Patent Document 1 discloses a transistor having a mobility of about 7 cm ² / VS and an on-off ratio of about 10 ³ with respect to a TFT using IGZO (In: Ga: Zn = 0.98: 1.02: 4) as a constituent material of the active layer. It is reported that it has a characteristic. In the manufacturing process of the TFT, it is reported that the carrier concentration can be increased by heat-treating the active layer made of IGZO at 600 ° C. or lower. In particular, when a flexible resin substrate such as PET (polyethylene terephthalate) is used, In consideration of heat resistance, it has been reported that heat treatment is performed at a low temperature of 300 ° C or lower, particularly 200 ° C or lower.

In addition, Patent Document 2 includes In element, Zn element, and element X (Ga element is included in one of element X candidates), In / (In + Zn + X) = 0.200 to 0.600, and Zn / It has been reported that a field effect transistor having an amorphous oxide semiconductor satisfying (In + Zn + X) = 0.200 to 0.800 in an active layer, or a field effect transistor heat-treated at 70 ° C to 350 ° C after formation of an active layer has been reported.

Further, in Non-Patent Document 1, when the active layer is heat treated at a high temperature of about 400 ° C. in the TFT manufacturing process, so-called transistor characteristics such as mobility μ, threshold Vth, S value, and the like are improved compared to before heat treatment. It is reported that the stability of transistor characteristics is improved.

(Prior art document)

(Patent Document 1) Japanese Patent Application Laid-Open No. 2006-165531

(Patent Document 2) Japanese Unexamined Patent Publication No. 2009-253204

(Non-Patent Document 1) Applied Physics Letters, 93 (2008) pp. 192107-1 ~ 3

However, since the TFT described in Patent Document 1 has a low on-off ratio of about 10 ³ , it is said that the TFT cannot be turned on and off. In addition, nothing is mentioned about the transistor characteristics after heat treatment. For example, even if the transistor characteristics are measured by performing heat treatment at a low temperature of 300 ° C. or lower, the Ga content in IGZO described in Patent Document 1 shows that the rising voltage Von is located on the very negative side as in the comparative example described later and does not function as a TFT. Is not expected.

In the TFT described in Patent Literature 2, a method of manufacturing a transistor including a heat treatment step after forming an active layer is described. There is a risk of confusion. Moreover, although dramatic improvement is seen with respect to mobility, there is no description regarding rising voltage Von and threshold voltage Vth.

Moreover, since the TFT of nonpatent literature 1 heat-processes at the high temperature of about 400 degreeC, the time required for heat processing becomes long and the power consumption of a heating furnace also becomes high. In addition, since a substrate that withstands high temperature heat treatment must be used, the type of substrate that can be used for TFT is limited.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a field effect transistor, a method for manufacturing a display device, a method for manufacturing an X-ray imaging device, and a method for manufacturing an optical sensor that can improve transistor characteristics while reducing the temperature of heat treatment. It is done.

The said subject of this invention was solved by the following means.

When <1> In, Ga and Zn are contained and the composition ratio of each element is In: Ga: Zn = a: b: c, a + b = 2, 1.2 <b <2, and 1 ≦ c ≦ Forming an active layer made of an amorphous oxide semiconductor defined in a range of two, and

The method of manufacturing a field effect transistor comprising the step of heat-treating the active layer at 240 ℃ or less.

<2> The method for producing a field effect transistor according to <1>, wherein in the heat treatment step, the electrical conductivity σ of the active layer is adjusted to a range of 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm).

<3> The method for producing a field effect transistor according to <1> or <2>, wherein the active layer is heat-treated at 75 ° C or higher in the heat-treating step.

<4> The method for producing a field effect transistor according to <3>, wherein the active layer is heat-treated at 180 ° C. or lower in the heat-treating step.

<5> The method for producing a field effect transistor according to <1> or <2>, wherein the active layer is heat treated in an oxidizing atmosphere containing oxygen in the step of heat treatment.

<6> In the step of forming the active layer, the composition ratios b and c of Ga and Zn are b <2, 1 ≦ c ≦ 2, and c> -5b + 8. Or the method for producing a field effect transistor according to <2>.

<7> In the step of forming the active layer, the composition ratios b and c of Ga and Zn are b ≦ 1.5, 1 ≦ c ≦ 2, and c> -5b + 8 to form an active layer. The manufacturing method of the field effect transistor as described in>.

<8> In the step of forming the active layer, the composition ratios b and c of Ga and Zn are 1.3 ≦ b ≦ 1.5, 1 ≦ c ≦ 2, and c> -5b + 8 to form an active layer. The manufacturing method of the field effect transistor as described in <7>.

<9> In the step of forming the active layer, the composition ratios b and c of Ga and Zn are 1.2 ≦ b, 1 ≦ c, and <1> for forming an active layer in a range of c ≦ -5b + 8. The manufacturing method of the field effect transistor as described in <2>.

<10> In the step of forming the active layer, the composition ratios b and c of Ga and Zn are 1.3 ≦ b, 1 ≦ c, and <9> to form an active layer in a range of c ≦ -5b + 8. The manufacturing method of the field effect transistor as described.

<11> The method for producing a field effect transistor according to <1> or <2>, wherein the field effect transistor is formed on a resin substrate.

The manufacturing method of the field effect transistor as described in <11> which uses the board | substrate which consists of polyethylene naphthalates as said <12> resin substrate.

<13> The manufacturing method of a display apparatus containing the manufacturing method of the field effect transistor as described in <1> or <2>.

<14> A manufacturing method of an X-ray imaging apparatus comprising the manufacturing method of the field effect transistor as described in <1> or <2>.

<15> The manufacturing method of the optical sensor containing the manufacturing method of the field effect transistor as described in <1> or <2>.

(Effects of the Invention)

According to the present invention, there is provided a method of manufacturing a field effect transistor, a method of manufacturing a display device, a method of manufacturing an X-ray imaging device, and a method of manufacturing an optical sensor that can improve transistor characteristics while reducing the temperature of heat treatment. Can be.

1 is a TFT according to an embodiment of the present invention, and is a schematic diagram showing an example of a TFT having a bottom gate structure.
2 is a TFT according to an embodiment of the present invention, and is a schematic diagram showing an example of a TFT having a top gate structure.
3 is a schematic diagram illustrating an example of a display device according to an embodiment of the present invention.
4 is a diagram showing a form of change in electrical conductivity of the IGZO film due to the heat treatment temperature.
5 is a graph showing an analysis result of Zn in the leaving component.
FIG. 6 is a graph showing measurement results of Vg-Id characteristics before and after heat treatment of a TFT of Example 3 having an IGZO film having an IGZO film having a composition ratio of a = 0.7, b = 1.3, and c = 1.0 in an active layer.
FIG. 7 is a graph showing measurement results of Vg-Id characteristics before and after heat treatment of a TFT of Comparative Example 3 having an IGZO film having an IGZO film having a composition ratio of a = 1.1, b = 0.9, and c = 1.0 in an active layer.
FIG. 8 is a diagram showing results of measuring Vg-Id characteristics when irradiated with varying wavelengths of monochrome light in the active layer of the TFT according to Example 3. FIG.

Hereinafter, a method of manufacturing a field effect transistor, a method of manufacturing a display device, a method of manufacturing an X-ray imaging device, and a method of manufacturing an optical sensor according to the present invention will be described in detail with reference to the accompanying drawings. In addition, in drawing, the member (component) which has the same or corresponding function is attached | subjected with the same code | symbol, and description is abbreviate | omitted suitably.

1. Field effect transistor

A method of manufacturing a field effect transistor according to an embodiment of the present invention will be specifically described by taking a TFT as an example.

(Configuration of TFT)

Before explaining the manufacturing method of a TFT, the structure of TFT manufactured by the said manufacturing method is briefly demonstrated.

A TFT according to an embodiment of the present invention has at least a gate electrode, a gate insulating film, an active layer, a source electrode, and a drain electrode, applies a voltage to the gate electrode, controls a current flowing in the active layer, and controls a current between the source electrode and the drain electrode. It is an active element having a function of switching.

The element structure of the TFT may be either of a so-called reverse stagger structure (also called bottom gate type) and stagger structure (also called top gate type) based on the position of the gate electrode. The so-called top contact type or bottom contact type may be either based on the contact portion between the active layer, the source electrode, and the drain electrode (referred to as "source drain electrode").

In addition, the top gate type has a gate electrode disposed above the gate insulating layer, and an active layer is formed below the gate insulating layer. The bottom gate type has a gate electrode disposed below the gate insulating layer. The active layer is formed on the upper side. In addition, a bottom contact type is a form in which a source / drain electrode is formed before the active layer and the bottom surface of the active layer contacts the source / drain electrode. A top contact type is formed in an active layer before the source / drain electrode. It is in contact with the drain electrode.

1 is a TFT according to an embodiment of the present invention, and is a schematic diagram showing an example of a TFT having a bottom gate structure. The TFT 10 has the gate electrode 14, the gate insulating layer 16, and the active layer 18 sequentially stacked on the substrate 12, and the source electrode 20 and the drain on the surface of the active layer 18. The electrodes 22 are arranged apart from each other.

2 is a TFT which concerns on embodiment of this invention, and is a schematic diagram which shows an example of TFT of a top gate structure. The TFT 30 stacks the active layer 34 on the surface of the substrate 32, and the source electrode 36 and the drain electrode 38 are provided on the active layer 34 so as to be spaced apart from each other, and the gate insulation is formed thereon. The layer 40 and the gate electrode 42 are further laminated sequentially.

In addition to the above, the TFT according to the present embodiment can adopt various configurations, and the configuration may be appropriately provided with an insulating layer or the like on the protective layer or the substrate on the active layer.

(Manufacturing method of TFT)

Next, a method for manufacturing a TFT according to an embodiment of the present invention will be described taking a TFT having a bottom gate structure and a top contact type as an example.

<Substrate>

As a 1st process, the support substrate which forms a TFT is prepared.

Since the support substrate of this embodiment performs heat processing of the active layer mentioned later at low temperature, the thing with low heat resistance can also be used. For example, in addition to inorganic materials such as YSZ (zirconia stabilized yttrium) and glass, saturated polyester resins, polyethylene terephthalate (PET) resins, polyethylene naphthalate (PEN) resins, polybutylene terephthalate resins, Polystyrene, polycycloolefin, norbornene resin, poly (chlorotrifluoroethylene), crosslinked fumaric acid diester resin, polycarbonate (PC) resin, polyether sulfone (PES) resin, polysulfone (PSF, PSU ) Resin, polyarylate (PAR) resin, allyl diglycol carbonate, cyclic polyolefin (COP, COC) resin, cellulose resin, polyimide (PI) resin, polyamideimide (PAI) resin, maleimide-olefin resin, Polyamide (Pa) resin, acrylic resin, fluorine resin, epoxy resin, silicone resin film, polybenzazole resin, episulfide compound, liquid crystal polymer (LCP), cyanate resin And organic materials such as aromatic ether resins. In addition, composite plastic materials with silicon oxide particles, composite plastic materials with metal nanoparticles, inorganic oxide nanoparticles, inorganic nitride nanoparticles, and the like, composite plastic materials with metal-based and inorganic nanofibers and / or microfibers, carbon fibers, Composite plastic material with carbon nanotubes, composite plastic material with glass plate glass fiber glass beads, composite plastic material with particles having clay minerals or mica-derived crystal structure, between thin glass and the sole organic material The laminated plastic material or inorganic layer (for example, SiO ₂ , Al ₂ O ₃ , SiO _x N _y ) having at least one bonding interface is alternately laminated with at least one bonding interface by alternately stacking the organic layers. Composite materials with barrier performance, stainless or metal laminated with dissimilar metals It is also possible to use an aluminum substrate with an oxide film having improved surface insulation by subjecting the laminated material, the aluminum substrate or the surface to an oxidation treatment (for example, anodizing). In the case of the said organic material, it is preferable that it is excellent in dimensional stability, solvent resistance, electrical insulation, workability, low breathability, or low hygroscopicity.

In the present invention, a particularly flexible resin substrate is preferably used. As a material of a resin substrate, the organic plastic film with high transmittance | permeability is preferable, For example, the synthetic resin mentioned above can be used. In addition, when the insulating property is insufficient for the film-like plastic substrate, an insulating layer, a gas barrier layer for preventing the permeation of moisture or oxygen, an undercoat layer for improving the flatness of the film-like plastic substrate, and the adhesion to the electrode or the active layer, etc. It is also preferable to have a.

Here, it is preferable that the thickness of a resin substrate shall be 50 micrometers or more and 500 micrometers or less. This is because when the thickness of the resin substrate is less than 50 µm, it is difficult for the substrate itself to maintain sufficient flatness. Moreover, when the thickness of a resin substrate is made thicker than 500 micrometers, it becomes difficult to bend the board | substrate itself freely, ie, lack of the flexibility of the board | substrate itself.

There is no restriction | limiting in particular about the shape, structure, size, etc. of a board | substrate, According to the objective etc., it can select suitably. Generally, as a shape of a board | substrate, it is preferable that it is plate shape from a viewpoint of handleability, the ease of formation of TFT, etc. The structure of the substrate may be a single layer structure or a laminated structure. In addition, the board | substrate may be comprised by the single member, and may be comprised by two or more members.

<Gate Electrode>

As a second process, a gate electrode is formed on a substrate.

As the gate electrode, a conductive material is used. For example, metals such as Al, Mo, Cr, Ta, Ti, Au, Ag, alloys such as Al-Nd, APC, tin oxide, zinc oxide, indium oxide, and indium oxide It can be formed using a metal oxide conductive film such as tin (ITO) or zinc indium oxide (IZO). For example, in consideration of aptitude with materials used in wet methods such as printing methods, coating methods, physical methods such as vacuum deposition method, sputtering method, ion plating method, and chemical methods such as CVD and plasma CVD method, etc. The film is formed on the substrate according to the selected method. The thickness of the gate electrode is preferably 10 nm or more and 1000 nm or less.

After film formation, patterning is performed in a predetermined shape by photolithography. At this time, it is preferable to simultaneously pattern the gate electrode and the gate wiring.

<Gate Insulation>

As a third step, a gate insulating film is formed on the substrate and the gate electrode.

The gate insulating film has insulating property, for example, SiO ₂ , SiN _x , SiON, Al ₂ O ₃ , Y ₂ O ₃ , Ta ₂ O ₅ , HfO ₂ It is good also as an insulating film containing two or more insulating films, such as these, or these compounds. The gate insulating film is appropriately selected in consideration of the compatibility with the material to be used from a printing method, a wet method such as a coating method, a physical method such as a vacuum deposition method, a sputtering method, an ion plating method, or a chemical method such as CVD or plasma CVD method. The film is formed on the substrate in accordance with the method, and patterned into a predetermined shape by the photolithography method as necessary.

In addition, the gate insulating film needs to have a thickness for lowering the leakage current and improving the voltage resistance, while an excessively large thickness causes an increase in the driving voltage. Although based on the material of a gate insulating film, 10 nm-10 micrometers are preferable and, as for the thickness of a gate insulating film, 50 nm-1000 nm are more preferable.

<Active layer>

As a fourth step, when In, Ga, and Zn are contained on the gate insulating film, and the composition ratio of each element is In: Ga: Zn = a: b: c, a + b = 2, and 1.2 <b <2 And an active layer made of an amorphous oxide semiconductor (IGZO film) defined in the range of 1 ≦ c ≦ 2.

Preferably, in the step of forming the active layer, an active layer in which the composition ratios b and c of Ga and Zn are b <2, 1 ≦ c ≦ 2 and c> -5b + 8 is formed. More preferably, in the step of forming the active layer, an active layer having a composition ratio b and c of Ga and Zn is b ≦ 1.5, 1 ≦ c ≦ 2, and c> -5b + 8. More preferably, in the step of forming the active layer, an active layer having a composition ratio b and c of Ga and Zn of 1.3 ≦ b ≦ 1.5, 1 ≦ c ≦ 2, and c> -5b + 8 is formed. do.

However, in the step of forming the active layer, an active layer in the range of composition ratios b and c of Ga and Zn of 1.2 ≦ b, 1 ≦ c, and c ≦ -5b + 8 may be formed. In the step of forming the active layer, an active layer in the range of composition ratios b and c of Ga and Zn of 1.3 ≦ b, 1 ≦ c, and c ≦ -5b + 8 may be formed.

As a method for forming the active layer, it is preferable to form a film by using a vapor phase film formation method as a target of a polycrystalline sintered body of an oxide semiconductor containing In, Ga, and Zn. Among the vapor deposition methods, the sputtering method and the pulse laser deposition method (PLD method) are more preferable, and the sputtering method is particularly preferable from the viewpoint of mass productivity.

For example, an amorphous film of IGZO is formed into a film of 20 to 150 nm by sputtering or PLD. It can be confirmed that the IGZO film formed is an amorphous film by X-ray diffraction. In addition, a film thickness can be calculated | required by tactile surface shape measurement, and a composition ratio can be calculated | required by fluorescence X-ray analysis.

As an adjustment method which makes the composition ratio of an IGZO film into the above-mentioned range, for example, in the film-forming method by a sputter | spatter, the method of using 1 or more types of targets so that it may become a composition ratio in the said range is mentioned. As an example, it is possible to change the composition ratio of the film by co-sputtering with multiple targets and adjusting the input power for each target.

After forming an amorphous IGZO film, it is necessary to perform a patterning process by etching. If the etching solution used after the pattern processing of the active layer is not resistant, for example, a method of forming a pattern by so-called lift-off or the like is the simplest.

Pattern processing of an IGZO film can be performed by the photolithographic method and the etching method. Specifically, a resist mask is patterned by photolithography on a portion of the IGZO film formed on the gate insulating film as an active layer, and a mixture of hydrochloric acid, nitric acid, dilute sulfuric acid or phosphoric acid, nitric acid and acetic acid (Al etching solution; Kanto Chemical Co., Ltd.) to form an active layer by etching with an acid solution. For example, an aqueous solution containing phosphoric acid, nitric acid and acetic acid is preferable because the exposed portion of the IGZO film can be reliably removed.

And the manufacturing method of TFT which concerns on embodiment of this invention includes the process of heat-processing the said active layer at 240 degrees C or less after forming an active layer.

Here, in the step of heat treatment, it is preferable to adjust the electrical conductivity σ of the active layer in the range of 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm). In addition, the electrical conductivity, for example, ¹⁰ in terms of ⁶ nopindago sufficiently such as (S / cm) or more, it is also preferable to heat treating the active layer at least 75 ℃. Moreover, it is also preferable to heat-process an active layer at 180 degrees C or less from a viewpoint of further increasing the kind of board | substrate which can be used, and raising an electrical conductivity sufficiently. Moreover, it is also preferable to heat-process an active layer in the oxygen atmosphere containing oxygen from a viewpoint of reducing the oxygen deficiency of the IGZO film | membrane which comprises an active layer, adjustment of an electrical conductivity, and stability of TFT.

Thus, since heat processing is performed at low temperature below 240 degreeC, time required for heat processing becomes short and the power consumption of a heating furnace can also be reduced. Further, even a substrate having low heat resistance, for example, polyethylene naphthalate having a melting point of about 264 ° C., can be used for the TFT.

In addition, even if heat treatment is performed at low temperature in consideration of heat resistance, when the composition ratio of each element is In: Ga: Zn = a: b: c for the active layer of the TFT according to the embodiment of the present invention, a + b = 2, 1.2 <b <2, and formed to be an amorphous oxide semiconductor defined in the range 1≤c≤2, so that transistor characteristics such as rising voltage Von, Vth, S value, etc. of TFT are deteriorated. none.

When the amorphous oxide semiconductor constituting the active layer is in the above composition range, the present inventors considerably improve transistor characteristics such as rising voltage Von, threshold voltage Vth, S value and mobility of TFT in low temperature heat treatment. I found something that could be done.

In addition, it was found that even at a low temperature heat treatment, the temperature can be adjusted to 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm), which is a range of electrical conductivity preferable as the active layer of the TFT, similar to the high temperature heat treatment at 400 ° C or higher.

In addition, there is no fear that the amorphous oxide semiconductor constituting the active layer crystallizes because of the heat treatment at low temperature.

Further, by adjusting the active layer to the composition range, light absorption can be reduced for light in the visible light short wavelength region having a wavelength of 400 to 420 nm. For this reason, even if light containing blue light is irradiated from the light emitting layer using the TFT of this embodiment for an organic electroluminescence display, it can operate stably without being influenced by irradiation light.

In addition, this invention is not limited to the said embodiment. For example, although the case where the IGZO film was wet-etched and pattern-processed was demonstrated, you may pattern-process by dry etching and an active layer may be formed using a shadow mask. Moreover, you may form the protective layer which protects an active layer after formation of an active layer. In addition, the active layer may be formed by laminating a plurality of layers each having a different resistivity.

The heat treatment step of the active layer may be performed at any time as long as the IGZO film (active layer) is formed, for example, before the pattern processing of the IGZO film, immediately after the pattern processing, immediately after the formation of the protective layer, or immediately after the production of the TFT. It may be. The heat treatment step may be performed not only once but also plural times. For example, the heat treatment step may be performed immediately after the formation of the active layer, or may be performed immediately after formation of the protective layer.

<Source Drain Electrode>

As a fifth step, a metal film for forming source and drain electrodes is formed on the active layer and the gate insulating film.

The metal film may be formed so as to cover the active layer with a metal having conductivity as an electrode and wiring and which can be patterned by etching. Specifically, metals such as Al, Mo, Cr, Ta, Ti, Au, Ag, alloys such as Al-Nd and APC, tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), and zinc indium oxide (IZO) Examples thereof include organic conductive compounds such as metal oxide conductive films, polyaniline, polythiophene, polypyrrole, and mixtures thereof.

In particular, a layer made of a metal containing Al or Al as at least one of Nd, Y, Zr, Ta, Si, W, and Ni as main components from the viewpoint of film forming property, conductivity, patterning property, and the like (Al-based metal film) Alternatively, on the oxide semiconductor film side, a first layer made of a metal containing Al or Al as at least one of Nd, Y, Zr, Ta, Si, W, and Ni, and a second layer containing Mo or Ti as a main component It is preferable to form into a film and laminate by methods, such as sputtering and vapor deposition, respectively. Here, a "main component" is a component with the most content (mass ratio) among the components which comprise a metal film, It is preferable that it is 50 mass% or more, It is more preferable that it is 90 mass% or more.

In the case of the top contact type, since the active layer is already formed, the thickness of the metal film is not limited as in the case of forming the active layer after the source and drain electrodes, and can be formed thick. In consideration of the film-forming property, the pattern workability by etching, the conductivity (lower resistance), and the like, the total thickness of the source / drain electrode and the metal film serving as the wiring connected thereto is preferably 10 nm or more and 1000 nm or less.

When the Al-based metal film (first layer) and the Mo-based metal film or Ti-based metal film (second layer) mainly composed of Mo or Ti are laminated, the thickness of the first layer is 10 nm or more and 1000 nm or less. The thickness of the second layer is preferably 1 nm or more and 300 nm or less.

Next, the metal film is etched and patterned to form a source electrode and a drain electrode in contact with the active layer. Here, a resist mask is formed on the portion where the metal film remains by photolithography, and, for example, etching is performed using an acid solution in which acetic acid or sulfuric acid is added to phosphoric acid and nitric acid to form at least one of a source electrode and a drain electrode. do. It is preferable to simultaneously pattern-process the source / drain electrode and the wiring (data wiring etc.) connected to these electrodes from a viewpoint of simplification of a process.

In addition, this invention is not limited to the said embodiment. For example, although the case where the metal film was wet-etched and pattern-processed was demonstrated, you may pattern-process by dry etching and you may form a source-drain electrode using a shadow mask.

2. Display device

The manufacturing method of the display device of the embodiment of the present invention includes the manufacturing method of the above-described field effect transistor, and any other known manufacturing method may be adopted as the manufacturing method of the other configuration.

The manufacturing method of the display device which concerns on embodiment of this invention is demonstrated taking an organic electroluminescence display as an example.

3 is a schematic diagram illustrating an example of a display device according to an embodiment of the present invention.

In the organic EL display device 100, the substrate 102 is a plastic support such as PEN as a flexible support, and has a substrate insulating layer 104 on its surface for insulating. The patterned color filter layer 106 is provided thereon. The gate electrode 108 is provided on the driving TFT portion, and a gate insulating film 110 is formed on the gate electrode 108. A portion of the gate insulating layer 110 opens a connection hole for electrical connection. An active layer 112 is formed in the driving TFT portion, and a source electrode 114 and a drain electrode 116 are formed thereon. The drain electrode 116 and the pixel electrode (anode) 118 of the organic EL element are continuously integrated, and are formed by the same material and the same process. The drain electrode and the driving TFT of the switching TFT are electrically connected to the connection hole by the connection electrode 120. Further, except for the portion where the organic EL element of the pixel electrode portion is formed, the whole is covered with the insulating film 122. An organic EL element portion on which the organic layer 124 including the light emitting layer and the cathode 126 are formed is formed on the pixel electrode portion.

Here, the active layer of the driving TFT or / and switching TFT of the present embodiment contains In, Ga, and Zn, and a + b = 2 when the composition ratio of each element is In: Ga: Zn = a: b: c. And 1.2 <b <2, and formed of an amorphous oxide semiconductor defined in the range of 1≤c≤2, and heat-treated at low temperature under the above-described method and conditions at timings such as immediately after film formation and immediately after patterning of the IGZO film. .

Therefore, the substrate 102 made of the flexible support does not dissolve.

In addition, by combining the composition ratio of the active layer and low temperature heat treatment, transistor characteristics such as rising voltage Von, threshold voltage Vth, and S value of the TFT can be remarkably improved.

Further, by adjusting the active layer to the composition range, light absorption can be reduced for light in the visible light short wavelength region having a wavelength of 400 to 420 nm. For this reason, even when light containing blue light is irradiated to the active layer from the light emitting layer, the TFT is not affected by the irradiated light and can operate stably.

3. Application

The above-described organic EL display device 100 is applied to a wide range of fields in a wide range of fields including mobile phone displays, personal digital assistants (PDAs), computer displays, information displays in automobiles, TV monitors or general lighting.

In addition to the organic EL display device 100 described above, the field effect transistor according to the embodiment of the present invention can also be applied to an X-ray imaging device, an optical sensor, or the like.

(Example)

Hereinafter, the manufacturing method of the field effect transistor according to the present invention, the manufacturing method of the display device, the manufacturing method of the X-ray imaging apparatus, and the manufacturing method of the optical sensor will be described with reference to Examples. It is not limited at all.

&Lt; Example 1 >

In Example 1 of the present invention, an IGZO film having a composition ratio of In: Ga: Zn = 0.7: 1.3: 1.0 was produced.

Specifically, the IGZO film according to Example 1 was produced on a 25 mm x 25 mm quartz glass by a co-sputtering method using each target of InGaZnO ₄ , ZnO, and Ga ₂ O ₃ . These targets used those manufactured by Toshima Mfg Co., Ltd. (purity 99.99%). InGaZnO ₄ targets and Ga ₂ O ₃ In the case of using the target, the film was formed by an RF sputterer and in the case of using a ZnO target, a DC sputter. In the case of using a ZnO target, in general, the ZnO target has a high resistance and is often formed by RF sputtering. However, DC sputtering has been adopted in view of the fact that film formation by DC sputtering is possible and mass production is possible.

The IGZO film formed into a film was heat-treated at 180 degreeC, 300 degreeC, or 600 degreeC. This heat treatment was performed after the IGZO film was installed in an oxygen atmosphere control furnace (Fuji Film Co., Ltd. special order furnace), followed by oxygen substitution at a flow rate of 200 sccm. In the heat treatment conditions, the temperature rising rate was 8.3 ° C./min, the temperature was raised from room temperature to a predetermined temperature, the temperature was maintained for 1 hour, followed by natural cooling, and the oxygen was continuously flowed from the start of heat treatment to the extraction of the IGZO film. .

<Example 2>

In Example 2 of the present invention, an IGZO film having a composition ratio of In: Ga: Zn = 0.5: 1.5: 1.0 was produced. In addition, this IGZO film was produced using the same film formation method as Example 1 except for changing the composition ratio.

The IGZO film formed into a film was heat-treated at 180 degreeC, 300 degreeC, or 600 degreeC. The method and conditions of the heat treatment were the same as the method and conditions of Example 1.

Comparative Example 1

In Comparative Example 1, an IGZO film having a composition ratio of In: Ga: Zn = 1.1: 0.9: 1.0 was produced. In addition, this IGZO film was produced using the same film formation method as Example 1 except for changing the composition ratio.

The IGZO film formed into a film was heat-treated at 180 degreeC, 300 degreeC, or 600 degreeC. The method and conditions of the heat treatment were the same as the method and conditions of Example 1.

In addition, the film-forming conditions of the IGZO film which concerns on Examples 1-2 and Comparative Example 1 are as showing in Table 1.

Sample name
In: Ga: Zn
arrival
Vacuum degree
Ar / O ₂
(sccm)
Deposition pressure
RF POWER (W)
DC POWER (W) InGaZnO ₄ Ga ₂ O ₃ ZnO IGZO film of Comparative Example 1 1.1: 0.9: 1.0
<2 × 10 ^-5
100 / 0.9


0.388-0.407

200

0 3.5 IGZO film of Example 1 0.7: 1.3: 1.0 119 11.3 IGZO film of Example 2 0.5: 1.5: 1.0 172 18.1

<Example 3>

In Example 3 of this invention, the TFT which produced the active layer which consists of IGZO film which has a composition ratio of In: Ga: Zn = 0.7: 1.3: 1.0 was produced.

Specifically, after forming the IGZO film which has each said composition ratio on the Si substrate with a thermal oxidation film, it patterned with the mixed acid aluminum etching liquid, and produced the active layer. In addition, the film-forming method and conditions of the IGZO film which comprise an active layer are the same as that of Example 1. However, the film thickness is adjusted so that the film thickness is 50 nm based on the film thickness and the film formation time of the IGZO film formed in Example 1 as the film thickness. Also for the field effect transistor which changed the composition ratio mentioned later, film-forming time is adjusted so that film thickness may be 50 nm.

After fabrication of the active layer, ITO was formed as a source / drain electrode to produce a TFT using a Si substrate as a gate electrode and a thermal oxide film (100 nm) as a gate insulating film.

The produced TFT was heat-treated at 180 degreeC. The heat treatment of the TFT was performed after the TFT was installed in a tabletop muffle furnace (KDF-75 manufactured by Denken Co., Ltd.), followed by oxygen substitution at a flow rate of 200 sccm. In the heat treatment conditions, the temperature rising rate was increased from room temperature to 180 ° C. at 8.3 ° C./min, the temperature was maintained for 1 hour, followed by natural cooling, and the above oxygen continued to flow from the heat treatment start to the extraction of the TFT.

Comparative Example 3

In the TFT of Comparative Example 3, a TFT was prepared in which the active layer was made of an IGZO film having a composition ratio of In: Ga: Zn = 1.1: 0.9: 1.0. In addition, this TFT is manufactured using the manufacturing method and conditions similar to Example 3 except having changed the composition ratio of an active layer.

The produced TFT was heat-treated at 180 degreeC. The method and conditions of the heat treatment were the same as the method and conditions of Example 3.

Thin Film Evaluation

The IGZO films before and after the heat treatment according to Examples 1 to 2 and Comparative Example 1 were each evaluated for X-ray diffraction measurement, composition ratio, electrical characteristics, and elevated temperature desorption gas analysis. Table 2 shows the results of composition ratio, crystallinity, and electrical property evaluation. Hereinafter, each evaluation is explained in full detail.

(X-ray diffraction measurement)

The diffraction intensity of all the produced IGZO films was measured by the well-known X-ray diffraction method using the measuring apparatus Rint-Ultima III (made by Rigaku Corporation). As shown in Table 2, it was confirmed that all IGZO films were amorphous as a result of the measurement.

(Evaluation of composition ratio)

The composition ratio of all the produced IGZO films was determined by fluorescence X-ray analysis (device: AXIOS type manufactured by PANalytical). Specifically, the fluorescent X-ray intensity of the standard sample in which the element concentration of each In, Ga, and Zn element is determined by ICP is measured first. Next, a calibration curve is produced between the concentration of each element of the standard sample and the fluorescence X-ray intensity. Finally, the fluorescence X-ray analysis of the unknown sample was performed, and the composition ratio was determined using the produced calibration curve.

As a result of determining the composition ratio as shown in Table 2, it was confirmed that each IGZO film became the composition ratio shown above, respectively.

(Electrical characteristics)

The electrical properties (sheet resistance, resistivity, and electrical conductivity) of all the produced IGZO films were measured using a resistivity meter (Hyresta MCP-HT450 manufactured by Mitsubishi Chemical Corporation).

As shown in Table 2, the electrical properties were remarkable before and after the heat treatment.

4 shows the form of change in the electrical conductivity of the IGZO film due to the heat treatment temperature. In addition, the plot at 25 degreeC in a figure shows the electrical conductivity of each IGZO film before heat processing. In addition, b in a figure shows the composition ratio of Ga.

As shown in FIG. 4, the electrical conductivity of the IGZO film of Examples 1 and 2 which increased the composition ratio b of Ga has the maximum at the heat processing temperature of 180 degreeC, and shows a big change in low temperature heat processing. On the other hand, the electrical conductivity of the IGZO film of Comparative Example 1 did not have a maximum value and showed a tendency to gradually increase as the heat treatment temperature was increased.

Further, the electric conductivity σ effective as the active layer of the TFT is 10 ⁻⁹ ≦ σ ≦ 10 ⁻² (S / cm), and preferably 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm), but in Example 1 and The electrical conductivity of the IGZO film 2 is in the range of 10 ⁻⁹ ≦ σ ≦ 10 ⁻² (S / cm) even when heat treated at low temperature or high temperature. In addition, the electrical conductivity of the IGZO films of Examples 1 and 2 has a maximum value at a heat treatment temperature of about 180 ° C, so that even when heat treated at a low temperature of 75 ° C or more and 240 ° C or less, the electrical conductivity obtained by heat treatment at a high temperature of 400 ° C or the like is approximately. It was confirmed that the same value can be obtained. Further, in Example 1 in which the composition ratio b of Ga was b = 1.3, the thermal conductivity was heat treated at a low temperature of 75 ° C or more and 240 ° C or less, so that the electrical conductivity σ is 10 ^-6 ≤ σ ≤ 10 ^-4 (S / cm), which is preferable as the active layer of the TFT. It was confirmed that it can adjust to the range of. Similarly, in Example 2 in which the composition ratio b of Ga was b = 1.5, heat conductivity was performed at a low temperature of 140 ° C. or higher and 200 ° C. or lower, so that the electrical conductivity σ is 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm), which is preferable as the active layer of the TFT. It was confirmed that it can adjust in the range of.

(Temperature Desorption Gas Analysis)

An elevated temperature desorption gas analysis of the IGZO film having a composition ratio of Comparative Example 1 was performed using an elevated temperature desorption gas analyzer (ESCO Ltd. manufactured EMD-WA1000S). The analysis result about Zn among the detachment components is shown in FIG. Here, the ordinate shows the ionic strength of the mass number 64. In addition, the desorption gas was found to be Zn since the ionic strength of the masses 64, 66 and 68 was changed in accordance with the isotopic abundance ratio of Zn ⁺ ions.

As a result, it can be confirmed that the strength of the desorption gas starts to increase at the heat treatment temperature of 248 ° C. In addition, this result is considered to be applicable also to the temperature-detachment gas analysis of the IGZO film which has a composition ratio of Example 1, 2.

Therefore, in order to perform heat processing, maintaining the composition ratio of an IGZO film, it can be said that it is preferable that it is the heat processing temperature of 240 degrees C or less.

TFT characteristics before and after heat treatment

As for the TFTs according to Example 3 and Comparative Example 3, the TFT characteristics (Vg-Id characteristics, rising voltage Von, threshold voltage Vth, mobility μ, S value) before and after heat treatment were evaluated. Evaluation of TFT characteristics was performed in the dark and dry air atmosphere, after flowing a dry air for 20 minutes or more. In addition, the Vg-Id characteristic is evaluated when Vd = 10V.

Table 3 shows the evaluation results of the TFT characteristics before and after the heat treatment in the TFTs of Example 3 and Comparative Example 3. 6 shows the measurement results of the Vg-Id characteristics before and after heat treatment of the TFT of Example 3 having an IGZO film having an IGZO film having a composition ratio of a = 0.7, b = 1.3 and c = 1.0 in the active layer. Similarly, Fig. 7 shows measurement results of Vg-Id characteristics before and after heat treatment of the TFT of Comparative Example 3 having an IGZO film having an IGZO film having a composition ratio of a = 1.1, b = 0.9 and c = 1.0 in the active layer.

As shown in Fig. 7 and Table 3, the TFT through 180 ° C heat treatment of Comparative Example 3 had an on-off ratio of 3.6x10 ⁷ and a TFT on and off, but the rising voltage Von was very negative. That is, it is confirmed that it does not function as TFT in the low temperature (180 degreeC) heat processing.

In addition, it can be confirmed that the Vg-Id characteristics are greatly negatively shifted compared with before the heat treatment. In addition, although the off current does not change greatly, the on current is greatly increased by heat treatment. Regarding the rising voltage Von, Von = 1.0V before heat treatment, and Von = -37V after the heat treatment, and are greatly negatively shifted (Von: Id = 1 × 10 ^-10 A is set to the Vg value when obtained). . The threshold voltage Vth is also negatively shifted.

Here, although the rising voltage Von and the threshold voltage Vth are preferably around 0V, the TFT through 180 ° C heat treatment of Comparative Example 3 is deteriorated in rising voltage and threshold voltage as compared with before the heat treatment.

In addition, it is confirmed that the S value is also increased and deteriorated by heat treatment.

On the other hand, as shown in Fig. 6 and Table 3, the TFT through the 180 ° C heat treatment of Example 3 has a significant negative shift in Vg-Id characteristics compared with before the heat treatment. The off current has almost the same value, and the on current is increasing. The on-off ratio was 9.8 × 10 ⁷ , and the on-off of the TFT was taken.

The rising voltage Von was Von = 14.5V before the heat treatment, but after the heat treatment, Von was close to 0V and became Von = 0.8V, and it was confirmed that a good value was obtained (when Von: Id = 1 × 10 ^-11 A was obtained. Voltage Vg value). Similarly, threshold voltage Vth was confirmed to exhibit a good value near 0V by heat treatment.

Moreover, it was confirmed that S value also becomes small and improves by heat-processing.

As a result, the TFT of the third embodiment contains In, Ga, and Zn even when low-temperature heat treatment is performed, and a + b = 2 when the composition ratio of each element is In: Ga: Zn = a: b: c. Since the active layer is formed to be made of an amorphous oxide semiconductor defined in the range of 1.2 <b <2 and 1≤c≤2, transistor characteristics such as rising voltage Von, threshold voltage Vth, S value and mobility of TFT Could be improved dramatically. This is an effect not seen in the TFT of Comparative Example 3.

In addition, by adjusting the active layer to the above-mentioned composition range, for example, as shown in FIG. 8, light absorption can be reduced for light in a visible light short wavelength region having a wavelength of 400 to 420 nm. For this reason, the TFT of this embodiment is used for an organic electroluminescence display, and even if light containing blue light is irradiated from a light emitting layer, it is not influenced by irradiation light and can operate stably. This is an effect not seen in the TFT of Comparative Example 3.

10, 30: TFT (field effect transistor) 18, 34, 112: active layer
100 display device 102 substrate

Claims (15)

When In, Ga, and Zn are contained and the composition ratio of each element is In: Ga: Zn = a: b: c, it is a + b = 2, 1.2 <b <2, and 1≤c≤2 Forming an active layer comprising an amorphous oxide semiconductor defined by &lt; RTI ID = 0.0 &gt;
And a step of heat-treating the active layer at 240 ° C. or lower. The method of claim 1,
In the heat treatment step, the electric conductivity σ of the active layer is adjusted to a range of 10 ⁻⁶ ≦ σ ≦ 10 ⁻⁴ (S / cm). The method according to claim 1 or 2,
In the heat treatment step, the active layer is heat-treated at 75 ℃ or more method for producing a field effect transistor. The method of claim 3, wherein
In the step of heat treatment, the active layer is a method of manufacturing a field effect transistor, characterized in that the heat treatment at 180 ℃ or less. The method according to claim 1 or 2,
In the heat treatment step, the active layer is heat-treated in an oxidizing atmosphere containing oxygen. The method according to claim 1 or 2,
In the step of forming the active layer, an electric field formed by forming an active layer in the range wherein the composition ratios b and c of Ga and Zn are b <2, 1 ≦ c ≦ 2, and c> -5b + 8. Method of manufacturing an effect transistor. The method according to claim 6,
In the step of forming the active layer, the composition ratio b, c of Ga and Zn is b ≤ 1.5, 1 ≤ c ≤ 2, c> -5b + 8 to form an active layer characterized in that Method of manufacturing an effect transistor. The method of claim 7, wherein
In the step of forming the active layer, the composition ratios b and c of Ga and Zn are 1.3 ≦ b ≦ 1.5, 1 ≦ c ≦ 2, and c> -5b + 8 to form an active layer. A method of manufacturing a field effect transistor. The method according to claim 1 or 2,
In the step of forming the active layer, the composition ratio b, c of Ga and Zn is 1.2≤b, 1≤c, c≤-5b + 8 to form an active layer, characterized in that the field effect type Method for manufacturing a transistor. The method of claim 9,
In the step of forming the active layer, the composition ratio b, c of Ga and Zn is 1.3≤b, 1≤c, c≤-5b + 8 to form an active layer, characterized in that the field effect type Method for manufacturing a transistor. The method according to claim 1 or 2,
The field effect transistor is formed on a resin substrate. The method of claim 11,
A method of manufacturing a field effect transistor, characterized in that a substrate made of polyethylene naphthalate is used as the resin substrate. A method of manufacturing a display device, comprising the method of manufacturing the field effect transistor according to claim 1. A method for manufacturing an X-ray imaging apparatus, comprising the method for manufacturing the field effect transistor according to claim 1. A method of manufacturing an optical sensor, comprising the method of manufacturing the field effect transistor according to claim 1.

Images