KR20110079352A - Image sensor and method of fabricating the same - Google Patents

Image sensor and method of fabricating the same Download PDF

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Publication number
KR20110079352A
KR20110079352A KR1020090136370A KR20090136370A KR20110079352A KR 20110079352 A KR20110079352 A KR 20110079352A KR 1020090136370 A KR1020090136370 A KR 1020090136370A KR 20090136370 A KR20090136370 A KR 20090136370A KR 20110079352 A KR20110079352 A KR 20110079352A
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KR
South Korea
Prior art keywords
gate electrode
pixel region
photodiode
sccm
image sensor
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KR1020090136370A
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Korean (ko)
Inventor
조은상
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주식회사 동부하이텍
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Priority to KR1020090136370A priority Critical patent/KR20110079352A/en
Publication of KR20110079352A publication Critical patent/KR20110079352A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE: An image sensor and a manufacturing method thereof are provided to enhance manufacturing convenience though not using a mask for etching selectively a pixel area and a logic area for forming a spacer. CONSTITUTION: A semiconductor substrate(100) defines a pixel area(PR) and a logic area(LR) adjacent to the pixel area. A photodiode(110) is formed on the pixel area. The first gate electrode(210) adjacent to the photodiode is formed on the pixel area and the second gate electrode(220) is formed on the logic area. The first oxide film(301), a nitride film(302) and the second oxide film(303) are formed successively on the semiconductor substrate and cover the first gate electrode and the second gate electrode. The second oxide film is etched. A part arranged in the pixel area and a part arranged in the logic area, which are all included in the nitride film, are concurrently etched.

Description

Image sensor and manufacturing method thereof {IMAGE SENSOR AND METHOD OF FABRICATING THE SAME}

Embodiments relate to an image sensor and a method of manufacturing the same.

Recently, CMOS image sensors have attracted attention as next generation image sensors for overcoming the disadvantages of the charge coupled device. The CMOS image sensor uses CMOS technology that uses a control circuit, a signal processing circuit, and the like as peripheral circuits to form MOS transistors corresponding to the number of unit pixels on a semiconductor substrate, thereby forming the MOS transistors of each unit pixel. The device adopts a switching method that sequentially detects output. That is, the CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel.

The CMOS image sensor has advantages, such as a low power consumption, a simple manufacturing process according to a few photoprocess steps, by using CMOS manufacturing technology. In addition, since the CMOS image sensor can integrate a control circuit, a signal processing circuit, an analog / digital conversion circuit, and the like into the CMOS image sensor chip, the CMOS image sensor has an advantage of miniaturization of a product. Therefore, the CMOS image sensor is currently widely used in various application parts such as a digital still camera, a digital video camera, and the like.

Embodiments provide an easy method of manufacturing an image sensor and an image sensor formed thereby.

According to an embodiment, there is provided a method of manufacturing an image sensor, the method including: providing a semiconductor substrate having a pixel region and a logic region adjacent to the pixel region; Forming a photodiode in the pixel region; Forming a first gate electrode adjacent to the photodiode and a second gate electrode in the logic region in the pixel region; Sequentially forming a first oxide film, a nitride film, and a second oxide film on the semiconductor substrate to cover the first gate electrode and the second gate electrode; Etching the second oxide film anisotropically; And simultaneously etching a portion of the nitride layer disposed in the pixel region and a portion of the nitride region.

The image sensor formed by the above method includes a semiconductor substrate in which a pixel region and a logic region adjacent to the pixel region are defined; A photodiode formed in the pixel region; A first gate electrode adjacent to the photodiode and a second gate electrode disposed in the logic region in the pixel region; And a nitride layer covering the photodiode, the first gate electrode, and the second gate electrode and in direct contact with the photodiode.

In the method of manufacturing the image sensor according to the embodiment, the pixel region and the logic region are simultaneously patterned to form a spacer. That is, the manufacturing method of the image sensor according to the embodiment does not use a mask for selectively etching the pixel region and the logic region to form the spacer.

Therefore, the manufacturing method of the image sensor according to the embodiment can easily provide an image sensor.

In the description of the embodiments, each substrate, pattern, region, film or layer or the like is described as being formed "on" or "under" of each substrate, pattern, region, film or layer or the like. In the case, “on” and “under” include both being formed “directly” or “indirectly” through other components. In addition, the upper or lower reference of each component is described with reference to the drawings. In addition, the size of each component in the drawings may be exaggerated for the sake of explanation and does not mean a size actually applied.

1 to 7 are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to an embodiment.

Referring to FIG. 1, an isolation layer 120 is formed on a semiconductor substrate 100 in which a pixel region PR and a logic region LR are defined. The device isolation layer 120 may be formed by a LOCOS process or an STI process.

Thereafter, polysilicon is deposited on the semiconductor substrate 100, and the deposited polysilicon is patterned by a photolithography process. Accordingly, the first gate electrode 210 and the second gate electrode 220 are formed on the semiconductor substrate 100.

The first gate electrode 210 is disposed in the pixel region PR, and the second gate electrode 220 is disposed in the logic region LR.

Thereafter, n-type impurities and p-type impurities are implanted into the pixel region PR of the semiconductor substrate 100 at different depths to form a photodiode 110.

In this case, the first gate electrode 210 is adjacent to the photodiode 110. That is, the photodiode 110 is formed next to the first gate electrode 210.

Referring to FIG. 2, a first oxide film 301, a nitride film 302, and a second oxide film 303 are sequentially stacked on the semiconductor substrate 100.

The first oxide layer 301 may be formed by a physical vapor deposition (PVD) process or a chemical vapor deposition (CVD) process. The first oxide film 301 may have a thickness of about 10 kPa to about 500 kPa.

The nitride film 302 may be formed by depositing nitride on the first oxide film 301 by a PVD process or a CVD process. The nitride film 302 may have a thickness of about 50 kPa to about 500 kPa.

The second oxide film 303 may be formed by depositing an oxide on the nitride film 302 by a PVD process or a CVD process. The thickness of the second oxide layer 303 may be about 500 kV to about 1500 kPa.

Referring to FIG. 3, the second oxide layer 303 is etched by an anisotropic etching process such as an etch back process. In more detail, the portion of the second oxide layer 303 disposed in the pixel region PR and the portion of the second oxide layer 303 are disposed at the same time.

Accordingly, a third spacer pattern 330 is formed on the nitride layer 302 on side surfaces of the first gate electrode 210 and the second gate electrode 220.

Referring to FIG. 4, the nitride film 302 is etched by an anisotropic process or an isotropic process. In more detail, a portion of the nitride layer 302 disposed in the pixel region PR and a portion of the nitride layer 302 are simultaneously etched.

Accordingly, second spacer patterns 320 are formed on side surfaces of the first gate electrode 210 and the second gate electrode 220.

An etching gas for etching the nitride film 302 has a high etching ratio of the nitride film 302 to the first oxide film 301. In more detail, the etching gas may have an etching ratio of about 3: 1 to about 7: 1 between the nitride layer 302 and the first oxide layer 301.

The etching gas may include carbon fluoride or carbon hydride fluoride. At this time, the composition ratio of carbon may be relatively high. In more detail, the etching gas may include a gas represented by Formula 1 and Formula 2 below.

Formula 1

CxFy

Wherein C is carbon, F is fluorine, x is 1-4, y is 2-8.

Formula 2

CmHnFw

Wherein H is hydrogen, m is 1-4, n is 1-3 and w is 2-8.

For example, the etching gas may include CH 3 F or C 4 F 8 .

In addition, the etching gas may further include an inert gas such as argon and oxygen gas. For example, the etching gas may include 1 sccm to 100 sccm of the CxFy, 1 sccm to 100 sccm of the CmHnFw, 1 sccm to 500 sccm of the argon, and 1 sccm to the oxygen gas. And 500 sccm.

Since the etching gas has a very high etching ratio with respect to the nitride film 302 compared with the first oxide film 301, only the nitride film 302 is removed. Accordingly, the etching gas does not damage the photodiode in the nitride film etching process.

The nitride film 302 etching process may be performed at a pressure of about 10 to 500 mT. In addition, the etching gas may be converted into plasma by a power of about 30W to about 1000W.

Referring to FIG. 5, the first oxide layer 301 is etched by a wet etching process or the like. In more detail, a portion of the first oxide layer 301 disposed in the pixel region PR and a portion of the logic region LR are simultaneously etched. In this case, since the first oxide film 301 is removed by a wet etching process, no damage is applied to the photodiode 110.

Accordingly, a first spacer pattern 310 is formed on side surfaces of the first gate electrode 210 and the second gate electrode 220.

That is, the first spacer pattern 310, the second spacer pattern 320, and the third spacer pattern 330 constitute a spacer 300.

Referring to FIG. 6, a high concentration of n-type impurities is injected into a region adjacent to the first gate electrode 210 to form a first drain 410. The first drain 410 is a floating diffusion layer FD that temporarily stores charges input from the photodiode 110.

In addition, a high concentration of n-type impurities are implanted into a region adjacent to the second gate electrode 220 to form a second drain 420.

Referring to FIG. 7, a nitride layer 500 is formed on an upper surface of the semiconductor substrate 100. The nitride layer 500 covers the photodiode 110, the first gate electrode 210, and the second gate electrode 220. In addition, the nitride layer 500 exposes an upper surface of the first gate electrode 210, an upper surface of the second gate electrode 220, the first drain 410, and the second drain 420. Exposed grooves.

Subsequently, a metal layer is coated on the nitride layer 500, and an upper surface of the first gate electrode 210, an upper surface of the second gate electrode 220, the first drain 410, and the like are formed by a heat treatment process. Silicide layers 600 are formed in the second drain 420.

That is, the silicide layers 600 are formed in the exposed grooves, respectively.

In this case, the nitride layer 500 is in direct contact with the photodiode 110.

Thereafter, an insulating layer 700 is formed on the nitride layer 500, and a contact plug 800 connected to the silicide layer 600 is formed by a damascene process. The contact plug 800 is connected to the silicide layer 600 through the exposed grooves. In addition, the contact plug 800 penetrates through the insulating layer 700.

In the method of manufacturing the image sensor according to the embodiment, the mask process is not performed to form the spacer 300. That is, a portion of the nitride layer 302 disposed in the pixel region PR and a portion of the nitride region LR are simultaneously etched and disposed in the pixel region PR of the second oxide layer 303. The portion and the portion disposed in the logic region LR are simultaneously etched.

That is, in the method of manufacturing the image sensor according to the embodiment, the mask process is not performed to protect the photodiode 110, so that the spacer 300 does not need to be formed.

Therefore, the image sensor according to the embodiment can be easily manufactured.

In addition, the features, structures, effects and the like described in the embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

Although the above description has been made based on the embodiments, these are merely examples and are not intended to limit the present invention. Those skilled in the art to which the present invention pertains may not have been exemplified above without departing from the essential characteristics of the present embodiments. It will be appreciated that many variations and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 to 7 are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to an embodiment.

Claims (10)

Providing a semiconductor substrate defining a pixel region and a logic region adjacent the pixel region; Forming a photodiode in the pixel region; Forming a first gate electrode adjacent to the photodiode and a second gate electrode in the logic region in the pixel region; Sequentially forming a first oxide film, a nitride film, and a second oxide film on the semiconductor substrate to cover the first gate electrode and the second gate electrode; Etching the second oxide film; And And etching a portion of the nitride layer disposed in the pixel region and a portion of the nitride region simultaneously. The method of claim 1, wherein the nitride layer is anisotropically etched using an etching gas including a gas having Formula 1 or Formula 2 below. Formula 1 CxFy Wherein C is carbon, F is fluorine, x is 1-4, y is 2-8. Formula 2 CmHnFw Wherein H is hydrogen, m is 1-4, n is 1-3 and w is 2-8. The method of claim 2, wherein the etching gas comprises argon and oxygen gas. The method of claim 3, wherein the etching gas comprises the CxFy 1 sccm to 100 sccm, the CmHnFw comprises 1 sccm to 100 sccm, the argon comprises 1 sccm to 500 sccm, the oxygen gas 1 Method for producing an image sensor comprising a sccm to 500 sccm. The method of claim 1, wherein in the forming of the nitride layer, the nitride layer is etched to expose an upper surface of a portion of the first oxide layer corresponding to the photodiode. The method of claim 1, wherein the portion of the first oxide layer corresponding to the pixel region and the portion corresponding to the logic region are simultaneously etched by a wet etching process. The method of claim 1, wherein in the etching of the nitride film, The nitride film is a method of manufacturing an image sensor is etched by the etching gas of the selectivity of the nitride film and the first oxide film is 3: 1 to 7: 1. A semiconductor substrate defining a pixel region and a logic region adjacent to the pixel region; A photodiode formed in the pixel region; A first gate electrode adjacent to the photodiode and a second gate electrode disposed in the logic region in the pixel region; And And a nitride layer covering the photodiode, the first gate electrode, and the second gate electrode and in direct contact with the photodiode. The image sensor of claim 8, wherein the nitride layer includes a first exposure hole exposing an upper surface of the first gate electrode and a second exposure hole exposing an upper surface of the second gate electrode. The semiconductor device of claim 9, further comprising: a first silicide layer disposed in the first exposure hole; And And a second silicide layer disposed in the second exposure hole.
KR1020090136370A 2009-12-31 2009-12-31 Image sensor and method of fabricating the same KR20110079352A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108063146A (en) * 2017-12-15 2018-05-22 上海华力微电子有限公司 The manufacturing method of cmos image sensor
CN114503268A (en) * 2019-12-04 2022-05-13 株式会社日本显示器 Semiconductor device with a plurality of semiconductor chips

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108063146A (en) * 2017-12-15 2018-05-22 上海华力微电子有限公司 The manufacturing method of cmos image sensor
CN114503268A (en) * 2019-12-04 2022-05-13 株式会社日本显示器 Semiconductor device with a plurality of semiconductor chips

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