KR20110079326A

KR20110079326A - Image sensor and method for manufacturing the same

Info

Publication number: KR20110079326A
Application number: KR1020090136344A
Authority: KR
Inventors: 전정한
Original assignee: 주식회사 동부하이텍
Priority date: 2009-12-31
Filing date: 2009-12-31
Publication date: 2011-07-07

Abstract

An image sensor according to an embodiment includes an isolation region formed in a semiconductor substrate such that a pixel region is defined; An optical sensing unit and a readout circuit formed in the pixel area; A first insulating layer including metal wiring formed on a front side of the semiconductor substrate; A second insulating layer formed on a back side of the semiconductor substrate opposite to the front surface of the semiconductor substrate; A via hole selectively formed in the second insulating layer to correspond to the device isolation region; And a light blocking region formed in the via hole.

Image Sensor, Device Separation

Description

Image sensor and manufacturing method thereof {IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME}

Embodiments relate to an image sensor and a method of manufacturing the same.

An image sensor is a semiconductor device that converts an optical image into an electrical signal, and is classified into a charge coupled device (CCD) image sensor and a CMOS image sensor (CIS). .

In general, an image sensor forms a photodiode on a silicon substrate by ion implantation. As the size of the photodiode gradually decreases for the purpose of increasing the number of pixels without increasing the chip size, the image characteristics of the light-receiving part area are reduced.

In addition, since the stack height is not reduced as much as the area of the light receiving unit is reduced, the number of photons incident on the light receiving unit also decreases due to a diffraction phenomenon of light called an airy disk.

As an alternative to overcome this, an attempt is made to receive light through the wafer back side to minimize the step difference of the light receiving unit, and to prevent the phenomenon of light interference caused by metal routing (back light receiving). Image sensor).

In a back-receiving image sensor, the isolation of the photodiode inside the substrate is the opposite side of the surface where the process proceeds. That is, the structure is very vulnerable to PD isolation of the photodiode.

Therefore, the rear light receiving image sensor has a structure that is very vulnerable to cross talk.

The embodiment provides a back-receiving image sensor capable of preventing crosstalk and a method of manufacturing the same.

In another embodiment, a method of manufacturing an image sensor includes: forming an isolation region in a semiconductor substrate such that a pixel region is defined; Forming a light sensing unit and a readout circuit in the pixel area; Forming a first insulating layer including wiring on a front surface of the semiconductor substrate; Forming a second insulating layer on a back surface of the semiconductor substrate; Forming a via hole in the second insulating layer to correspond to the device isolation region; And forming a light blocking region inside the via hole.

The image sensor and the method of manufacturing the same according to the embodiment prevent the crosstalk and noise of the light sensing unit by the device isolation region formed on the front side of the semiconductor substrate and the light blocking region formed on the back side of the semiconductor substrate. can do.

In addition, the incident rate of light may be improved and the light sensitivity may be improved through an air pipe formed between the light blocking regions so as to correspond to each unit pixel.

That is, since the air pipe is an empty space, scattering and refraction of light can be prevented as much as possible by the air pipe.

In addition, the interference caused to the photodiodes of different colors adjacent to each other by the air pipe can be suppressed as much as possible.

Accordingly, noise and color imbalance characteristics of the image sensor may be improved.

Hereinafter, a back light receiving image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where it is described as being formed "on / under" of each layer, it is understood that the phase is formed directly or indirectly through another layer. It includes everything.

9 is a cross-sectional view of an image sensor according to an embodiment.

The image sensor according to the embodiment may include an isolation region 110 formed in the semiconductor substrate 100 to define a pixel region; An optical sensing unit 120 and a readout circuit 130 formed in the pixel region; A first insulating layer 140 including wirings M1 and M2 formed on a front side of the semiconductor substrate 100; A second insulating layer 150 formed on a back side of the semiconductor substrate 100 opposite the front surface of the semiconductor substrate 100; A via hole (V) selectively formed in the second insulating layer 150 to correspond to the device isolation region 110; And a light blocking region 200 formed in the via hole V.

Embodiments may include a hard mask layer 180 formed on the second insulating layer 150; A color filter 210 formed on the hard mask layer 180 corresponding to the light sensing unit 120; And a micro lens 220 formed on the color filter 210.

The via hole V may expose a portion of the second insulating layer 150 or may expose a rear surface of the semiconductor substrate 100.

The light blocking region 200 formed in the via hole V may be formed of metal.

In an embodiment, the electrical crosstalk may be prevented by the device isolation region 110 and the optical crosstalk may be prevented by the light blocking region 200.

The second insulating layer 150 corresponding to the light sensing unit 120 may be removed and an air pipe 190 may be formed.

That is, a box-shaped air pipe 190 may be formed on the second insulating layer 150 corresponding to the light sensing unit 120, and the incident rate of light may be improved.

An antireflection pattern 165 may be formed on sidewalls of the second insulating layer 150 corresponding to both sides of the air pipe 190. For example, the antireflection pattern 165 may be metal.

According to the image sensor according to the embodiment, the electrical crosstalk and the optical crosstalk of the light sensing unit corresponding to the unit pixel may be blocked by the first and light blocking regions, and the image characteristics may be improved.

Hereinafter, a method of manufacturing an image sensor according to an embodiment will be described with reference to FIGS. 1 to 9.

First, as shown in FIG. 1, the pixel isolation region is defined by forming the device isolation region 110 on the front side of the semiconductor substrate 100.

In an embodiment, the semiconductor substrate 100 may be a high concentration p-type substrate (p ++). The semiconductor substrate 100 may include a low concentration p-type epi layer (p-epi) by performing an epitaxial process.

Although not shown, an ion implantation layer (not shown) may be formed on the entire surface of the semiconductor substrate 100. That is, in the embodiment, the lower portion of the semiconductor substrate 100 can be easily removed by forming the ion implantation layer before the wiring process. The ion implantation layer may be formed by implanting ions such as hydrogen (H) or helium (He), but is not limited thereto.

When the ion implantation layer is formed, the backside of the semiconductor substrate 100 may be easily and stably removed using a preformed ion implantation layer instead of removing the backside of the semiconductor substrate 100 by back grinding. It becomes possible. Accordingly, the manufacturing yield of the back light receiving image sensor can be significantly increased.

The device isolation region 110 may be formed on the entire surface of the semiconductor substrate 100 by an STI process. Although not shown, the on-injection region may be further formed to isolate the light sensing unit 120. The ion implantation region may be formed before or after the formation of the device isolation region 110.

Next, the light sensing unit 120 and the readout circuit 130 are formed in the pixel area.

The light sensing unit 120 may be a photodiode.

The light sensing unit 120 may be formed on the semiconductor substrate by pn junction by an n-type ion implantation region and a p-type ion implantation region, but is not limited thereto.

By the p-type ion implantation region, excess electrons and the like can be prevented. In addition, the embodiment may form a PNP junction to obtain a charge dumping effect.

The readout circuit 130 for signal processing is formed on the semiconductor substrate 100 on which the light sensing unit 120 is formed.

For example, the readout circuit 130 may include a transfer transistor, a reset transistor, a drive transistor, and a select transistor, but is not limited thereto.

The embodiment may be a mirror type pixel (Mirror Type-2-Shared) structure in which two pixels share one floating diffusion region, but the present invention is not limited thereto, and each unit pixel may include one floating diffusion region. .

Next, the first insulating layer 140 and the wiring are formed on the entire surface of the semiconductor substrate 100. For example, the wiring may include a first metal M1 and a second metal M2.

Meanwhile, a carrier wafer (not shown) may be bonded onto the first insulating layer 140 including the wiring. The carrier wafer may be a means for handling the semiconductor substrate 100.

Thereafter, a part of the back side opposite to the front side of the semiconductor substrate 100 is removed. For example, the lower side is removed based on the ion implantation layer (not shown) of the semiconductor substrate 100.

That is, the heat treatment is performed on the ion implantation layer to make the hydrogen ions porous, and then cut and remove the hydrogen ions, and the upper side of the semiconductor substrate 100 remains. Thereafter, a planarization process may be performed on the rear surface of the cut semiconductor substrate 100.

Alternatively, the opposite side of the front side of the semiconductor substrate 100 may be removed by backgrinding.

Accordingly, an epitaxial layer (p-epi) of the semiconductor substrate 100 may be exposed.

Referring to FIG. 2, a second insulating layer 150 is formed on the back side of the semiconductor substrate 100. For example, the second insulating layer 150 may be an oxide film or a nitride film.

Referring to FIG. 3, a trench T is selectively formed in the second insulating layer 150 to selectively expose a rear surface of the semiconductor substrate 100.

The trench T may expose a rear surface of the semiconductor substrate 100 corresponding to each unit pixel.

The trench T may be formed in the second insulating layer 150 to correspond to the light sensing unit 120 of the unit pixel, respectively.

In plan view, the second insulating layer 150 may be formed in a mesh type by the trench T. Referring to FIG.

Next, an anti-reflective layer 150 is formed on the sidewall of the trench T.

For example, the anti-reflection film 160 may be a metal including aluminum (Al), tungsten (W), titanium (Ti), or the like.

The anti-reflection film 160 is selectively formed only on sidewalls of the trench T through a blanket etch process after depositing a metal film on the second insulating layer 150 including the trench T. can do.

The anti-reflection film 160 may be formed only on sidewalls of the trench T, and a rear surface of the semiconductor substrate 100, which is a bottom surface of the trench T, may be exposed.

Referring to FIG. 4, a dummy pattern 170 is formed in the trench T. Referring to FIG.

The dummy pattern 170 may be formed by gap-filling a polymer material in the second insulating layer 150 including the trench T.

For example, the dummy pattern 170 may be formed of a polymer material including polyimide.

Specifically, the dummy pattern 170 may be formed by sequentially performing a spin coating process, a baking process, and a curing process at a temperature of 50 to 120 ° C.

Therefore, the dummy pattern 170 may be gap-filled in the trench T, and the dummy pattern 170 may have the same surface height as the second insulating layer 150.

Accordingly, the dummy pattern 170 may be arranged in a matrix form on the rear surface of the semiconductor substrate 100.

Referring to FIG. 5, a hard mask layer 180 is formed on the second insulating layer 150 including the dummy pattern 170 and the anti-reflection film 165.

For example, the hard mask layer 180 may be an oxide film or a nitride film or may be formed by stacking them. The hard mask layer 180 may be formed to a thickness of 200 ~ 1000Å.

The hard mask layer 180 may be formed on the entire upper portion of the second insulating layer 150, and then support the structure formed on the hard mask layer 180.

Referring to FIG. 6, via holes V are selectively formed in the second insulating layer 150.

The via hole V may be formed by removing the second insulating layer 150, the anti-reflection film 160, and the hard mask layer 180 corresponding to the edge of the dummy pattern 170.

The via hole V may be formed to correspond to the device isolation region 110. Alternatively, the via hole V may be formed in a region corresponding to the isolation region 110 and the lead-out circuit 130.

That is, the via hole V may be selectively formed in the second insulating layer 150 except for a region corresponding to the light sensing unit 120.

For example, to form the via hole V, a photoresist pattern 10 is formed on the hard mask layer 180. The photoresist pattern 10 may selectively expose the hard mask layer 180 corresponding to the via hole predetermined region. The photoresist pattern 10 may selectively expose the hard mask layer 180 corresponding to the second insulating layer 150 formed in a mesh type.

The via hole V may be formed through an etching process using the photoresist pattern 10 as an etching mask.

During the etching process, the second insulating layer 150 and the anti-reflection film 160 are etched to a predetermined thickness, and the anti-reflection pattern 165 and the second insulating layer pattern 155 are formed under the via hole V. Can be.

In particular, the depth of the via hole V may be controlled by controlling parameters such as process time and etching gas during the etching process.

For example, the via hole V is formed to have a first height H1, and the antireflection pattern 160 and the second insulating layer pattern 155 have a second height H2 higher than the first height H1. )

A portion of the dummy pattern 170 under the hard mask layer 180 may be exposed by the via hole (V).

That is, the via hole V may have a minimum depth for exposing the dummy pattern 170.

Alternatively, the via hole V may be formed to expose a rear surface of the semiconductor substrate 100.

Thereafter, the photoresist pattern 10 may be removed through a general stripping process.

When viewed in plan view of the second insulating layer 150, the via hole V may have a structure selectively formed in an edge region of the second insulating layer 150 formed in a mesh type. When viewed from the plane of the hard mask layer 180, the via hole V is selectively formed in an area corresponding to an upper portion of the second insulating layer 150 except for a region corresponding to the dummy pattern 170. It may be.

That is, at least one via hole V may be formed along the second insulating layer 150 formed as the mesh type.

Referring to FIG. 7, the dummy pattern 170 in the trench T is removed and an air pipe 190 is formed.

The air pipe 190 may be formed by exposing the trench T through a selective etching process for the dummy pattern 170.

The dummy pattern 170 may be removed through a wet etching process using the hard mask layer 180 as an etching mask. That is, an etching chemical penetrates into the dummy pattern 170 exposed through the via hole V, so that only the dummy pattern 170 may be selectively removed.

An empty air pipe 190 may be formed between the back surface of the semiconductor substrate 100 and the hard mask layer 180 by removing the dummy pattern 170 and exposing the trench T.

The air pipes 190 may be formed to correspond to the light sensing unit 120, respectively.

Since the refractive and scattering of incident light is prevented to the maximum by the air pipe 190, the light sensitivity of the light detecting unit 120 may be increased and image characteristics may be improved.

Referring to FIG. 8, a metal film is gap-filled in the via hole V, and a light blocking region 200 is formed.

The light blocking region 200 may be selectively formed only in the via hole V, and may have the same surface height as that of the hard mask layer 180.

At least one light blocking region 200 may be formed between the air pipes 190 adjacent to each other.

For example, the light blocking region 200 may be formed of a metal capable of blocking light such as aluminum (Al), tungsten (W), tantalum (Ta), titanium (Ti), or the like.

The light blocking region 200 may be formed between the air pipes 190 and guide light to the light sensing unit 120 of the corresponding pixel.

For example, when light incident at an inclination angle is incident to the adjacent pixel instead of the corresponding pixel, the light may be incident by the light blocking area 200.

Accordingly, crosstalk and noise characteristics of the image sensor can be improved.

9, a color filter 210 is formed on the hard mask layer 180.

The color filter 210 may be formed to correspond to each unit pixel. That is, the color filter 210 may be formed on the hard mask layer 180 corresponding to each of the air pipes 190.

For example, the color filter 210 may be formed one by one for each unit pixel using a dyed photoresist and separate colors from incident light. The color filter 210 may be a red, green, and blue color filter.

In the case where the light sensing unit 120 is an R, G, or B vertical stacked photodiode, a color filter may not be formed.

The micro lens 220 may be formed on the color filter 210.

The micro lens 220 may be formed in a hemispherical shape, and may focus light to the light detecting unit 120.

In the method of manufacturing the image sensor according to the embodiment, the device isolation region may be formed on the front side of the semiconductor substrate to block electrical crosstalk of the light sensing unit. In addition, an optical blocking region may be formed on a rear surface opposite to the front surface of the semiconductor substrate to block optical crosstalk of the light sensing unit.

In particular, the light blocking area can suppress interference of light sensing units adjacent to each other as much as possible, and can prevent noise and color imbalance of each unit pixel.

Accordingly, the light sensitivity of the rear light receiving image sensor may be improved and image characteristics may be improved.

In the method of manufacturing an image sensor according to an embodiment, an air pipe is formed on a rear surface of the semiconductor substrate corresponding to the light sensing unit and the microlens, and light is incident to the light sensing unit through the air pipe. Can be.

That is, the air pipe may be formed in a box shape having an empty space therein, and light may be incident to the light sensing unit of a corresponding pixel by preventing the refraction and scattering of light passing through the air pipe as much as possible.

Accordingly, the light sensitivity of the rear light receiving image sensor can be further improved.

The present invention is not limited to the described embodiments and drawings, and various other embodiments are possible within the scope of the claims.

1 to 9 are cross-sectional views illustrating a manufacturing process of an image sensor according to an embodiment.

Claims

An isolation region formed in the semiconductor substrate such that the pixel region is defined;

An optical sensing unit and a readout circuit formed in the pixel area;

A first insulating layer including metal wiring formed on a front side of the semiconductor substrate;

A second insulating layer formed on a back side of the semiconductor substrate opposite to the front surface of the semiconductor substrate;

A via hole selectively formed in the second insulating layer to correspond to the device isolation region; And

And a light blocking area formed in the via hole.

The method of claim 1,

The light blocking area is formed of a metal image sensor.

The method of claim 1,

And a trench formed in the second insulating layer corresponding to the light sensing unit, and a dummy pattern formed in the trench.

The method of claim 1,

And the second insulating layer corresponding to the light sensing unit is removed and an air pipe is formed.

The method of claim 1,

An image sensor having an antireflection pattern formed on sidewalls of the second insulating layer.

The method of claim 1,

A hard mask layer formed on the second insulating layer;

A color filter formed on the hard mask layer corresponding to the light sensing unit; And

An image sensor comprising a micro lens formed on the color filter.

The method of claim 1,

And the via hole exposes a portion of the second insulating layer or exposes a back surface of the semiconductor substrate.

Forming an isolation region in the semiconductor substrate such that the pixel region is defined;

Forming a light sensing unit and a readout circuit in the pixel area;

Forming a first insulating layer including wiring on a front surface of the semiconductor substrate;

Forming a second insulating layer on a back surface of the semiconductor substrate;

Forming a via hole in the second insulating layer to correspond to the device isolation region; And

And forming a light blocking region inside the via hole.

The method of claim 8,

The light blocking region is formed by gap-filling a metal material in the via hole.

The method of claim 8,

And forming an air pipe inside the second insulating layer corresponding to the light sensing unit after forming the via hole.

The method of claim 10,

Forming the air pipe,

Forming a trench to expose a rear surface of the semiconductor substrate corresponding to the light sensing unit;

Forming a dummy pattern in the trench;

Forming a hard mask layer on the second insulating layer including the dummy pattern;

Selectively removing the hard mask layer and the second insulating layer corresponding to the first device isolation region to partially expose the dummy pattern, and forming the via holes;

And removing the dummy pattern through a wet etching process on the dummy pattern exposed by the via hole.

The method of claim 11,

And forming an antireflection pattern on sidewalls of the trench after forming the trench.

The method of claim 11,

The dummy pattern is a manufacturing method of an image sensor formed of a polymer material.

The method of claim 11,

And forming a color filter and a micro lens on the hard mask layer corresponding to the light receiving unit.