KR20110071846A - Electrophoretic display device and method of fabricating the same - Google Patents

Abstract

PURPOSE: An electrophoretic display device and a method for manufacturing the same are provided to prevent the failure of a display by checking a positional alignment of a color filter pattern. CONSTITUTION: A switching element is located in the display area. A protection layer(130) covers the switching element. A pixel electrode(140) located on the protective layer is connected to the switching element. A test pixel pattern(158) is located on the non-display area. An electrophoretic film(160) is located in the upper part of the pixel electrode. The color filter patterns are located on the electrophoretic film coping with each sub pixel. A color filter layer(170) comprises test color filter patterns.

Description

Electrophoretic display device and method of manufacturing the same {Electrophoretic display device and method of fabricating the same}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrophoretic display device, and more particularly, to an electrophoretic display device having an improved display quality by determining alignment of a color filter layer and a manufacturing method thereof.

In general, liquid crystal displays, plasma displays, and organic field displays have become mainstream display devices. However, recently, various types of display devices have been introduced to satisfy rapidly changing consumer demands.

In particular, with the advancement and portability of the information usage environment, the company is accelerating to realize light weight, thin film, high efficiency and color video. As a part of this, research on electrophoretic display devices combining only the advantages of paper and existing display devices is being actively conducted.

Electrophoretic displays have been in the spotlight as the next generation of display devices for their excellent contrast ratio, visibility, fast response speed, natural color display, low cost and ease of portability.

In addition, the electrophoretic display device does not require a polarizing plate, a backlight unit, a liquid crystal layer, etc., unlike a liquid crystal display device, thereby reducing manufacturing costs.

Hereinafter, a conventional electrophoretic display device will be described with reference to the accompanying drawings.

1 is a view briefly showing a structure of the electrophoretic display to explain the driving principle.

As shown, the conventional electrophoretic display device 1 includes a microcapsule layer 57 interposed between the first and second substrates 11 and 36 and the first and second substrates 11 and 36. It includes. The microcapsule layer 57 includes a plurality of capsules 63 filled with a plurality of white electrophoretic particles 59 and black electrophoretic particles 61 charged through a condensation polymerization reaction.

Meanwhile, a plurality of pixel electrodes 28 connected to a plurality of thin film transistors (not shown) are formed in each pixel area (not shown) on the first substrate 11. That is, the plurality of pixel electrodes 28 are selectively applied with a positive voltage or a negative voltage, respectively. In this case, when the size of the capsule 63 including the white electrophoretic particles 59 and the black electrophoretic particles 61 is not constant, only the capsule 63 having a predetermined size may be selectively used.

When a voltage having positive or negative polarity is applied to the microcapsule layer 57 described above, the charged white electrophoretic particles and the black electrophoretic particles 59 and 61 in the capsule 63 are reversed. It is pulled toward the polarity. That is, when the black electrophoretic particles 61 move upward, black is displayed, and when the white electrophoretic particles 59 move upward, white is used.

Hereinafter, an electrophoretic display device according to the related art will be described in detail with reference to the accompanying drawings.

FIG. 2 is a schematic cross-sectional view of a conventional electrophoretic display device, and the same reference numerals are used for the same names as those of FIG. 1.

As shown in the drawing, the electrophoretic display device 1 according to the related art has a microcapsule interposed between opposingly bonded first and second substrates 11 and 36 and the first and second substrates 11 and 36. Layer 57 is included. The microcapsule layer 57 has a first and second adhesive layers 51 and 53 made of a transparent material and a common electrode 55 made of a transparent conductive material between the microcapsule layer 57 and a condensation polymerization reaction. A plurality of black electrophoretic particles 61 and white electrophoretic particles 59 charged through are attached in a film form together with a plurality of capsules 63 filled therein. In addition, the black electrophoretic particles 82 are positively charged and the white electrophoretic particles 84 are negatively charged.

The second substrate 36 is made of transparent plastic or glass, and the first substrate 11 is mainly made of an opaque stainless material, and if necessary, a transparent plastic material or glass is used. Can be.

In this case, a color filter layer 40 including red, green, and blue color filter patterns is formed on the entire lower surface of the second substrate 36.

On the other hand, a gate wiring (not shown) and a data wiring (not shown) are formed on the first substrate 10 to vertically intersect in a matrix to define the pixel region P. The gate wiring (not shown) and data are formed on the first substrate 10. The thin film transistor Tr, which is a switching element, is formed for each pixel region P at an intersection point of the wiring (not shown).

The thin film transistor Tr overlaps the gate electrode 14 extending from the gate wiring (not shown), the gate insulating layer 16 covering the gate electrode 14, and the gate electrode 14, and the active layer ( A semiconductor layer 18 composed of 18a and an ohmic contact layer 18b, a source electrode 20 in contact with the semiconductor layer 18 and extending from a data line (not shown), and the source electrode 20 Spaced drain electrodes 22.

In addition, a passivation layer 26 including a drain contact hole 27 exposing the drain electrode 22 is formed on the entire surface of the thin film transistor Tr.

The pixel electrode 28 connected to the drain electrode 22 through the drain contact hole 27 on the passivation layer 26 corresponds to each pixel region P. As shown in FIG. The pixel electrode 28 is mainly composed of one selected from a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO).

The electrophoretic display device 1 having the above-described configuration uses pixels including natural light or room light as external light sources, and is selectively applied with a positive polarity or a negative polarity by the thin film transistor Tr. The electrode 28 induces the positional change of the plurality of white electrophoretic particles 59 and the black electrophoretic particles 61 filled in the capsule 63 to implement an image.

Hereinafter, a method of manufacturing the electrophoretic display having the above-described configuration will be described.

3A to 3E are cross-sectional views illustrating manufacturing steps according to a manufacturing method of a conventional electrophoretic display device. In this case, for convenience of description, a display area in which a plurality of unit pixels are formed and an outside of the display area are defined as non-display areas.

First, as shown in FIG. 3A, first and second adhesive layers 7 and 9 are formed on the upper and lower surfaces of the first carrier substrate 5, respectively, and the first and second adhesive layers 7 and 9 are formed. The first and second metal thin film substrates 11 and 13 made of stainless material are attached to the outside.

Next, an insulating layer (not shown) is formed on the entire surface of the first metal thin film substrate 11, and gate and data lines (not shown) that cross each other on the insulating layer (not shown) define the pixel region P. ) And a thin film transistor Tr connected to the gate line (not shown) and the data line (not shown) in each pixel region (P). In this case, a non-display area (not shown) outside the display area (not shown) may include a gate pad electrode (not shown) connected to the gate wire (not shown) and a data pad electrode (not shown) connected to the data wire (not shown). ) Is formed.

Subsequently, an organic insulating material is coated on the entire surface of the thin film transistor Tr to form a protective layer 26, and then patterned to form a drain electrode (not shown) of the thin film transistor Tr in each pixel region P. FIG. A drain contact hole 27 exposing and a gate and data pad contact hole (not shown) exposing the gate and data pad electrodes (not shown) are formed, respectively.

Next, a pixel electrode 28 is formed on the protective layer 26 to contact the drain electrode (not shown) through the drain contact hole 27 for each pixel region P by depositing and patterning a transparent conductive material. In the non-display area (not shown), an array substrate 22 for an electrophoretic display device is completed by forming gate and data auxiliary pad electrodes (not shown) in contact with each gate and data pad electrode (not shown). do.

Next, as shown in FIG. 3B, third and fourth adhesive layers 32 and 34 are formed on the upper and lower surfaces of the second carrier substrate 30, respectively, and are flexible to the outside of the adhesive layers 32 and 34. First and second transparent substrates 36 and 38 of plastic material having properties are attached.

Subsequently, red, green, and blue color filter patterns 40a, 40b, and 40c are sequentially repeated on the first transparent substrate 36 to correspond to the pixel areas P of the array substrate 22. The color filter substrate 42 for the electrophoretic display device is completed by forming the color filter layer 40. In this case, the edges of the color filter patterns 40a, 40b, and 40c may overlap each other, and each pixel area P may be bordered to further form a black matrix.

Next, as illustrated in FIG. 3C, a plurality of fifth and sixth adhesive layers 51 and 53 are disposed on the outermost substrate of the array substrate 22 for the electrophoretic display, and charged through a condensation polymerization reaction therebetween. The microcapsule layer 57 including a plurality of capsules 63 filled with white electrophoretic particles 59 and black electrophoretic particles 61 and a common electrode 55 formed on a front surface of the transparent conductive material are formed. The electrophoretic film 65 is attached. In this case, the common electrode 55 is attached to be positioned above the microcapsule layer 57.

Next, as shown in FIG. 3D, the color filter substrate 42 for the electrophoretic display device is disposed on the color filter layer 40 and the electrophoresis facing the array substrate 22 to which the electrophoretic film 65 is attached. After opposing the films 65 to face each other, the films 65 are bonded to form a panel state.

Next, as shown in FIG. 3E, the first carrier substrate 5 and the first and second adhesive layers 7 on the outside of the components constituting the array substrate 22 of FIG. 3D in the panel state are formed. , 9) and the second metal thin film substrate 13, and the second carrier substrate 30 and the third and fourth adhesive layers 32 and 34 on both sides thereof in the color filter substrate (65 in FIG. 3D) in succession. ) And the second transparent substrate 38 are removed to complete the electrophoretic display device 1.

However, in the above-described method of manufacturing an electrophoretic display device, in the case of an array substrate, the first and second metal thin film substrates of stainless material are attached to each other after interposing the first and second adhesive layers on both sides of the first carrier substrate. A thin film transistor is formed on the first metal thin film substrate.

Meanwhile, in the case of the color filter substrate, the first and second transparent substrates made of a flexible plastic material are adhered to both surfaces of the second carrier substrate through the third and fourth adhesive layers, and a color filter layer is formed on the first transparent substrate. After the process, the array substrate and the color filter substrate are bonded to each other, and a process of detaching unnecessary parts including the first and second carrier substrates is performed again.

Therefore, a complicated problem arises in the manufacturing process.

In addition, although it is necessary in the manufacturing process of the electrophoretic display device, in the final state, deterioration due to stress occurs due to the desorption process of unnecessary components, so that the alignment error between the array substrate and the color filter substrate is severely generated. There is a problem of degrading quality.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and an object thereof is to provide an electrophoretic display device and a method of manufacturing the same, which simplifies the manufacturing method and minimizes the occurrence of errors between upper and lower substrates due to detachment.

In addition, it is another object of the present invention to be able to confirm the positional alignment of the color filter patterns, thereby preventing defects.

In order to achieve the above object, the present invention provides a display region in which a unit pixel including at least three subpixels is formed, and a substrate in which a non-display region around the display region is defined; A switching element positioned in the display area; A protective layer covering the switching element; A pixel electrode on the protective layer and connected to the switching element; A test pixel pattern positioned in the non-display area; An electrophoretic film positioned on the pixel electrode; A color filter pattern positioned on the electrophoretic film and corresponding to each of the sub-pixels; A color filter layer including a test color filter pattern positioned corresponding to each of the test pixels is provided, and the test pixel pattern has the same shape as that of the unit pixel.

The color filter layer may include red, green, and blue color filter patterns, and the red, green, and blue color filter patterns may be red, green, or blue, respectively, in resists composed of 20-40 wt% epoxy and 60-80 wt% acrylic binder. It is characterized by the addition of blue dye.

The unit pixel may include red, green, blue, and white sub-pixels arranged in a 2 * 2 matrix.

The test pixel pattern may include a first pattern having a quadrangular shape and a second pattern having a cross shape and positioned in the first pattern.

The unit pixel may include red, green, and blue sub-pixels arranged in a first direction.

The test pixel pattern may include a first pattern having a rectangular shape and two second patterns disposed in the first pattern and spaced apart from each other in parallel.

The protective layer includes a first insulating material layer made of an organic insulating material and a second insulating material layer made of an inorganic insulating material, and the test pixel pattern is positioned on the first insulating material layer and the first insulating material layer It is characterized by contact with.

In another aspect, the present invention provides a method for manufacturing a display device including: forming a switching element in a display area in which a unit pixel including at least three subpixels is formed and a non-display area around the display area; Forming a protective layer covering the switching element; Forming a pixel electrode formed on the protective layer and connected to the switching element; Forming a test pixel pattern in the non-display area; Attaching an electrophoretic film on the pixel electrode; Forming a color filter pattern corresponding to each of the subpixels and a test color filter pattern corresponding to each of the test pixels on the electrophoretic film, wherein the test pixel pattern has the same shape as the unit pixel. It provides a method of manufacturing an electrophoretic display device comprising.

The color filter pattern includes a red, green, and blue color filter pattern, and the red, green, and blue color filter patterns are respectively composed of 20 to 40 wt% epoxy and 60 to 80 wt% acrylic binder. A blue dye is added, and the color filter pattern is formed directly on the electrophoretic film at a process temperature of less than 100 ℃.

The forming of the color filter pattern corresponding to each of the sub-pixels and the test color filter pattern corresponding to each of the test pixels on the electrophoretic film may include a photolithography process, an inkjet printing process, a roll printing process, It is a characteristic made by either of the thermal transfer processes.

The forming of the protective layer covering the switching device may include sequentially stacking an organic insulating material layer and an inorganic insulating material layer on the entire surface of the substrate including the switching device; Patterning the inorganic insulating material layer and the organic insulating material layer to form a contact hole exposing a first portion of the switching element; And completely removing the inorganic insulating material layer corresponding to the non-display area, wherein the test pixel pattern is formed on the organic insulating material layer, and the test color filter pattern is in contact with the organic insulating material layer. It is characterized by.

The forming of the protective layer covering the switching device may include: sequentially stacking a first inorganic insulating material layer, an organic insulating material layer, and a second inorganic insulating material layer on the entire surface of the substrate including the switching device; Patterning the second inorganic insulating material layer, the organic insulating material layer and the first inorganic insulating material layer to form a contact hole exposing a first portion of the switching element; And completely removing the second inorganic insulating material layer corresponding to the non-display area, wherein the test pixel pattern is formed on the organic insulating material layer, and the test color filter pattern is formed on the organic insulating material layer. It is characterized by contact.

The electrophoretic display device according to the present invention has an advantage of confirming whether or not the color filter pattern is aligned by providing a test pattern for confirming the alignment of the color filter pattern in the non-display area.

In addition, by directly forming the color filter pattern on the electrophoretic film, there is no need to separately produce a color filter substrate. Therefore, the manufacturing process is simplified and the manufacturing cost can be reduced.

Hereinafter, an electrophoretic display device according to the present invention will be described with reference to the accompanying drawings.

4 is a cross-sectional view of a part of an electrophoretic display device according to a first exemplary embodiment of the present invention. For convenience of description, an area in which an electrophoretic film is located and an image is displayed is defined as a display area DR and an area around the display area DR as a non-display area NDR. In addition, a pixel area P in which the pixel electrode and the thin film transistor are positioned is defined in the display area DR, and a gate pad area GPR, a data pad area DPR, and a test pattern are defined in the non-display area NDR. Define a region (TPR).

As shown, the electrophoretic display includes a substrate 110, an electrophoretic film 160, a color filter layer 170, a protective sheet 180, and a test pixel pattern 158. The electrophoretic film 160 covers the display area DR of the substrate 110, and the color filter layer 170 and the protective sheet 180 are sequentially stacked on the electrophoretic film 160. .

A gate wiring (not shown) is disposed in the display area DR of the substrate 110, and the gate insulating layer 118 is disposed to cover the gate wiring.

The data line 122 is positioned on the gate insulating layer 118. The data line 122 crosses the gate line to define the pixel area P. In the pixel area P, a thin film transistor Tr connected to the gate line and the data line 122 is positioned. have.

The thin film transistor Tr is disposed on the substrate 110 and is connected to the gate wiring 112, the gate insulating layer 118 covering the gate electrode 112, and the gate insulating layer 118. The semiconductor layer 120 is disposed in the semiconductor layer 120 and overlaps the gate electrode 112, and the source electrode 124 and the drain electrode 126 on the semiconductor layer 120 and spaced apart from each other. The semiconductor layer 120 includes an active layer 120a made of pure amorphous silicon and an ohmic contact layer 120b made of impurity amorphous silicon. The source electrode 124 is connected to the data line 122.

The passivation layer 130 is positioned to cover the thin film transistor Tr and the data line 122. The protective layer 130 includes a first insulating material layer 131a made of an organic insulating material and a second insulating material layer 133 made of an inorganic insulating material. The passivation layer 130 includes a drain contact hole 135a exposing the drain electrode 126 of the thin film transistor Tr. The organic insulating material is any one of photoacryl and benzocyclobutene (BCB), and the inorganic insulating material layer is either silicon nitride or silicon oxide.

The reason why the protective layer 130 is formed in a double layer structure is to enhance the bonding force with the pixel electrode 140 formed on the protective layer 130 and further improve the characteristics of the thin film transistor Tr. That is, the second insulating material layer 133, which is the upper layer of the protective layer 130, is formed of an inorganic insulating material to improve the bonding force with the pixel electrode 140 formed on the protective layer 130. This is because the parasitic capacitance may be minimized by forming the second insulating material layer 131a, which is a lower layer of the protective layer 130, with a thick organic insulating material.

On the passivation layer 130, pixel electrodes 140 connected to the drain electrodes 126 of the thin film transistor Tr through the drain contact holes 135a are positioned in the pixel regions P. Referring to FIG. The pixel electrode 140 has a structure in which an opaque first pixel electrode 141 and a transparent second pixel electrode 143 are stacked.

Although the first pixel electrode 141 is positioned between the passivation layer 130 and the second pixel electrode 143 in the drawing, the second pixel electrode 143 is formed of the passivation layer 130 and the first electrode. It may be located between one pixel electrode 141.

The first pixel electrode 141 may be formed of any one of copper (Cu), copper alloy (Cu alloy), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), and molybdenum-titanium alloy (MoTi). The second pixel electrode 143 may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). Although not shown, the pixel electrode 140 may be formed of a single layer of an opaque metal material, and in this case, MoTi is preferable.

The pixel electrode 140 is configured to cover the thin film transistor Tr, and the characteristics of the thin film transistor Tr are deteriorated due to photo-current generated when the active layer 120a is exposed to light. To prevent it.

Although not shown, a metal pattern overlapping a portion of the gate wiring (not shown) is disposed on the gate insulating layer 118, and the protective layer 130 includes a contact hole exposing the metal pattern. have. The pixel electrode 140 is connected to the metal pattern through the contact hole.

In this case, the gate wiring becomes a first storage electrode, the metal pattern becomes a second storage electrode, and the gate insulating layer 118 between the first and second storage electrodes becomes a dielectric layer, thereby storing a storage capacitor. ). The metal pattern is disposed on the same layer as the data line 122, the source electrode 124, and the drain electrode 126, and is formed of the same material.

The electrophoretic film 160 is positioned on the pixel electrode 140. The electrophoretic film 160 includes a microcapsule layer 164, an adhesive layer 162 under the microcapsule layer 164, a common electrode 166 on the microcapsule layer 164, and the common electrode. 166 and an upper base film 168.

The microcapsule layer 164 includes a plurality of capsules 161 filled with white electrophoretic particles 165 and black electrophoretic particles 163 charged through a condensation polymerization reaction.

For example, the microcapsule layer 164 is not composed of a plurality of capsules 161 filled with the white electrophoretic particles 165 and the black electrophoretic particles 163, and includes a microcapsule layer containing only white charged particles (not shown). Or it may have a configuration of a microcapsule layer (not shown) containing only black charged particles.

Although not shown in the drawings, in this case, when the microcapsule layer including only the black or white charged particles is configured, the common electrode formed on the front of the display area above the microcapsule layer is not configured on the electrophoretic film, and instead The pixel electrode formed in each pixel region has a plurality of bars, and the common electrode is formed on the passivation layer in the form of a plurality of bars alternately.

In this case, each of the plurality of common electrodes forms a common wiring in parallel with the gate wiring in the gate wiring forming step, and forms a common contact hole in the passivation layer and the gate insulating layer that expose the common wiring. It is characterized by being configured to be in contact with the wiring.

The common electrode 166 is made of a transparent conductive material such as ITO and IZO, and forms an electric field with the pixel electrode 140 to drive the microcapsule layer 164.

The base film 168 has a transparent and flexible property and has a thickness of less than 30μm. If the thickness of the base film 150 is too thick, a parallax problem occurs in which an image to be displayed in one pixel is seen in a neighboring pixel.

Accordingly, in order to prevent this, the base film 150 may have a thickness of about 10 μm to 50 μm, depending on the size of the display device. Preferably it is to have a thickness of less than 30μm. Even when the common electrode 153 is formed together with the base film 150 on the microcapsule layer 164, the common electrode 153 has a thickness of about 2 μm or less. Does not occur. The base film 168 may be made of polyethylene terephthalate (PET).

The electrophoretic film 160 is positioned such that the adhesive layer 162 contacts the pixel electrode 140.

On the electrophoretic film 160, a color filter layer 170 composed of red (R), green (G), and blue color filter patterns is positioned. The color filter layer 170 is directly formed on the base film 168 of the electrophoretic film 160.

One of the features of the present invention is that the formation process of the color filter layer 170 is performed at about 25 to 100 ° C or less. In the present invention, the color filter layer 170 is formed directly on the electrophoretic film 160, if the color filter layer 170 is formed in a high temperature process, the electrophoretic film 160, in particular the microcapsule layer 164 ) Is damaged. In order to prevent this, the process of forming the color filter layer 170 is about 100 ° C. or less, preferably about 70 ° C. or less.

In the case of a general liquid crystal display device, since the alignment film is formed on the color filter layer and its firing process is performed at about 230 ° C, the color filter layer is also formed at a similar temperature. However, in the present invention, since damage occurs to the microcapsule layer 164 of the electrophoretic film 160 at such a general process temperature, the process proceeds at a temperature of about 100 ° C. or less.

In order to form the color filter layer 170 at such a low process temperature, the color resist is composed of an epoxy and an acrylic binder, the epoxy has about 20 to 40 wt%, and the acrylic binder has about 60 to 80 wt%. To this, a dye for expressing color is added. In the case of forming a white color pattern, the white color pattern may be formed using a high permeability organic film such as photoacryl or BCB.

The ratio of epoxy is higher than that of the conventional color resist, and the process temperature can be lowered by increasing the ratio of epoxy. That is, in the present invention, the color filter layer 170 is formed at a process temperature of about 100 ° C. or less by using a color resist having a high proportion of epoxy, thereby electrically transferring the color filter 170 layer without damaging the electrophoretic film 160. It is possible to form directly on the movable film 160.

The color filter layer 170 may be formed by any one of a photolithography process, an inkjet process, a roll printing process, and a thermal imaging process.

The protective sheet 180 is positioned on the color filter layer 170 to protect the color filter layer 170.

The non-display area DNR of the substrate 110 may include a gate pad 116, a gate pad electrode 146, a data pad 128, a data pad electrode 150, and a test pixel pattern 158. ) Is located.

The gate pad 116 is positioned on the same layer as the gate electrode 112 on the substrate 110 in the gate pad region GPR of the non-display area NDR.

The gate insulating layer 118 and the third insulating material layer 131b having the gate pad contact hole 135b exposing the gate pad 116 are disposed on the gate pad 116. The gate pad electrode 146 is connected to the gate pad 116 through the gate pad contact hole 135b on the third insulating material layer 131b.

The third insulating material layer 131b positioned in the gate pad region GPR is made of the same material as the first insulating material layer 131a and has a thickness smaller than that of the first insulating material layer 131a. . If the third insulating material layer 131b is too thick, the step is too large to prevent the contact between the gate pad 116 and the gate pad electrode 146.

The gate pad electrode 146 includes a first gate pad electrode 146 and a second gate pad electrode 147 on the first gate pad electrode 145. The first gate pad electrode 145 is disposed on the same layer as the first pixel electrode 141 and is formed of the same material. The second gate pad electrode 147 is disposed on the same layer as the second pixel electrode 143 and is formed of the same material.

The gate insulating layer 118 is positioned on the substrate 110 in the data pad region DPR of the non-display area NDR, and the data pad 128 is positioned on the gate insulating layer 118.

A fourth insulating material layer 131c having a data pad contact hole 135c exposing the data pad 128 is positioned on the data pad 128. The data pad electrode 150, which is connected to the data pad 128 through the data pad contact hole 135c, is positioned on the fourth insulating material layer 131c.

The fourth insulating material layer 131c positioned in the data pad region DPR is made of the same material as the first insulating material layer 131a and has a thickness smaller than that of the first insulating material layer 131a. . If the fourth insulating material layer 131c is too thick, the step is too large to prevent the contact between the data pad 128 and the data pad electrode 150.

The data pad electrode 150 includes a first data pad electrode 151 and a second data pad electrode 153 on the first data pad electrode 151. The first data pad electrode 151 is disposed on the same layer as the first pixel electrode 141 and is formed of the same material, and the second data pad electrode 153 is the same layer as the second pixel electrode 143. It is located in and consists of the same substance.

In addition, the gate insulating layer 118 and the fifth insulating material layer 131d are stacked on the substrate 110 in the test pattern region TPR of the non-display area NDR, and the fifth insulating material layer The test pixel pattern 158 is positioned on 131d. Although not shown, the test pixel pattern 158 has a plurality of openings, and a test color filter pattern 172 is positioned in the plurality of openings.

The fifth insulating material layer 131d positioned in the test pattern region TPR is made of the same material as the first insulating material layer 131a. The fifth insulating material layer 131d is exposed through the plurality of openings, and the test color filter pattern 172 is disposed on the fifth insulating material layer 131d to correspond to the opening of the test pixel pattern 158. It is located. The test color filter pattern 172 is formed in the same process as the color filter pattern 170.

In the present invention, the color filter pattern 170 is formed by a low temperature process of 100 ° C. or less. If the fifth insulating material layer 131d is an inorganic insulating material, the bonding force with the test color filter pattern 172 is weak. Therefore, damage such as loss of the test color filter pattern 172 occurs. Therefore, in order to solve this problem, the fifth insulating material layer 131d on which the test pattern TPR is located is preferably made of an organic insulating material.

The test pixel pattern 158 includes a first test pixel pattern 155 and a second test pixel pattern 157 on the first test pixel pattern 155. The first test pixel pattern 155 is disposed on the same layer as the first pixel electrode 141 and is formed of the same material, and the second test pixel pattern 157 is formed on the same layer as the second pixel electrode 143. It is located in and consists of the same substance.

The test pixel pattern 158 may be disposed on the same layer as the gate electrode 112 or the source electrode 124. In this case, the test pixel pattern 158 may have a single layer structure.

That is, the third to fifth insulating material layers 131b, 131c, and 131d are formed by stacking an organic insulating material layer and an inorganic insulating material layer, completely removing the inorganic insulating material layer, and partially removing the organic insulating material layer. It is formed by removing and reducing the thickness.

According to the electrophoretic display having the above configuration, after the color filter layer 170 is formed, the color filter layer 170 may be frozen using the test pixel pattern 158 and the test color filter pattern 172. It is possible to grasp the accuracy of the

That is, since the microcapsule layer 164 is opaque, it is difficult to determine whether the color filter layer 170 is correctly positioned to correspond to each pixel area P. However, in the present invention, the test pixel pattern 158 and the test color are difficult to determine. The alignment accuracy of the color filter layer 170 may be confirmed through the positional relationship of the filter pattern 172.

5 is a plan view of an array substrate for an electrophoretic display device according to a first embodiment of the present invention.

As illustrated, a display area DR is defined in the substrate 110, and a non-display area NDR is defined around the display area DR.

In the display area DR, a plurality of gate lines 114 and a plurality of data lines 122 intersect to define a plurality of pixel areas P. Referring to FIG. One pixel area p may be composed of four subpixels. That is, when one pixel area p is arranged in a 2 * 2 matrix form, as shown in FIG. 5, the first subpixel SP1, the second subpixel SP3, and the third subpixel SP3. ), And may be arranged in a fourth sub-pixel SP4, and the first to fourth sub-pixels SP1, SP2, SP3, and SP4 form one unit pixel UP. The unit pixels UP are repeatedly arranged in the display area DR.

In the color filter layer 170 of FIG. 4, unit color filter patterns are arranged in a matrix manner in the same manner as the unit pixels UP are arranged in the display area. The unit color filter pattern includes a sub color filter pattern of red, green, and blue. The red, green, and blue subcolor filter patterns R correspond to the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively. When the unit color filter pattern further includes a white subcolor filter pattern, the white subcolor filter pattern corresponds to the fourth subpixel SP4.

A gate pad 116 of FIG. 4 and a data pad 128 of FIG. 4 are formed in the non-display area NDR. The gate pad applies a gate signal to a gate line, and the data pad applies a data signal to a data line.

In addition, a test pixel pattern 158 is further formed in the non-display area. The test pixel pattern 158 makes it possible to check whether the unit color filter pattern of the color filter layer and the unit pixels of the display area are correctly aligned. That is, in the case of an electrophoretic display device, since an opaque microcapsule layer is formed between the display area in which the unit pixels are arranged and the color filter layer thereon, the unit of the display area when the color filter layer is formed by a printing method or the like. It is difficult to check whether the unit color filter patterns of the pixel and the color filter layer are correctly arranged. A test color filter pattern is formed on the test pixel pattern 158 of the non-display area, so that the test pixel pattern 158 and the test color filter are formed. By examining the alignment of the pattern, it is determined indirectly whether the unit pixel of the display area and the unit color filter pattern of the color filter layer corresponding thereto are aligned.

The test pixel pattern 158 according to an embodiment of the present invention includes a square first pattern and a cross-shaped second pattern that divides the inside of the first pattern into four zones while being formed inside the first pattern. In one embodiment of the invention, each of the four zones have the same size. The size of each of the four zones is equal to the size of the sub-unit pixel of one unit pixel formed in the display area. In FIG. 5, the four zones correspond to the first sub test pixel TP1, the second sub test pixel TP2, the third sub test pixel TP3, and the fourth sub test pixel TP4, respectively.

In the electrophoretic display device, when red, green, blue, and white color filter layers are applied directly on the electrophoretic film, the red, green, blue, and white areas of the test pixel pattern 158 in the non-display area are respectively applied. The color filter pattern is formed. Therefore, after the process of forming the color filter layer is completed, the unit pixel of the display area and the corresponding color filter layer may be checked even if only the color filter pattern formed on the test pixel pattern 158 and the test pixel pattern 158 is aligned. You can easily check the arrangement.

In addition, it is preferable to indicate which of the first to fourth sub-pixels SP1, SP2, SP3, and SP4 corresponds to the first to fourth sub-test pixels TP1, TP2, TP3, and TP4. For example, R, G, B, and W may be displayed outside the first to fourth sub-test pixels TP1, TP2, TP3, and TP4.

In addition, an alignment mark used in the process of forming the color filter layer 170 of FIG. 4 is positioned in the non-display area NDR.

6 is a cross-sectional view of a part of an electrophoretic display device according to a second exemplary embodiment of the present invention.

For convenience of description, an area in which an electrophoretic film is located and an image is displayed is defined as a display area DR and an area around the display area DR as a non-display area NDR. In addition, a pixel region P in which the pixel electrode and the thin film transistor are positioned is defined in the display region DR, and a gate pad region GPR, a data pad region DPR, and a test are formed in the non-display region NDR. Define a pattern region (TPR).

As shown, the electrophoretic display includes a substrate 210, an electrophoretic film 260, a color filter layer 270, a protective sheet 280, and a test pixel pattern 258. The electrophoretic film 260 covers the display area DR of the substrate 210, and the color filter layer 270 and the protective sheet 280 are sequentially stacked on the electrophoretic film 260. .

In the display area DR of the substrate 210, the pixel area P is defined by gate lines (not shown) and data lines 222 that cross each other.

A gate electrode 212 connected to the gate line and the data line 222 in the pixel region P, a gate insulating layer 218 covering the gate electrode 212, and a gate; A semiconductor layer 220 disposed on the insulating layer 218 and overlapping the gate electrode 212, and a source electrode 224 and a drain electrode 226 positioned on the semiconductor layer 220 and spaced apart from each other. The thin film transistor Tr is positioned. The semiconductor layer 220 includes an active layer 220a made of pure amorphous silicon and an ohmic contact layer 220b made of impurity amorphous silicon. The source electrode 224 is connected to the data line 222.

The first passivation layer 230a is positioned to cover the thin film transistor Tr and the data line 122. The first protective layer 230a may include a first insulating material layer 231a made of an organic insulating material, a second insulating material layer 231b made of an inorganic insulating material, and a third insulating material layer made of an organic insulating material ( 231c). The first passivation layer 230a includes a drain contact hole 235a exposing the drain electrode 226 of the thin film transistor Tr.

The organic insulating material is any one of photoacryl and benzocyclobutene (BCB), and the inorganic insulating material layer is either silicon nitride or silicon oxide.

The reason for forming the first protective layer 230a in the triple layer structure is to strengthen the bonding force with the pixel electrode (not shown) formed on the first protective layer 230a and to improve the characteristics of the thin film transistor Tr. For

That is, the third insulating material layer 231c, which is an upper layer of the first protective layer 230a, is formed of an inorganic insulating material, and thus has a bonding force with the pixel electrode 240 formed on the first protective layer 230a. Can improve.

In addition, the active layer 220a exposed between the source and drain electrodes 2242 and 226 may have deteriorated properties when its surface is in contact with an organic insulating material, and thus, the first layer may be deteriorated. The first insulating material layer 231a, which is a lower layer of the protective layer 230a, is also formed of an inorganic insulating material.

In addition, the second insulating material layer 231b, which is an intermediate layer of the first protective layer 230a, is formed of a thick organic insulating material, thereby minimizing occurrence of parasitic capacitance.

The pixel electrode 240 connected to the drain electrode 226 of the thin film transistor Tr through the drain contact hole 235a is positioned on each of the pixel regions P on the first passivation layer 230. The pixel electrode 240 has a structure in which an opaque first pixel electrode 241 and a transparent second pixel electrode 243 are stacked.

Although the first pixel electrode 241 is positioned between the first passivation layer 230 and the second pixel electrode 243 in the drawing, the second pixel electrode 243 is different from the first passivation layer 230. ) And the first pixel electrode 241.

The first pixel electrode 241 may be formed of any one of copper (Cu), copper alloy (Cu alloy), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), and molybdenum-titanium alloy (MoTi). The second pixel electrode 243 may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). Although not shown, the pixel electrode 240 may be formed of a single layer of an opaque metal material, and in this case, MoTi is preferable.

The pixel electrode 240 is configured to cover the thin film transistor Tr, and the characteristics of the thin film transistor Tr are deteriorated due to photo-current generated when the active layer 220a is exposed to light. To prevent it.

Although not shown, a metal pattern overlapping a portion of the gate line (not shown) is disposed on the gate insulating layer 218, and the protective layer 230 includes a contact hole exposing the metal pattern. . The pixel electrode 240 is connected to the metal pattern through the contact hole.

In this case, the gate wiring becomes a first storage electrode, the metal pattern becomes a second storage electrode, and the gate insulating film 218 between the first and second storage electrodes becomes a dielectric layer, thereby storing a storage capacitor. capacitor). The metal pattern is disposed on the same layer as the data line 222, the source electrode 224, and the drain electrode 226 and is formed of the same material.

The electrophoretic film 260 is positioned on the pixel electrode 240. The electrophoretic film 260 may include a microcapsule layer 264, an adhesive layer 262 below the microcapsule layer 264, a common electrode 166 on the microcapsule layer 264, and the common electrode. It consists of the base film 268 of the upper part (266).

The microcapsule layer 264 includes a plurality of microcapsules 261 filled with white electrophoretic particles 265 and black electrophoretic particles 263 charged through a condensation polymerization reaction. The common electrode 266 is made of a transparent conductive material such as ITO and IZO, and forms an electric field with the pixel electrode 240 to drive the microcapsule layer 264.

The base film 268 has a transparent and flexible property. The base film 268 may be made of polyethylene terephthalate (PET).

The electrophoretic film 260 is positioned such that the adhesive layer 262 is in contact with the pixel electrode 240.

On the electrophoretic film 260, a color filter layer 270 including red (R), green (G), and blue color filter patterns is positioned. The color filter layer 270 is directly formed on the base film 268 of the electrophoretic film 260.

One of the features of the present invention is that the formation process of the color filter layer 270 is performed at about 25 to 100 ° C or less. In the present invention, the color filter layer 170 is formed directly on the electrophoretic film 260, if the color filter layer 270 is formed in a high temperature process, the electrophoretic film 260, in particular the microcapsule layer 264 ) Is damaged. In order to prevent this, the process of forming the color filter layer 270 is performed at about 100 ° C. or less, preferably about 70 ° C. or less.

In the case of a general liquid crystal display device, since the alignment film is formed on the color filter layer and its firing process is performed at about 230 ° C, the color filter layer is also formed at a similar temperature. However, in the present invention, since damage occurs to the microcapsule layer 264 of the electrophoretic film 260 at such a general process temperature, the process proceeds at a temperature of about 100 ° C. or less.

In order to form the color filter layer 170 at such a low process temperature, the color resist is composed of an epoxy and an acrylic binder, the epoxy has about 20 to 40 wt%, and the acrylic binder has about 60 to 80 wt%. To this, a dye for expressing color is added. In the case of forming a white color pattern, the white color pattern may be formed using a high permeability organic film such as photoacryl or BCB. The ratio of epoxy is higher than that of the conventional color resist, and the process temperature can be lowered by increasing the ratio of epoxy.

That is, in the present invention, the color filter layer 270 is formed at a process temperature of about 100 ° C. or less by using a color resist having a high proportion of epoxy, thereby electrically transferring the color filter 270 layer without damaging the electrophoretic film 2160. It is possible to form directly on the movable film 260.

The color filter layer 270 may be formed by any one of a photolithography process, an inkjet process, a roll printing process, and a thermal imaging process.

The protective sheet 280 is positioned on the color filter layer 270 to protect the color filter layer 270.

The non-display area DNR of the substrate 210 may include a gate pad 216, a gate pad electrode 246, a data pad 228, a data pad electrode 250, and a test pixel pattern 258. ) Is located.

The gate pad 216 is disposed on the same layer as the gate electrode 212 on the substrate 210 in the gate pad region GPR of the non-display area NDR. The gate insulating layer 218 and the second protective layer 230b having a gate pad contact hole 235b exposing the gate pad 216 are disposed on the gate pad 216, and the second protective layer 230b is disposed. The gate pad electrode 246 is connected to the gate pad 216 through the gate pad contact hole 235b.

The second passivation layer 230b disposed in the gate pad region GPR includes fourth and fifth insulating material layers 231d and 231e.

The fourth insulating material layer 231d is made of the same material as the first insulating material layer 231a, and the fifth insulating material layer 231d is made of the same material as the second insulating material layer 231b. And has a thickness smaller than that of the second insulating material layer 231b. If the fifth insulating material layer 131e is too thick, the step is too large to prevent the contact between the gate pad 216 and the gate pad electrode 246.

The gate pad electrode 246 includes a first gate pad electrode 246 and a second gate pad electrode 247 on the first gate pad electrode 245. The first gate pad electrode 245 is disposed on the same layer as the first pixel electrode 241 and is formed of the same material. The second gate pad electrode 247 is disposed on the same layer as the second pixel electrode 243 and is formed of the same material.

The gate insulating layer 218 is positioned on the substrate 210 in the data pad region DPR of the non-display area NDR, and the data pad 228 is positioned on the gate insulating layer 218.

A third passivation layer 230c having a data pad contact hole 235c exposing the data pad 228 is disposed on the data pad 228, and the data pad contact hole is formed on the third passivation layer 230c. The data pad electrode 250, which is connected to the data pad 228 through 235c, is located.

The third passivation layer 130c disposed in the data pad region DPR includes a sixth insulating material layer 231f and a seventh insulating material layer 231g.

The sixth insulating material layer 231f is made of the same material as the first insulating material layer 231a, and the seventh insulating material layer 231g is made of the same material as the second insulating material layer 231b. And has a thickness smaller than that of the second insulating material layer 231b. If the seventh insulating material layer 231g is too thick, the step is too large to prevent the contact between the data pad 228 and the data pad electrode 250.

The data pad electrode 250 includes a first data pad electrode 251 and a second data pad electrode 253 on the first data pad electrode 251. The first data pad electrode 251 is disposed on the same layer as the first pixel electrode 241 and is formed of the same material, and the second data pad electrode 253 is the same layer as the second pixel electrode 243. It is located in and consists of the same substance.

In addition, the gate insulating layer 218 and the fourth protective layer 230d are stacked on the substrate 210 in the test pattern region TPR of the non-display area NDR, and the fourth protective layer 230d is formed on the substrate 210. The test pixel pattern 258 is positioned on the X-axis. Although not shown, the test pixel pattern 258 has a plurality of openings, and a test color filter pattern 272 is positioned in the plurality of openings.

The fourth passivation layer 230d positioned in the test pattern region TPR includes an eighth insulating material layer 231h and a ninth insulating material layer 231i. The thickness of the eighth insulating material layer 231h made of the same material as the first insulating material layer 231a and the second insulating material layer 231b and the same thickness as that of the second insulating material layer 231b. And a ninth insulating material layer 231i having a.

The eighth insulating material layer 231h is made of the same material as the first insulating material layer 231a, and the ninth insulating material layer 231i is made of the same material as the second insulating material layer 231b. And has a thickness smaller than that of the second insulating material layer 231b.

The ninth insulating material layer 231i is exposed through the plurality of openings, and the test color filter pattern 272 on the ninth insulating material layer 231i corresponds to the opening of the test pixel pattern 258. It is located. The test color filter pattern 272 is formed in the same process as the color filter pattern 270.

In the present invention, the color filter pattern 270 is formed by a low temperature process of 100 ° C. or less. If the ninth insulating material layer 231i is an inorganic insulating material, the bonding strength with the test color filter pattern 272 is weak. Damage such as loss of the test color filter pattern 272 occurs. Therefore, in order to solve this problem, the ninth insulating material layer 231i in which the test pattern TPR is positioned is preferably made of an organic insulating material.

The test pixel pattern 258 includes a first test pixel pattern 255 and a second test pixel pattern 257 on the first test pixel pattern 255. The first test pixel pattern 255 is disposed on the same layer as the first pixel electrode 241 and is formed of the same material, and the second test pixel pattern 257 is the same layer as the second pixel electrode 243. It is located in and consists of the same substance.

The test pixel pattern 258 may be disposed on the same layer as the gate electrode 212 or the source electrode 224, and in this case, may have a single layer structure.

That is, the first inorganic insulating material layer, the organic insulating material layer, and the second inorganic insulating material layer are sequentially stacked, the second inorganic insulating material layer is completely removed, and the organic insulating material layer is partially removed to reduce the thickness. By reducing, the second to fourth protective layers 230b, 230c, and 230d are formed.

According to the electrophoretic display having the above configuration, after the color filter layer 270 is formed, the color filter layer 270 is frozen using the test pixel pattern 258 and the test color filter pattern 272. It is possible to grasp the accuracy of the

That is, since the microcapsule layer 260 is opaque, it is difficult to determine whether the color filter layer 270 is correctly positioned to correspond to each pixel area P. However, in the present invention, the test pixel pattern 258 and the test color are difficult to determine. The alignment accuracy of the color filter layer 270 may be confirmed through the positional relationship of the filter pattern 172.

7 is a plan view of an array substrate for an electrophoretic display device according to a second embodiment of the present invention.

As illustrated, the display area DR is defined in the substrate 210, and the non-display area NDR is defined around the display area DR.

In the display area DR, a plurality of gate lines 214 and a plurality of data lines 222 intersect to define a plurality of pixel regions P. In this case, the three pixel regions arranged in one direction may be arranged into a first subpixel SP1, a second subpixel SP3, a second subpixel SP2, and a third subpixel SP3. The first to third subpixels SP1, SP2, and SP3 form a unit pixel UP. In other words, the unit pixels UP are repeatedly arranged in the display area DR.

In the color filter layer 270 of FIG. 6, the unit color filter patterns are arranged in a matrix manner in the same way as the unit pixels UP are arranged in the display area. The unit color filter pattern includes a sub color filter pattern of red, green, and blue. The red, green, and blue subcolor filter patterns R correspond to the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively.

In the non-display area NDR, a gate pad 216 of FIG. 6 and a data pad 228 of FIG. 6 are positioned. The gate pad applies a gate signal to a gate line, and the data pad applies a data signal to a data line.

In addition, a test pixel pattern 258 is further formed in the non-display area. The test pixel pattern 258 allows to check whether the unit color filter pattern of the color filter layer and the unit pixels of the display area are correctly aligned. That is, in the case of an electrophoretic display device, since an opaque microcapsule layer is formed between the display area in which the unit pixels are arranged and the color filter layer thereon, the unit of the display area when the color filter layer is formed by a printing method or the like. It is difficult to check whether the unit color filter patterns of the pixel and the color filter layer are correctly arranged. A test color filter pattern is formed on the test pixel pattern 258 of the non-display area, so that the test pixel pattern 258 and the test color filter are formed. By examining the alignment of the pattern, it is determined indirectly whether the unit pixel of the display area and the unit color filter pattern of the color filter layer corresponding thereto are aligned.

The test pixel pattern 258 according to an embodiment of the present invention includes a first pattern having a rectangular shape and a second pattern spaced apart from each other in parallel with each other positioned in the first pattern to divide the inside of the first pattern into three zones. Doing. In one embodiment of the invention, each of the three zones have the same size. The size of each of the three zones is equal to the size of the sub-unit pixel of one unit pixel formed in the display area. In FIG. 6, the three zones correspond to the first sub test pixel TP1, the second sub test pixel TP2, and the third sub test pixel TP3, respectively.

In the electrophoretic display, when the red, green, and blue color filter layers are applied directly on the electrophoretic film, the red, green, and blue color filter patterns are also applied to the three areas of the test pixel pattern 258 in the non-display area, respectively. Is formed. Therefore, after the process of forming the color filter layer is completed, the unit pixel of the display area and the corresponding color filter layer may be checked even if only the color filter pattern formed on the test pixel pattern 258 and the test pixel pattern 258 is aligned. You can easily check the arrangement.

In addition, it is preferable to display which of the first to third sub-pixels SP1, SP2, and SP3 corresponds to the first to third sub-test pixels TP1, TP2, and TP3. For example, R, G, and B may be displayed on the outside of the first to third sub test pixels TP1, TP2, and TP3.

In addition, an alignment mark used in the process of forming the color filter layer 270 of FIG. 6 is positioned in the non-display area NDR.

Hereinafter, a method of manufacturing an electrophoretic display device according to a first exemplary embodiment of the present invention will be described with reference to FIGS. 8A to 8H, 9A to 9H, 10A to 10H, and 11A to 11H.

8A to 8H are cross-sectional views illustrating a process of manufacturing a display area of an electrophoretic display device according to a first embodiment of the present invention, and FIGS. 9A to 9H are views of a electrophoretic display device according to a first embodiment of the present invention. Sectional drawing showing the manufacturing process of the gate pad region.

10A to 10H are cross-sectional views illustrating a manufacturing process of a data pad area of an electrophoretic display device according to a first embodiment of the present invention, and FIGS. 11A to 11H are electrophoretic display devices according to a first embodiment of the present invention. Is a cross-sectional view showing the manufacturing process of the test pattern region.

8A, 9A, 10A, and 11A, after depositing a first metal material on the substrate 110 to form a first metal layer (not shown), coating of photoresist, exposure using a mask, and photo A mask process including a process of developing a resist, etching, and stripping a photoresist is performed to form a gate wiring 114 (see FIG. 5) extending in one direction, and simultaneously connected to the gate wiring 114. The gate electrode 112 is formed. In addition, a gate pad 116 is formed in the gate pad region GPR.

The first metal material may be any one of aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, chromium (Cr), and titanium alloy.

Next, an inorganic insulating material is deposited to cover the gate line 114, the gate electrode 112, and the gate pad 116 to form a gate insulating layer 118. The gate insulating layer 118 is made of silicon nitride or silicon oxide.

Next, pure amorphous silicon and impurity amorphous silicon are sequentially deposited on the gate insulating layer 118 to form a pure amorphous silicon layer (not shown) and an impurity amorphous silicon layer (not shown), and patterning the same by performing a mask process. Accordingly, the pure amorphous silicon pattern 117 and the impurity amorphous silicon pattern 119 are formed on the gate electrode 112.

Next, as shown in FIGS. 8B, 9B, 10B, and 11B, the pure amorphous silicon pattern (117 of FIG. 8A), the impurity amorphous silicon pattern (119 of FIG. 8A), and the gate insulating layer 118 are formed. A second metal material, for example, molybdenum (Mo), copper (Cu), titanium alloy, or aluminum alloy (AlNd) is deposited to form a second metal layer (not shown) on the front surface.

Subsequently, the second metal layer (not shown) is patterned to form a data line 122 crossing the gate line 114 to define the pixel region P. Referring to FIG. At the same time, source and drain electrodes 124 and 126 are formed on each of the pixel regions P in such a manner as to be spaced apart from each other on the impurity amorphous silicon pattern 119 of FIG. 8A, and the gate insulating layer is formed in the data pad region DPR. The data pad 128 is formed on the 118. Although not shown, a metal pattern overlapping a portion of the gate line 124 is formed.

Thereafter, the pure amorphous silicon pattern (FIG. 8A) between the source and drain electrodes 124 and 126 by removing the impurity amorphous silicon pattern (119 of FIG. 8A) between the source and drain electrodes 124 and 126 by dry etching. 117 is exposed to form an active layer 120a made of pure amorphous silicon. In addition, an ohmic contact layer 120b of impurity amorphous silicon is formed on the active layer 120a to contact the source and drain electrodes 124 and 126 and to be spaced apart from each other. At this time, the active layer 120a and the ohmic contact layer 120b spaced apart from each other form the semiconductor layer 120.

The gate electrode 112, the gate insulating layer 118, the semiconductor layer 120, the source electrode 124, and the drain electrode 126 form a thin film transistor Tr, which is a switching element. The thin film transistor Tr is a switching element and is switched by the gate line 114 to apply data to the pixel electrode.

Meanwhile, the forming of the semiconductor layer 120 and the source and drain electrodes 124 and 126 described above are performed through two different mask processes, respectively.

However, as a modification, although not shown in the drawings, a pure and impurity amorphous silicon layer is formed on the gate insulating layer 118, and before patterning, the diffraction exposure or the half is performed while the second metal layer is formed on the impurity amorphous silicon layer. The semiconductor layer, the source, and the drain electrode may be formed through a single mask process, in which a photoresist pattern having a different thickness is formed by performing a mask process using a tone exposure technique.

Next, as shown in FIGS. 8C, 9C, 10C, and 11C, an organic insulating layer is formed on the thin film transistor Tr, the data line 122, the data pad 128, and the gate insulating layer 118. The material layer 127 and the inorganic insulating material layer 129 are successively formed. That is, the organic insulating material layer 127 and the inorganic insulating material layer 129 cover the entire substrate 110.

Next, as shown in FIGS. 8D, 9D, 10D, and 11D, the drain contact exposing the drain electrode 126 by etching the organic insulating material layer 127 and the inorganic insulating material layer 129. The first insulating material layer 131a and the second insulating material layer 133 including the holes 135a are formed in the display area DR. The first insulating material layer 131a and the second insulating material layer 133 form a protective layer 130.

In addition, the inorganic insulating material layer 129 and the organic insulating material layer 127 are etched to expose the gate pad 116 and the data pad 128 to expose the gate pad contact hole 135b and the data pad contact hole. Form 135c.

Subsequently, the organic insulating material layer 127 is partially removed after the inorganic insulating material layer 129 is completely removed, thereby having a thickness smaller than that of the first insulating material layer 131a. The fifth insulating material layers 131b, 131c, and 131d are formed in the gate pad region GPR, the data pad region DPR, and the test pattern region TPR. Although not shown, a contact hole exposing the metal pattern is also formed.

Next, an opaque metal material layer (not shown) and a transparent conductive material layer (not shown) are successively deposited on the protective layer 130 and the third to fifth insulating material layers 131b, 131c, and 131d, By patterning by a mask process, the pixel electrode 140 is in contact with the drain electrode 126 through the drain contact hole 135a and the gate pad 116 is contacted through the gate pad contact hole 135b. A test pixel pattern 158 in the gate pad electrode 146, the data pad electrode 150 contacting the data pad 128 through the data pad contact hole 135c, and the test pattern region PR. ).

At the same time, the alignment mark 190 of FIG. 5 is formed in the non-display area NDR. Although not shown, the pixel electrode 140 contacts the metal pattern such that a part of the gate wiring 114 becomes a first storage electrode and the metal pattern becomes a second storage electrode and the first and second storages. The gate insulating layer 118 between the electrodes becomes a dielectric layer to form a storage capacitor.

The opaque metal material layer may be formed of any one of copper (Cu), copper alloy (Cu alloy), aluminum (Al), aluminum alloy (Al alloy), molybdenum (Mo), and molybdenum-titanium alloy (MoTi). The transparent conductive material layer may be made of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The pixel electrode 140 includes first and second pixel electrodes 141 and 143, and the gate pad electrode 146 includes first and second gate pad electrodes 145 and 147. In addition, the data pad electrode 150 includes first and second data pad electrodes 151 and 153, and the test pixel pattern 158 includes first and second test pixel patterns 155 and 157. .

Although the test pixel pattern 158 and the alignment mark 190 are formed on the same layer as the pixel electrode 140, the same material may be formed. It may be formed during the formation of the data line 122.

Next, as illustrated in FIGS. 8F, 9F, 10F, and 11F, the base film 168 and the base film 168 are disposed on the pixel electrode 140 formed in each pixel region P, corresponding to the display region DR. A plurality of capsules 161 filled with a common electrode 166 formed on the front surface of the lower portion of the transparent conductive material and a white electrophoretic particle 163 and black electrophoretic particles 161 charged through a condensation polymerization reaction. A microcapsule layer 164 including an electrophoretic film 167 including an adhesive layer 162 below the microcapsule layer 164 between the common electrode 166 and the pixel electrode 140. The adhesive layer 162 is attached to the pixel electrode 140 in contact with each other.

Next, as shown in FIGS. 8G, 9G, 10G, and 11G, the red, green, blue, and / or electrophoretic film 160 attached to the display area DR, more precisely, is placed on the base film 168. The color filter layer 170 including the white color filter pattern is formed.

The color filter layer 170 is directly formed on the electrophoretic film 160 at a process temperature of about 100 ° C. or less, preferably about 70 ° C. or less. The color filter layer 170 may be formed by any one of a photolithography process, an inkjet process, a roll printing process, and a thermal imaging process.

For example, one of red, green, and blue colors, for example, a red color resist, may be coated on the entire surface of the display area DR by the spin coating method on the base film 168. After forming a red color filter layer (not shown), through the alignment mask (190 in Fig. 5) for forming the color filter layer using an exposure mask composed of a transmission region for passing light and a blocking region for blocking light. After alignment, exposure is performed, and the exposed color resist layer is developed to form a red color filter pattern R corresponding to a part of the pixel region P. FIG.

In this case, since the color resist layer has a negative property, a portion that receives light remains and a portion that does not receive light is removed to form a red color filter pattern R corresponding to some pixel regions P. do. Next, the green color filter pattern G and the blue color filter pattern are formed by the same process. In addition, the white color filter pattern is a color pattern is formed using a high permeability organic film, such as photoacryl or BCB.

In addition, a test color filter pattern 172 is formed corresponding to the first to fourth test pixels TP1, TP2, TP3, and TP4 of FIG. 5. By checking the positional relationship between the test color filter pattern 172 and the first to fourth sub test pixels TP1, TP2, TP3, and TP4, alignment accuracy of the color filter layer 170 may be determined.

That is, although the positional relationship between the color filter layer 170 and the subpixels (SP1, SP2, SP3, SP4 in FIG. 5) is not shown, the test color filter pattern 172 and the first to fourth subtest pixels are not shown. Since TP1, TP2, TP3, and TP4 are exposed and can be confirmed, the alignment accuracy of the color filter layer 170 may be determined using the TP1, TP2, TP3, and TP4.

Next, as shown in FIGS. 8H, 9H, 10H, and 11H, by attaching the protective sheet 180 over the color filter layer 170, an electrophoretic display device according to the present invention may be obtained.

The present invention is not limited to the above embodiments and modifications thereof, and it will be apparent that various modifications and changes can be made without departing from the spirit and the spirit of the invention.

1 is a view for explaining a driving principle of an electrophoretic display.

2 is a schematic cross-sectional view of a conventional electrophoretic display.

3A to 3E are cross-sectional views of manufacturing steps in accordance with a conventional method for manufacturing an electrophoretic display.

4 is a cross-sectional view of a part of an electrophoretic display device according to a first exemplary embodiment of the present invention.

5 is a plan view of an array substrate for an electrophoretic display device according to a first embodiment of the present invention.

6 is a cross-sectional view of a part of an electrophoretic display device according to a second exemplary embodiment of the present invention.

7 is a plan view of an array substrate for an electrophoretic display device according to a second embodiment of the present invention.

8A to 8H are cross-sectional views illustrating a process of manufacturing a display area of an electrophoretic display device according to a first exemplary embodiment of the present invention.

9A to 9H are cross-sectional views illustrating a process of manufacturing a gate pad region of an electrophoretic display according to a first exemplary embodiment of the present invention.

10A to 10H are cross-sectional views illustrating a manufacturing process of a data pad area of an electrophoretic display device according to a first exemplary embodiment of the present invention.

11A to 11H are cross-sectional views illustrating a process of manufacturing a test pattern region of an electrophoretic display device according to a first embodiment of the present invention.

Claims (12)

A display area in which a unit pixel including at least three subpixels is formed and a non-display area around the display area are defined; A switching element positioned in the display area; A protective layer covering the switching element; A pixel electrode on the protective layer and connected to the switching element; A test pixel pattern positioned in the non-display area; An electrophoretic film positioned on the pixel electrode; A color filter pattern positioned on the electrophoretic film and corresponding to each of the sub-pixels; And a color filter layer including a test color filter pattern positioned corresponding to each of the test pixels, wherein the test pixel pattern has the same shape as the unit pixel. The method of claim 1, The color filter layer may include red, green, and blue color filter patterns, and the red, green, and blue color filter patterns may be red, green, or blue, respectively, in resists composed of 20-40 wt% epoxy and 60-80 wt% acrylic binder. Electrophoretic display characterized by the addition of blue dyes. The method of claim 1, The unit pixel may include red, green, blue, and white sub-pixels arranged in a 2 * 2 matrix. The method of claim 3, The test pixel pattern may include a first pattern having a quadrangular shape and a second pattern positioned in the first pattern and having a cross shape. Electrophoretic display. The method of claim 1, And the unit pixels include red, green, and blue sub-pixels arranged in a first direction. The method of claim 5, The test pixel pattern includes a first pattern having a rectangular shape and two second patterns positioned in the first pattern and spaced apart from each other in parallel. The method of claim 1, The protective layer includes a first insulating material layer made of an organic insulating material and a second insulating material layer made of an inorganic insulating material, and the test pixel pattern is positioned on the first insulating material layer and the first insulating material layer Electrophoretic display, characterized in that in contact with. Forming a switching element in the display area on which a unit pixel including at least three subpixels is formed and a non-display area around the display area are defined; Forming a protective layer covering the switching element; Forming a pixel electrode formed on the protective layer and connected to the switching element; Forming a test pixel pattern in the non-display area; Attaching an electrophoretic film on the pixel electrode; Forming a color filter pattern corresponding to each of the sub-pixels and a test color filter pattern corresponding to each of the test pixels on the electrophoretic film, wherein the test pixel pattern has the same shape as the unit pixel. Method of manufacturing an electrophoretic display device comprising a. The method of claim 8, The color filter pattern includes red, green, and blue color filter patterns, and the red, green, and blue color filter patterns are red and green, respectively, on resists composed of 20 to 40 wt% epoxy and 60 to 80 wt% acrylic binder. And a blue dye is added, and the color filter pattern is directly formed on the electrophoretic film at a process temperature of 100 ° C. or less. The method of claim 9, Forming the color filter pattern corresponding to each of the sub-pixels and the test color filter pattern corresponding to each of the test pixels on the electrophoretic film, A method of manufacturing an electrophoretic display, characterized in that it is formed by any one of a photolithography process, an inkjet printing process, a roll printing process, and a thermal transfer process. The method of claim 8, Forming the protective layer covering the switching element, Sequentially stacking an organic insulating material layer and an inorganic insulating material layer on the entire surface of the substrate including the switching device; Patterning the inorganic insulating material layer and the organic insulating material layer to form a contact hole exposing a first portion of the switching element; Completely removing the inorganic insulating material layer corresponding to the non-display area; The test pixel pattern is formed on the organic insulating material layer, and the test color filter pattern is in contact with the organic insulating material layer manufacturing method of an electrophoretic display device. The method of claim 8, Forming the protective layer covering the switching element, Sequentially stacking a first inorganic insulating material layer, an organic insulating material layer, and a second inorganic insulating material layer on the entire surface of the substrate including the switching device; Patterning the second inorganic insulating material layer, the organic insulating material layer and the first inorganic insulating material layer to form a contact hole exposing a first portion of the switching element; Completely removing the second inorganic insulating material layer corresponding to the non-display area, The test pixel pattern is formed on the organic insulating material layer, and the test color filter pattern is in contact with the organic insulating material layer manufacturing method of an electrophoretic display device.

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