KR20110030069A - Solid state storage system for controlling write operation and method of controlling the same - Google Patents

Abstract

PURPOSE: A semiconductor storage system and a control method thereof are provided to reduce a write operation overhead by independently allocating the storage area of write data every write. CONSTITUTION: A flash memory area(150) includes a plurality of memory blocks. A memory controller(140) sets the memory block as the storage area of a preset unit and controls a write operation by allocating a new storage area according to a write command from a host interface(110). The new storage area is independent of the data storage area stored by a prior write command.

Description

Solid State Storage System for Controlling Write Operation and Method of Controlling the Same}

The present invention relates to a semiconductor storage system and a control method thereof, and more particularly, to a semiconductor storage system and a control method for controlling a write operation.

In general, nonvolatile memory is used as a storage memory for many portable information devices. Furthermore, in recent years, a solid state drive (SSD) using NAND flash memory has been released in place of a hard disk drive (HDD) in a personal computer (PC), which is expected to rapidly invade the HDD market.

A semiconductor storage system using such a flash memory includes a memory area including a plurality of blocks including a plurality of pages. As is well known, the read and write operations of data are performed in units of pages due to the characteristics of the flash memory, and the operations of updating and deleting the data are performed in units of blocks. In other words, in order to update the contents of a page in which data is stored, the entire block containing the page must be deleted first, and then written again page by page.

In general, flash memory cells may be classified into a single level cell (SLC) and a multi level cell (MLC) according to the number of storage unit bits of the cell. At this time, the MLC may be provided to store a plurality of bits, for example, two bits of information in a unit cell. To do this, the cell allows four threshold voltages with different effective ranges to be set to represent four different states. Since the difference between these threshold voltages is smaller than in the case of SLC, interference between the threshold voltages may occur frequently. That is, in MLC, interference may be caused when a write operation of a corresponding page is currently performed due to leakage of stored charges when the neighboring pages are operated. In other words, when one page is interfered with by a neighboring page, the threshold voltage of the corresponding page is shifted under the influence of the neighboring page, and as a result, the MLC cell may be changed into data different from the data to be stored. Therefore, in a flash storing a multi-bit cell, such interference phenomenon may reduce the reliability of data due to the retention time and error bits of the data.

An object of the present invention is to provide a semiconductor storage system for controlling a write operation.

Another object of the present invention is to provide a control method of a semiconductor storage system for controlling a write operation.

According to an aspect of the present invention, there is provided a semiconductor storage system configured to group first and second word line groups by grouping pages connected to a word line, the flash memory area including a plurality of memory blocks, and a first write. And a memory controller configured to allocate the first wordline group when a command is requested and to control the write operation by allocating the second wordline group when a second write command is requested.

In accordance with another aspect of the present invention, a semiconductor storage system includes a host interface, a flash memory area including a plurality of memory blocks, and a storage area of the memory block in a plurality of predetermined units. The memory controller may include a memory controller configured to control a write operation by allocating a new storage area independent of the data storage area stored by the previous write command according to the write command from the host interface.

According to another aspect of the present invention, a method of controlling a semiconductor storage system may include: assigning a word line group grouped by a predetermined page unit to a data storage area according to an external write request, and after writing the data line region. Skipping remaining free pages in the wordline group.

According to an embodiment of the present invention, the write operation overhead of data due to interference between pages may be reduced by independently allocating a storage area for write request data every write.

Hereinafter, a semiconductor storage system according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

First, a semiconductor storage system according to an exemplary embodiment of the present invention will be described with reference to FIGS. 1 to 3.

1 is a block diagram of a semiconductor storage system 100 according to an embodiment of the present invention. Here, the semiconductor storage system 100 is exemplified as a storage system using NAND flash memory.

Referring to FIG. 1, the semiconductor storage system 100 includes a host interface 110, a buffer unit 120, an MCU 130, a memory controller 140, and a memory region 150.

First, the host interface 110 is connected to the buffer unit 120. The host interface 110 transmits and receives a control command, an address signal, and a data signal between an external host (not shown) and the buffer unit 120. The interface method between the host interface 110 and an external host (not shown) is any one of serial Serial Technology Attachment (SATA), parallel Parallel Advanced Technology attachment (PATA), and SCSI, Express Card, and PCI-Express methods. Can be and is not limited.

The buffer unit 120 buffers output signals from the host interface 110 or temporarily stores mapping information between logical addresses and physical addresses, block allocation information of a memory area, and data received from the outside. The buffer unit 120 may be a buffer using static random access memory (SRAM).

The microcontrol unit 130 may transmit and receive a control command, an address signal, a data signal, and the like between the host interface 110, or may control the memory controller 140 by such signals.

The memory controller 140 selects a predetermined NAND flash memory device ND among the plurality of NAND flash memory devices of the memory area 150, and provides a write, delete, or read command. In particular, the memory controller 140 according to an embodiment of the present invention controls to allocate a data storage area in units of predetermined grouped word line groups so that when inter-page interference occurs, a storage area of another word line group in which previous data is stored. The influence can be prevented. In more detail, the memory controller 140 groups pages connected to the same word line of the memory area 150 and allocates a data storage area in units of corresponding word line groups. That is, the memory controller 140 independently separates a storage area of data for each transaction-request in word line group units, so that even if interference occurs in the corresponding word line group, unlike the conventional word line group The write operation can be controlled to be re-executed only for the data for which processing request is made. In this case, the processing request may be a write request by an external host (not shown), for example, and data for each processing request means data to be written for every write command.

The memory area 150 is controlled by the memory controller 140 to perform write, delete, and read operations of data. The memory region 150 may be a NAND flash memory. For convenience of description, an embodiment of the present invention is illustrated as an MLC NAND flash memory, but is not limited thereto. The memory area 150 may be provided with a plurality of chips including a plurality of blocks including a plurality of pages.

2 is a block diagram conceptually illustrating such a memory area 150.

Referring to FIG. 2, the memory area 150 includes a plurality of chips (chip 1, chip 2, chip 3..).

In addition, each chip includes a plurality of banks, and each bank includes a plurality of planes in which a plurality of memory blocks BLK are grouped. Each of the memory blocks BLK includes a plurality of word line groups WL # 0 and WL # 1 .. grouped into a plurality of pages sharing word lines.

As is well known, since the flash memory is a nonvolatile memory, it is not possible to overwrite other data on a write page once, and it is described that new data can be written after erasing by block unit. Thus, in order to perform data update, a process of writing and erasing is inevitably required.

According to an embodiment of the present invention, in every write, the write request data is controlled to be processed in a different area from the data stored by the previous request. Accordingly, at the time of writing, it allocates as much as the size suitable for the currently requested data, and controls so that the data stored by the previous request is allocated by writing a word line group different from the stored word line group. As a result, when interference occurs in some pages of the word line group, the write operation may be re-performed only for data in the word line group, and the data in other word line groups may be preserved.

Conventionally, storage areas for data are allocated continuously without considering the word line group. Thus, when interference occurs in some pages of a word line group, the write operation has to be performed again on all data included in the physical region in which the interference-prone pages are stored. Since the storage space is physically related even though the data processed (written) at different points in time, when the page interference occurs, all data has to be rewritten. As a result, even if the data has already been safely processed previously, unnecessary overhead (overjead) has to be processed again due to the physical interference generated during the current operation.

However, according to an embodiment of the present invention, by separately allocating a storage area for write request data for each write, overhead of data write operation due to interference between pages may be reduced.

FIG. 3 is a conceptual diagram illustrating an operation written in a block BLK in the memory area 150 of FIG. 1.

Referring to FIG. 3, data is written or stored in any block BLK.

First, it will be described here that four pages are shared in one word line. Accordingly, area allocation of data may be allocated on a word line group basis. The dotted line shows the process of data processing by the host interface (see 110 in FIG. 1), where the process request is illustrated as a write operation. In addition, as indicated by ①, ②, ③, quantitatively indicates the data to be processed.

More specifically, old data is stored in the first word line group WL # 0. This is not shown, but the data is subsequently updated and represented as data that is no longer valid. At this time, for example, even if a remaining free page is generated after the amount of data requested to be written is stored in one word line group, the remaining free page is not used when storing the next data. That is, the memory controller 140 controls to skip free pages in which data in the group is not stored. As a result, a storage area of data may be independently allocated to each processing request.

Subsequently, when a predetermined amount of data is written, the new storage area and the second word line group WL # 1 are allocated and stored as in the process of ①. Also in this case, as in the case of the first word line group WL # 0, the amount of data requested to be written is stored in one word line group and a remaining free page is generated. In this case, the control controls to skip the remaining free pages in which data is not stored.

On the other hand, when the data of more than one word line group is to be written, i.e., if the amount of data exceeding the corresponding word line group unit is to be written, the memory controller 140 stores the storage area to be appropriate for the amount of data. Allocate In this case, the third and fourth word line groups WL # 2 and WL # 3 are allocated to satisfy the data amount of process (2). At this time, after the data write in step (2), the number of remaining free pages is three. However, even in this case, control is performed to skip the remaining free pages in which data is not stored.

If interference occurs in some pages during the write operation of ②, the interference may also be affected by adjacent pages sharing the word line with the corresponding page. Therefore, in this case, the write operation should be performed again on the data requested for processing in step ②. Therefore, while the write-requested data is still maintained in the buffer unit (see 120 in FIG. 1), new word line groups other than the third and fourth word line groups WL # 2 and WL # 3 are allocated and written. Can be controlled to be rerun.

However, unlike the related art, since the write requested data of ② is stored in a physically independent place from the data having different processing request points, for example, the second word line group WL # 1, the previously requested processing is safely performed. It is not necessary to perform unnecessary write operations again for the data.

Finally, as in the case of 3), even when a small amount of data is written, the fifth word line group WL # 4 is allocated to store the data.

As described above, according to an embodiment of the present invention, the write requested data is stored in word line group units every write request. Thus, the data is written by allocating a new wordline group different from the wordline group in which the previous data is stored so as to fit the amount of write request data. After all of the word lines are written in the word line group, skipping is performed if a remaining page is generated.

4 is a flowchart illustrating a control method of the semiconductor storage system according to FIG. 1.

1 to 4, a method of controlling a semiconductor storage system according to an embodiment of the present invention will be described.

First, the memory controller 140 stores area allocation information so that areas can be allocated for each word line group by grouping pages in predetermined units (S10).

When the write is performed, it is determined whether the current write request data can be written in the grouped word line groups WL # 0 and WL # 1 .. (S20).

If this is possible, it is checked whether there is a free page in the write-lined word line group WL # 0, WL # 1 .. (S40), and if it exists, the remaining free page is skipped and for the next write request. The new word line groups WL # 0 and WL # 1 .. are allocated to prepare for the write operation (S50). If there is no free page in the write-enabled word line groups WL # 0 and WL # 1 .. (S40), the write operation may be terminated as it is.

On the other hand, when the write operation is performed, if it is possible to write in one word line group (WL # 0, WL # 1 ..) grouped with the current write request data (S20) and the storage area is insufficient to perform the write, successive new The word line groups WL # 0 and WL # 1 .. are allocated to perform writing (S30). Even in this case, if the free page exists in the written word line group WL # 0 and WL # 1 .. (S40), the free page is skipped and the next write request is skipped. The new word line groups WL # 0 and WL # 1 .. are allocated to prepare for the write operation (S50).

As described above, according to an exemplary embodiment of the present invention, a predetermined unit storage area is set by grouping predetermined units, that is, pages sharing word lines, so that data is stored in word line group units every write operation. If there are remaining free pages in the area, skip processing is performed.

As those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features, the embodiments described above should be understood as illustrative and not restrictive in all aspects. Should be. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

1 is a block diagram of a semiconductor storage system according to an embodiment of the present invention;

2 is a conceptual diagram illustrating a hierarchical structure of a memory area according to FIG. 1;

3 is a conceptual diagram conceptually illustrating a write operation of the present invention according to FIG. 1, and

4 is a flowchart illustrating a control method of a semiconductor storage system according to an exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

110: host interface 120: buffer unit

130: MCU 140: memory controller

150: memory area

Claims (9)

A semiconductor storage system for setting first and second word line groups by grouping pages connected to word lines. A flash memory area including a plurality of memory blocks; And And a memory controller which allocates the first wordline group when a first write command is requested and controls the write operation by allocating the second wordline group when a second write command is requested. The method of claim 1, And when the data controller stores data in the first and second word line groups, skips a free page in each of the first and second word line groups after storing the data. A host interface; A flash memory area including a plurality of memory blocks; And A memory controller configured to control a write operation by setting a storage area of the memory block in a plurality of predetermined units and allocating a new storage area independent of a data storage area stored by a previous write command according to a write command from the host interface. Semiconductor storage system comprising a. The method of claim 3, wherein The setting of the storage area in a predetermined unit by the memory controller may include setting a plurality of word line groups by grouping pages connected to the same word line in the memory block. The method of claim 4, wherein The memory controller stores data in the word line group, and skips if there is a free page after storing the data. The method of claim 5, If the data requested in the write command is an amount of data exceeding one or more word line groups, the memory controller allocates a plurality of word line groups, but includes a word line group of data stored by a pre-write request. Semiconductor storage system that controls the overlapping. The method of claim 3, wherein The memory controller controls the re-execution of the write operation only for the data corresponding to the current write request if the current write command fails. Allocating word line groups grouped by a predetermined page unit to a data storage area according to an external write request; And skipping the remaining free pages in the wordline group after storing the data. The method of claim 8, Assigning to the storage area, A method of controlling a semiconductor storage system for allocating a word line group different from a word line group of data stored by a previous write request.

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