KR20100121959A - Plasma display panel device - Google Patents

Abstract

PURPOSE: A plasma display device is provided to minimize interference by separating a first discharge point through the different application of a first sustain signal. CONSTITUTION: A plasma display device includes a plasma display panel and a driving unit. The driving unit applies a driving signal to a scan electrode(11). The scan electrode is divided into a first group and a second group. One frame is comprised of a plurality of sub fields. A first sustain signal is applied to the first group. A second sustain signal is applied to the second group for the application time of a first sustain signal to the first group.

Description

Plasma display panel device

The present invention relates to a plasma display device. More particularly, the present invention relates to a plasma display device, and more specifically, to differently apply a first sustain signal from a sustain signal applied to scan electrodes divided into first and second groups in a sustain period. The present invention relates to a plasma display device which is easy to minimize interference and reduce the occurrence of bright spot false discharge.

In general, a plasma display apparatus includes a plasma display panel in which a partition wall formed between an upper substrate and a lower substrate forms one discharge cell, and each discharge cell includes neon, helium, or a mixture of neon and helium. A main discharge gas such as (Ne + He) and an inert gas containing a small amount of xenon are filled. When discharged by a high frequency voltage, the inert gas generates vacuum ultraviolet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because a thin and light configuration is possible.

In this case, the plasma display device simultaneously applies a sustain signal to the scan electrodes divided into the first and second groups in the sustain period, whereby bright spot discharge occurs due to interference from the scan electrodes to adjacent scan electrodes when discharge occurs.

In recent years, studies are being conducted to minimize bright spot discharge due to interference to adjacent scan electrodes caused by the first sustain signal among the sustain signals applied during the sustain period.

An object of the present invention is to make the point of application of the first sustain signal among the sustain signals applied to the scan electrodes divided into the first and second groups in the sustain period different from each other, to minimize the interference by separating the first discharge point and to generate the bright point discharge. It is to provide a plasma display device that is easy to reduce the.

The plasma display apparatus of the present invention includes a plasma display panel having a scan electrode formed thereon and a driver for applying a driving signal to the scan electrode, wherein the scan electrodes are divided into first and second groups, and one frame includes a plurality of frames. And a sustain period in at least one subfield of the plurality of subfields, wherein the first group is first applied with a first group of first sustain signals, and before the first group of second sustain signals is applied. The first sustain signal is applied, the second sustain signal is applied to the second group during the application time of the first sustain signal of the first group, and the second sustain signal is applied to the second group of the plurality of sustain signals. .

The plasma display apparatus of the present invention is a scan electrode divided into a first group and a second group, and the application time of the first sustain signal among the sustain signals applied in the sustain period is different, and the first sustain discharge in the first group is generated. The second sustain signal is applied to the two groups, and the first sustain signal is applied while the first sustain discharge is generated in the second group, so that the first sustain discharge is generated in each of the first and second groups. There is an advantage to avoid.

Hereinafter, a plasma display device according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a perspective view illustrating a structure of a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. ) May be formed of a metal such as silver (Ag), chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the first embodiment of the present invention, the sustain electrode pairs 11 and 12 have not only a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also without the transparent electrodes 11a and 12a. Only the bus electrodes 11b and 12b may be constituted. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. Black matrices (BM, 15) are arranged that serve as a blocking function and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the first embodiment of the present invention is formed on the upper substrate 10. The first black matrix 15 and the transparent electrodes 11a and 12a are formed at positions overlapping the partition wall 21. ) And second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, and may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are physically separated.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, magnesium oxide (MgO) may be generally used for the protective film 14, and Si-MgO to which silicon (Si) is added may be used.

Here, the content of silicon (Si) added to the protective film 14 may be 60PPM to 200PPM based on the weight percent.

On the other hand, the address electrode 22 is formed in the direction crossing the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 23 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In the first embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in the first embodiment of the present invention, although each of the R, G, and B discharge cells is shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

2 is a simplified diagram illustrating an electrode arrangement of a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 2, the plurality of discharge cells constituting the plasma display panel is preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only a first embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down or left and right in the center portion of the panel.

3 is a timing diagram of a method of time-division driving by dividing one frame into a plurality of subfields according to the first embodiment of the present invention.

The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to the first embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating a driving signal for driving a plasma display panel according to a first embodiment of the present invention.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. It may include a reset section for initializing the discharge cells of the entire screen by using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells. have.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a scan signal having a negative scan voltage Vsc is sequentially applied to the scan electrode, and at the same time, a positive data signal is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. On the other hand, in order to increase the efficiency of the address discharge, a sustain bias voltage Vzb is applied to the sustain electrode during the address period.

During the address period, the plurality of scan electrodes Y may be divided into two or more groups, and scan signals may be sequentially supplied to each group. Each of the divided groups may be further divided into two or more subgroups. Scan signals may be supplied sequentially. For example, the plurality of scan electrodes Y is divided into a first group and a second group, and scan signals are sequentially supplied to scan electrodes belonging to the first group, and then scan electrodes belonging to the second group Scan signals may be supplied sequentially.

According to the first embodiment of the present invention, the plurality of scan electrodes Y is divided into a first group located at an even number and a second group located at an odd number according to a position formed on a panel. In another embodiment, the display panel may be divided into a first group located above and a second group located below the center of the panel.

The scan electrodes belonging to the first group divided by the above method are further divided into a first subgroup located at an even number and a second subgroup located at an odd number, or the first group. The first subgroup positioned above and the second group positioned below may be divided based on the center of the.

In the sustain period, a sustain pulse having a sustain voltage Vs is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The width of the first sustain signal or the last sustain signal among the plurality of sustain signals alternately supplied to the scan electrode and the sustain electrode in the sustain period may be greater than the width of the remaining sustain pulses.

After the sustain discharge occurs, an erase period for erasing the wall charge remaining in the scan electrode or the sustain electrode of the selected ON cell in the address period by generating a weak discharge may be further included after the sustain period.

The erase period may be included in all or some of the plurality of subfields, and the erase signal for the weak discharge is preferably applied to the electrode to which the last sustain pulse is not applied in the sustain period.

The cancellation signal is a ramp-type signal that gradually increases, a low-voltage wide pulse, a high-voltage narrow pulse, an exponential signal, or half Sinusoidal pulses can be used.

In addition, a plurality of pulses may be sequentially applied to the scan electrode or the sustain electrode to generate the weak discharge.

The driving waveforms shown in FIG. 4 are first examples of signals for driving the plasma display panel according to the present invention. The present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

The driving section of the plasma display panel may be divided into a power-on sequence section and a normal operation section. The waveforms of the driving signals supplied from the power-on sequence section and the normal operation section may be the same or different as necessary.

That is, when power is supplied to the plasma display device (Power ON), a power-on for preparing a normal operation of the device without displaying an image on the panel for a predetermined time or until the driving voltage to be supplied to the panel reaches a normal level. A power on sequence is performed. Thereafter, the image is displayed by the driving signals supplied to the panel in the normal operation section.

In addition, even before the power supply to the plasma display device is cut off, a power on sequence similar to the power on sequence exists to smoothly terminate the power supply to the driving circuit or the panel.

For example, during a predetermined time after power is supplied to the plasma display device, the data signal is not applied to the panel because the display enable signal has a value of "0" which is a low level. , No image is displayed on the panel. After the predetermined time has elapsed, if the disabling enable signal has a value of "1" which is a high level, the data signal is applied to the panel, and the image is displayed on the panel. In addition, during a predetermined time before the power supply to the plasma display device is terminated, the disabling enable signal again has a low level of "0", and thus no image is displayed on the panel.

5 is a block diagram illustrating a driving module for driving a plasma display panel according to a first embodiment of the present invention.

Referring to FIG. 5, the plasma display apparatus is installed on a rear surface of a plasma display panel (not shown) to support the plasma display panel and to absorb and emit heat from the heat dissipation frame 30 and the heat dissipation frame 30. A printed circuit board (PCB) is installed on a rear surface of the plasma display panel to supply a driving voltage to the plasma display panel.

The plasma display panel includes a plurality of scan electrodes (not shown), a sustain electrode (not shown), and an address electrode (not shown).

On the PCB, an address driver 50 for supplying a driving voltage to the plurality of address electrodes, a scan driver 60 for supplying a driving voltage to the plurality of scan electrodes, and a driving voltage for the plurality of sustain electrodes. The drive driver 80 and the address driver 50 and the scan driver 60 and the sustain driver that control the sustain driver 70, the address driver 50 and the scan driver 60, and the sustain driver 70 to supply the 70) and a power supply unit (PSU) 90 for supplying power to the control driver 80 is disposed.

The address driver 50 supplies a driving voltage to the plurality of address electrodes to select only discharge cells that are discharged among the plurality of discharge cells formed in the plasma display panel.

The address driver 50 may be installed at any one or both of the upper side and the lower side of the plasma display panel according to a single scan method or a dual scan method.

In the address driver 50, a data IC (not shown) is installed to control currents applied to the plurality of address electrodes, and in the data IC, switching is generated to control an applied current so that a large amount of heat may be generated. have. Therefore, a heat sink (not shown) may be installed in the address driver 50 to eliminate heat generated in the control process.

The scan driver 60 may include a scan sustain board 62 connected to the driving controller 80, and a scan driver board 64 connecting the scan sustain board 62 to the plasma display panel.

The scan driver board 64 may be divided into two parts, an upper side and a lower side. Unlike the scan driver board 64, the scan driver board 64 may be installed as a single piece or a plurality of scan driver boards.

The scan driver board 64 is provided with a scan IC 65 for supplying a driving voltage to the plurality of scan electrodes, and the scan IC 65 continuously applies reset, scan and sustain signals to the plurality of scan electrodes. Can be.

The sustain driver 70 supplies a driving voltage to the plurality of sustain electrodes.

The control driver 80 converts the input image signal into data to be supplied to the address electrodes by performing predetermined signal processing on the input image signal using the signal processing information stored in the memory, and sorts the converted data according to a scanning order. have. In addition, the driving controller 80 supplies a timing control signal to the address driver 50, the scan driver 60, and the sustain driver 70, thereby providing the address driver 50, the scan driver 60, and the sustain. The driving signal supply timing of the driving unit 70 may be controlled.

In the case of the plasma display device according to the present invention, the driving voltage output from the sustain driver 70 may be supplied to the plurality of sustain electrodes through the connection member 66.

Here, one end of the connection member 66 is connected to a printed circuit board formed on the sustain driver 70, and the other end is connected to a pad electrode (not shown) connected to the plurality of sustain electrodes to supply a driving voltage.

In order to connect the printed circuit board (PCB) and the plurality of sustain electrodes on both sides of the heat dissipation frame 30 in opposite directions, the connection member 66 is preferably composed of a flexible printed circuit (FPC).

6 is a circuit diagram illustrating a scan driving circuit of a plasma display device according to a first embodiment of the present invention.

Referring to FIG. 6, the scan driver circuit 100 includes an energy recovery unit 110, a sustain driver 120, a reset driver 130, and first and second scan ICs 140 and 150.

The sustain driver 120 includes a sustain voltage source Vsus for supplying a high potential sustain voltage Vs during the sustain period, and a sustain voltage turned on such that the sustain voltage Vs is applied to the first and second scan electrodes Y1_1.Y2_1. An up switch Su_up and a sus-down switch Su_dn are turned on so that voltages applied to the first and second scan electrodes Y1_1 and Y2_1 are lowered to the ground voltage GND.

That is, the sustain driver 120 has a sus-up switch Su_up connected to the sustain voltage source Vsus, and a sus-down switch Su_dn connected to the sus-up switch Sus_up and ground GND.

The energy recovery unit 110 may include a source capacitor Cs for recovering and storing energy supplied to the first and second scan electrodes Y1_1 and Y2_1, and the energy stored in the source capacitor Cs may be the first and second scan electrodes Y1_1. And an energy recovery switch ER_dn which is turned on to be supplied to Y2_1 and an energy recovery switch ER_dn which is turned on to recover energy from the scan electrode Y. The source capacitor Cs forms a resonant circuit together with the inductor L to enable energy supply and recovery to the first and second scan electrodes Y1_1 and Y2_1.

The reset driver 130 is connected to a set-up switch (Set_up) and a voltage source (-Vy) that are turned on to supply a gradually rising set-up signal to the first and second scan electrodes (Y1_1 and Y2_1). A current pass with the set-down switch Set_dn and the first and second scan electrodes Y1_1 and Y2_1 turned on to supply the set-down signal gradually descending to −Vy to the first and second scan electrodes Y1_1 and Y2_1. A pass switch Ps forming a path.

The set-up switch Set_up has a drain connected to a sustain voltage power source, a source connected to a pass switch Pass_sw, and a gate connected to a variable resistor (not shown). The set-up signal is generated which gradually rises as the resistance value of the variable resistor changes.

The set-down switch Set_dn has a drain connected to the scan IC 80, a source connected to a negative voltage (-Vy), and a variable resistor (not shown) connected to the gate. As the resistance value of the variable resistor (not shown) changes, a setdown signal that gradually decreases is generated.

Each of the first and second scan ICs 140 and 150 may include a scan-up switch SW1 connected to a scan voltage source Vsc that is turned on to apply the scan voltage Vsc to the first and second scan electrodes Y1_1 and Y2_1. SW1_1 and scan-down switches SW2 and SW2_1 turned on to apply the ground voltage GND to the first and second scan electrodes Y1_1 and Y2_1.

FIG. 7 is a timing diagram illustrating a method of driving a scan electrode of a plasma display panel in two groups according to the first embodiment of the present invention.

In FIG. 7, the scan electrode Y formed in the plasma display panel may be divided into at least two groups Y1 and Y2, which will be described as first and second groups Y1 and Y2 in FIG. 7.

Referring to FIG. 7, the address period AP may be divided into first and second group scan periods AP_1 and AP_2 which supply scan signals to the first and second groups Y1 and Y2, respectively. After the scan signals are sequentially supplied to the first and second scan electrodes Y1_1 and Y1_2 belonging to the first group Y1 during the group scan period AP_1, the second group Y2 during the second group scan period AP_2. The scan signals may be sequentially supplied to the first and second scan electrodes Y2_1 and Y2_2 belonging to ().

For example, the scan electrode (Y) is the first group (Y1) and the second (odd), the first group located in the even (th) from the top of the plasma display panel according to the position formed on the plasma display panel The light emitting device may be divided into a group Y2, and as another example, may be divided into a first group Y1 positioned above and a second group Y1 positioned below the center of the plasma display panel. The scan electrodes Y may be divided into various methods in addition to the above-described method, and the number of scan electrodes Y belonging to each of the first and second groups Y1 and Y2 may be different from each other.

During the reset period RP, negative charge of negative polarity (-) is formed in the scan electrode Y for the address discharge, and the driving signal supplied to the scan electrode Y during the address period AP maintains the scan bias voltage. Address discharge is generated by sequentially supplying negative scan signals.

When the scan signals are sequentially supplied by dividing the scan electrodes Y into the first and second groups Y1 and Y2, the scan signals are applied to the first and second scan electrodes Y1_1 and Y1_2 belonging to the first group Y1. During the first group scan period AP_1 to be supplied, wall charges of negative polarity (−) formed in the first and second scan electrodes Y2_1 and Y2_2 belonging to the second group Y2 may be lost. Accordingly, even when a scan signal is supplied to the first and second scan electrodes Y2_1 and Y2_2 belonging to the second group Y2 during the second group scan period PA_2, an address misfiring discharge that does not generate address discharge may occur.

Therefore, as shown in FIG. 6, from the reset period RP to before the second group scan period AP_2 to which the scan signal is supplied to the second group Y2, for example, the first group scan period AP_1. While the scan bias voltage Vscb2_1 supplied to the second group Y2 is increased to reduce the loss of the negative (-) wall charges formed in the first and second scan electrodes Y2_1 and Y2_2 belonging to the second group Y2. Can be reduced.

That is, in the first group scan period AP_1, the scan bias voltage Vscb2_1 greater than the scan bias voltage Vscb1 supplied to the first and second scan electrodes Y1_1 and Y1_2 of the first group Y1 is applied to the second group. The address mis-discharge can be reduced by supplying to the first and second scan electrodes Y2_1 and Y2_2 of (Y2).

The scan bias voltage Vscb2_1 supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the first group scan period AP_1 may be smaller than the sustain voltage Vs. When the scan bias voltage Vscb2_1 is smaller than the sustain voltage Vs, unnecessary increase in power consumption may be prevented and bright spot discharge may be reduced due to too much wall charge of the scan electrode.

The negative third scan bias voltage Vscb3 is applied to the first and second scan electrodes Y1_1 and Y1_2 of the first group Y1 during the first group scan period AP_1. When the scan signal is applied to the scan electrode, the potential difference with the data signal applied to the address electrode is increased due to the negative bias voltage, so that the discharge occurs easily.

First and second scans of the first group Y1 during the first group scan period to facilitate the address discharge by increasing the potential difference with the positive data signal supplied to the address electrode X during the address period AP. The scan bias voltage Vscb1 supplied to the electrodes Y1_1 and Y1_2 and the scan bias voltage supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the second group scan period AP_2 ( Vscb2_2 may be a negative voltage. Accordingly, in consideration of the ease of driving circuit configuration, the scan bias voltage Vscb2_1 supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the first group scan period AP_1 is It may be the ground voltage GND, and the scan bias voltage Vcb1 supplied to the first and second scan electrodes Y1_1 and Y1_2 of the first group Y1 may be constant during the address period AP.

In addition, the scan bias voltage supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 may change during the address period AP. More specifically, the scan bias voltage Vscb2_1 supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the first group scan period AP_1 of the address period AP is the second group. The scan bias voltage Vscb2_2 may be greater than the scan bias voltage Vscb2_2 supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the scan period AP_2.

When the scan electrode Y is divided into the first group Y1 located in the even-numbered second and the second group Y2 located in the odd-numbered, the first and second portions during the first group scan period AP_1 as described above. By supplying different scan bias voltages Vscb1 and Vscb2_1 to the groups Y1 and Y2, the influence of interference between adjacent discharge cells can be reduced.

In addition, the scan bias voltage Vsc2_1 supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2 during the first group scan period AP_1 may have a value of 2 or more, in which case The scan bias voltage Vscb2_1 higher during the first group scan period AP_1 to the scan electrode supplied later than the scan electrode supplied first among the first and second scan electrodes Y2_1 and Y2_2 of the two groups Y2. Can be supplied. Accordingly, the loss of wall charges formed in the scan electrode in the reset period can be reduced more effectively.

In the sustain period SP, the first group sustain period SP_1 and the first and second group second sustain to supply the first and second group first sustain signals of the first and second groups Y1 and Y2 to the first and second groups Y1 and Y2 are provided. It can be divided into a second group sustain period SP_2 for supplying a signal.

Here, in the first group sustain period SP_1, the first sustain signal Vp1 is supplied after the first group first sustain signal Vsus1 is supplied to the first and second scan electrodes Y1_1 and Y1_2 of the first group Y1. The second sustain signal Vp2 is supplied to the first and second scan electrodes Y2_1 and Y2_2 of the second group Y2, and the second sustain signal Vsus2_1 is supplied.

In the second group sustain period SP_2, a second sustain signal is commonly supplied to the first and second groups Y1 and Y2.

In this case, the first group first sustain signal Vsus1 and the second group first sustain signal Vsus2_1 supplied to the first and second groups Y1 and Y2 during the first group sustain period SP_1 have a voltage level of sustain voltage. Same as each other.

That is, while the first group first sustain signal Vsus1 is supplied to the first group Y1 during the first group sustain period SP_1, the second sustain signal Vp2 is supplied to the second group Y2, thereby providing a first result. It is possible to prevent bright spot misfiring caused by interference caused by the first sustain discharge in the first and second scan electrodes Y1_1 and Y1_2 of the first group Y1.

In addition, while the second group first sustain signal Vsus2_1 is supplied to the second group Y2 during the first group sustain period SP_1, the first sustain signal Vp1 is supplied to the first group Y1, thereby providing a first result. It is possible to prevent the bright spot misdischarge caused by the interference caused by the first sustain discharge in the first and second scan electrodes Y2_1 and Y2_2 of the two groups Y2.

The driving waveform as described with reference to FIG. 6 may be applied to some subfields among a plurality of subfields constituting one frame, and may be applied to at least one subfield among second and subsequent subfields. Can be.

FIG. 8 is a timing diagram illustrating driving signals supplied to the first scan electrodes of the first and second groups illustrated in FIG. 7, and FIGS. 9 to 10 are operations of the scan driving circuit for supplying the driving signals illustrated in FIG. 8. It is a state diagram showing laziness.

FIG. 8 illustrates a sustain signal supplied to each of the first scan electrode Y1_1 of the first group Y1 and the first scan electrode Y2_1 of the second group Y2 during the sustain period SP.

Referring to FIG. 8, the sustain period SP includes a first group sustain period SP_1 and a second group sustain period SP_2.

Here, during the first group sustain period SP_1, the first group first sustain signal Vsus1 is applied to the first scan electrode Y1_1 of the first group Y1 for a first time T1, and the first group Before the second sustain signal Vsus1 is applied, the first sustain signal Vp1 is maintained for the first time T1.

During the first group sustain period SP_1, the first scan electrode Y2_1 of the second group Y2 is maintained as the second sustain signal Vp2 for the first time T1 and then, for the first time ( During T1), the second group first sustain signal Vsus1 is applied.

Here, the first time T1 of the first group first sustain signal Vsus1 may be 3 to 5 times the application time of the first group second sustain signal Vsus2.

As shown in FIG. 9, the rising section ① of the first group first sustain signal Vsus includes the sus-up switch Sus_up, the pass switch Ps, and the first scan electrode Y1_1 of the first group Y1. ) Is connected to the second switch SW2 of the first scan IC 140 to supply the sustain voltage Vs of the sustain voltage source Vsus.

At this time, the rising period ② of the second sustain signal Vp2 is maintained at a predetermined voltage level on the first sustain electrode Y2_1 of the second group Y2 by the sustain voltage Vs applied to the contact point P. Is kept rising.

That is, the second sustain signal Vp2 generates a potential difference due to the sustain voltage Vs supplied to the first sustain electrode Y1_1 of the first group Y1, and thus the ground voltage GND to the sustain voltage Vs. 0.4 times compared to the voltage level.

As shown in FIG. 10, the falling section ③ of the first group first sustain signal Vsus is formed by the first scan IC 140 connected to the first scan electrode Y1_1 of the first group Y1. In the state where the two switch SW2 is kept turned on, the sus-up switch Sus_up and the pass switch Ps are turned off and held down to the ground voltage GND.

At this time, the falling section ④ of the second sustain signal Vp2 falls from the sustain voltage Vs to the ground voltage GND at the contact point P, so that the first sustain electrode Y2_1 of the second group Y2 falls. Is maintained to the ground voltage GND.

That is, as the second sustain signal Vp2 falls from the sustain voltage Vs supplied to the first sustain electrode Y1_1 of the first group Y1 to the ground voltage GND, the potential at the contact point P is reduced. A difference is generated and kept down to the ground voltage GND.

8, after the first group first sustain signal Vsus1 is supplied to the first scan electrode Y1_1 of the first group Y1 for the first time T1, the second time T2. The sustain signal Vsus_Z is supplied to the sustain electrode Z while being maintained at the ground voltage GND.

In this case, the second time T2 of the sustain signal Vsus_Z is preferably 0.4 times to 0.6 times the first time T1.

Here, the first time T1 is preferably 8us to 12us, and is longer than the supply time of the first group second sustain signal Ysus2 supplied to the first scan electrode Y1_1 of the first group Y1. Interference to neighboring scan electrodes can be prevented.

In addition, during the first group sustain period SP_1, the second group first sustain signal Vsus2_1 is applied to the first scan electrode Y2_1 of the second group Y2 for the first time T1, and the first group The first sustain signal Vp1 is supplied to the first scan electrode Y1_1 of (Y1).

Since this is the same method as the first group first sustain signal Vsus1 supplied to the first scan electrode Y1_1 of the first group Y1, description thereof is omitted.

The second group first sustain signal Vsus2_1 supplied to the first scan electrode Y2_1 of the second group Y2 is turned on and turned off by the second switch SW2_1 of the second scan IC 150. .

Therefore, the plasma display device of the present invention is a scan electrode divided into first and second groups, and the first sustain signal is supplied with different application time points in the sustain period so that the first group signal is discharged to the second group during the first group discharge. By reducing the interference, there is an advantage of reducing the bright spot misdischarge.

Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains can make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made. Accordingly, modifications of the embodiments of the present invention will not depart from the scope of the present invention.

1 is a perspective view illustrating a structure of a plasma display panel according to a first embodiment of the present invention.

2 is a simplified diagram illustrating an electrode arrangement of a plasma display panel according to a first embodiment of the present invention.

3 is a timing diagram of a method of time-division driving by dividing one frame into a plurality of subfields according to the first embodiment of the present invention.

4 is a timing diagram illustrating a driving signal for driving a plasma display panel according to a first embodiment of the present invention.

5 is a block diagram illustrating a driving module for driving a plasma display panel according to a first embodiment of the present invention.

6 is a circuit diagram illustrating a scan driving circuit of a plasma display device according to a first embodiment of the present invention.

FIG. 7 is a timing diagram illustrating a method of driving a scan electrode of a plasma display panel in two groups according to the first embodiment of the present invention.

FIG. 8 is a timing diagram illustrating driving signals supplied to first scan electrodes of each of the first and second groups illustrated in FIG. 7.

9 to 10 are state diagrams illustrating the operation of the scan driving circuit for supplying the driving signal shown in FIG. 8.

Claims (7)

A plasma display apparatus including a plasma display panel having a scan electrode formed thereon and a driving unit configured to apply a driving signal to the scan electrodes. The scan electrode is divided into first and second groups, One frame is composed of a plurality of subfields, and in a sustain period in at least one subfield of the plurality of subfields, In the first group, Among the plurality of sustain signals, the first sustain signal is applied after the first group first sustain signal is applied and before the first group second sustain signal is applied. In the second group, And a second sustain signal is applied during the application time of the first group first sustain signal, and a second group first sustain signal is applied from among the plurality of sustain signals. The method of claim 1, The first group includes even-numbered scan electrodes of the scan electrodes. And the second group includes odd-numbered scan electrodes of the scan electrodes. The method of claim 1, wherein the first and second holding signals, A plasma display device, wherein the voltage levels are the same. The method of claim 3, wherein the voltage level of the first and second sustain signals, And a ground voltage equal to 0.4 times a voltage level of the first group first sustain signal. The method of claim 1, wherein at least one of the first and second sustain signals is Plasma display device, characterized in that 8us to 12us. The method of claim 1, wherein the application time of the first group first sustain signal is And 3 to 5 times the application time of the second sustain signal of the first group. The method of claim 1, wherein in the second group, And after the second group first sustain signal is applied, a second group second sustain signal is applied at the same time as the first group second sustain signal is applied.

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