KR20100074706A - Non-volatile memory device and method for recording the number of program operation - Google Patents

Abstract

PURPOSE: A nonvolatile memory device and a method for recording the number of counts of program operation drive are provided to improve the reliability by recording the number of counts of program operation of a memory cell. CONSTITUTION: A page buffer(110) comprises a latch. The latch stores a value which is changed according to the fact that program data of a memory cell is transferred. The page buffer drives the program operation of the memory cell. A record part(120) records the drive frequency of the page buffer. The record part includes a nonvolatile memory cell. A controller controls the operation of the record part.

Description

Non-volatile memory device and method of recording the number of program operation driving of nonvolatile memory device {NON-VOLATILE MEMORY DEVICE AND METHOD FOR RECORDING THE NUMBER OF PROGRAM OPERATION}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device, and more particularly, to a nonvolatile memory device and a method for recording a program operation driving time of the nonvolatile memory device.

The memory device is divided into a volatile memory device and a nonvolatile memory device according to whether data is maintained when the power supply is cut off. Volatile memory devices are memory devices in which data is lost when a power supply is cut off, and DRAM and SRAM are examples thereof. A nonvolatile memory device is a memory device in which stored data is maintained even when a power supply is cut off, and a flash memory device belongs to the nonvolatile memory device.

The nonvolatile memory device may be divided into a charge trapping nonvolatile memory device and a floating gate memory device according to a data storage method. The charge trap type nonvolatile memory device traps charge at a deep level tr site of the charge trap layer to store data, and the floating gate type nonvolatile memory device injects charge into the floating gate electrode to store data. Save it.

Such a nonvolatile memory device performs a program / erase operation by using FN tunneling (Fowler-Nordheim tunneling) method, which traps charge in the charge trap layer (or stores charge in the floating gate electrode) of the memory cell. By increasing the threshold voltage, data is stored. In addition, data is erased by releasing charge trapped in the charge trap film (or charge stored in the floating gate electrode) to reduce the threshold voltage.

Hereinafter, a configuration and program operation of a nonvolatile memory device will be described in detail with reference to the accompanying drawings.

1 is a detailed embodiment of a cell array and a page buffer of a nonvolatile memory device according to the prior art.

As shown, the page buffer 10 is connected to the cell array 20 to allow a memory cell to perform a program operation, and includes a bit line selector 11, a precharge unit 12, and a register unit 13. do.

Here, the bit line selector 11 is connected to the bit line BL of the cell array 20 having a plurality of memory cells, and connects the bit line BL and the sensing node SO in response to the bit line selection signal. Connect. The precharge unit 12 is connected between the sensing node SO and the power supply voltage. The precharge unit 12 precharges the power supply voltage to the sensing node SO during the precharge operation. The register unit 13 is connected between the sensing node SO and the input / output terminal (Y confirmation) and includes a latch for temporarily storing data, the latch being a value stored depending on whether program data is transferred to the memory cell. (Hereinafter referred to as latch value) fluctuates. Hereinafter, an overall process of driving a program operation by the page buffer 10 will be described.

First, the latch value of the register unit 13 is initialized. When the reset signal is applied at the 'high' level, the node QA of the latch is grounded (Vss), and the node QA value is initialized to the 'low' level. Subsequently, when programming '1' data, the data input signal DI is applied as 'high', and the node QAb is 'low' level by the input / output terminal (Y check) connected to the ground voltage. Node QA is at the 'high' level. In addition, when the '0' data is to be programmed, the inverted data input signal nDI is applied at the 'high' level so that the input / output terminal (Y confirmation) is connected to the node QA of the latch and thus the node QAb. ) Maintains the 'high' level, and node QA maintains the 'low' level. In the present specification, a case in which '1' data is to be programmed is referred to as driving a program operation, and it can be seen that a latch value changes when the program operation is driven.

Subsequently, the precharge unit 12 precharges the sensing node SO. When the 'low' level precharge signal PRECHb is applied, the power supply voltage Vcc is applied to the sensing node SO to precharge the sensing node SO to the power supply voltage Vcc level.

Subsequently, the bit line selector 11 connects the selected bit line with the sensing node SO. When the discharge signal DISCHe of the 'low' level is applied, the bias voltage VIRPWR applied to the bit line BLe is blocked in response. In addition, when the bit line selection signal BSLe of the 'high' level is applied, the bit line BLe is connected to the sensing node SO in response to the bit line selection signal BSLe.

Subsequently, when the program signal PGM of the 'high' level is applied, the node QA and the sense node SO of the latch are connected in response to the latch signal stored in the register 113 to the sense node SO. Delivered. The data transferred to the sensing node SO is transferred to the memory cell of the cell array 200 through the connected bit line BLe and the data is programmed according to a program voltage applied to the word line of the memory cell.

However, since the nonvolatile memory device performs the program / erase operation by the F-N tunneling method, a high program voltage or an erase voltage must be applied. Accordingly, the electric field in the cell is suddenly changed during the program / erase operation, which causes wear of the charge trap film (or the floating gate electrode) and the tunnel insulating film interposed between the substrate and the memory cell.

In addition, since the program / erase operation is repeatedly performed, as the number of cycling increases, charges are trapped in the tunnel insulating film or charges are trapped at the interface between the tunnel insulating film and the substrate. This increases the threshold voltage distribution width of the memory cell, accelerates the accumulation of traps, and causes chip failure. In particular, in the case of MLC (Multi Level Cell) storing a plurality of data in one memory cell, the threshold voltage is distributed to a plurality of levels, the problem as described above is further exacerbated. That is, the reliability of the memory element is further lowered.

Therefore, in order to solve the above problems, a mechanism for checking the number of program operations of a memory cell to maintain or improve the reliability of a nonvolatile memory device is required.

SUMMARY OF THE INVENTION The present invention has been proposed to meet the above demands, and an object of the present invention is to provide a nonvolatile memory device suitable for improving reliability by recording the number of program operations of a memory cell.

In accordance with another aspect of the present invention, there is provided a nonvolatile memory device, comprising: a page buffer including a latch whose value is changed depending on whether program data is transferred to a memory cell; And a recording unit for recording the number of times the value stored in the latch is changed.

In addition, the present invention provides a method of writing a program operation driving count of a nonvolatile memory device, the method comprising: detecting a latch value variation of a page buffer including a latch whose value is changed depending on whether program data is transferred to a memory cell; ; When the latch value is changed, storing a predetermined amount of charge in a nonvolatile memory cell to record the number of times of driving of a program operation of the memory cell; And determining the number of driving times of a program operation of the memory cell through the threshold voltage of the nonvolatile memory cell.

According to the present invention, the number of times a program operation is driven in the page buffer, that is, the number of times a predetermined memory cell performs a program operation can be recorded. Therefore, when a memory cell performs a program operation more than a reference number of times, by treating the block as a fail block, the reliability of the nonvolatile memory device can be improved.

Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

2 is a diagram illustrating a configuration of a program operation driving circuit of a nonvolatile memory device according to the present invention.

As shown, the program operation driving circuit 100 according to the present invention records the number of driving of the page buffer 110 and the page buffer 110 for driving the program operation of the memory cells included in the cell array 200. And a control unit 130 for controlling the operation of the recording unit 120 and the recording unit 120.

The page buffer 110 receives input data for a program operation of the memory cell, outputs the program data, and transmits the program data to the memory cell 200 through the bit line. As described above, an operation of converting the received input data into program data and transferring the received input data to the memory cell 200 is referred to as program operation driving.

The recording unit 120 records the number of driving times of the program operation of the page buffer 110. Here, the recording unit 120 is preferably made of a nonvolatile memory cell, for example, a floating gate electrode type nonvolatile memory cell, a charge trapping nonvolatile memory cell, FeRAM or MRAM. When the recording unit 120 is configured using the nonvolatile memory cell as described above, the number of driving of the program operation may be recorded by storing a predetermined amount of charge in the recording cell and increasing the threshold voltage during every program driving.

The controller 130 controls the recording unit 120 to store the number of driving of the page buffer 110. In addition, as described above, in the case of the recording unit 120 formed of the nonvolatile memory cell, when the threshold voltage of the nonvolatile memory cell is greater than or equal to the reference voltage, the memory cell is referred to as the reference number. It can be confirmed that the above operation.

Here, the reference voltage is determined in consideration of the amount of charge stored in the program driving and the reference number of times of driving the program operation to ensure the reliability of the memory device. That is, the threshold voltage of the nonvolatile memory cell when the charge is stored in the nonvolatile memory cell as many times as the reference number for which the reliability of the nonvolatile memory device is guaranteed is referred to as a reference voltage. In addition, the reference number is determined by the number of program operation driving times in which the reliability of the nonvolatile memory device is guaranteed. The reference number is determined in consideration of deterioration of characteristics of the nonvolatile memory cell due to repetitive write operations.

The controller 130 controls the recording unit 120 to record the number of program driving times of the page buffer 110 in the recording unit 120 and check the recorded number of program driving times.

According to one embodiment of the present invention as described above, the number of program driving of the page buffer 110 can be recorded and confirmed. As a result of the check, when the number of program driving is greater than or equal to the reference number, the block may be treated as a fail block, thereby improving reliability of the nonvolatile memory device.

In particular, the data previously stored in the failed block may be moved to another block through a copy back operation. In addition, the block can be prevented from being accessed later. Such matters can be variously applied according to the intention of the designer.

3 is a detailed diagram of a program operation driving circuit of a nonvolatile memory device according to the first embodiment of the present invention.

As shown, the program operation driving circuit 100 operates the page buffer 110 for causing the memory cell to perform a program operation, the recording unit 120 for recording the number of times the page buffer 110 is driven, and the operation of the recording unit 120. It includes a control unit 130 for controlling the, is connected to the cell array 200 to drive a program operation.

The page buffer 110 includes a bit line selection unit 111, a precharge unit 112, and a register unit 113. The program operation driving of the page buffer 110 is the same as the conventional technology described above.

As described above, when the '1' data is to be programmed, that is, when the program operation is driven, the latch value is changed from the 'low' level to the 'high' level. That is, since the latch value is changed when the program operation is driven and the changed value is maintained until the next program operation is driven, the recording unit 120 changes the latch value, that is, the latch value is changed from the 'low' level to the 'high' level. By counting the number of times, the number of program operation driving times of the page buffer 110 can be confirmed.

The recording unit 120 is for recording the number of driving of the page buffer 110. In the drawing, the recording unit 120 is configured to be connected to the QA node of the latch 113. However, the recording unit 120 is only an example, and the circuit configuration is performed according to the designer's intention. Can be applied in various ways. For example, the recording unit 120 may be configured to be connected to the QAb node of the latch.

Here, the recording unit 120 is connected between the write cell 122 and the latch 113 and the write cell 122 for recording the number of variations of the value stored in the latch 113 of the page buffer 110, and the latch ( And a pass transistor 121 for checking whether the value stored in 113 is changed and writing the number of changes in the write cell 122. FIG.

As described above, the write cell 122 is preferably made of a nonvolatile memory cell. For example, in the case of a floating gate electrode type nonvolatile memory cell, a predetermined amount of charge is stored in the floating gate electrode during program driving to record the number of driving times of the program operation. In addition, in the case of the charge trapping type nonvolatile memory cell, a predetermined amount of charge is trapped in the charge trap layer during the program driving to record the number of driving times of the program operation.

The controller 130 controls the operation of the recording unit 120 to record the program operation driving count of the page buffer 110. In addition, the number of program operation drives recorded in the recording unit 120 is checked.

First, the recording operation of the program operation driving count of the recording unit 120 by the control unit 130 will be described. The recorder 120 turns on the write cell 122 and the pass transistor to check whether the value stored in the latch 113 varies depending on whether or not the current flows.

First, when the value stored in the node QA of the latch 113 is changed to the 'high' level by the program driving, the pass transistor 121 of the 'high' level is applied to turn on the pass transistor 121. In addition, the write cell 122 is turned on by applying a write signal REC having a magnitude large enough to turn the write cell 122 on. As a result, current flows in the channel region of the recording cell 122. At this time, the controller 130 detects the current flowing in the Vt read and confirms that the node QA value of the latch 113 is changed, that is, changed to 'high'.

Subsequently, when it is confirmed that the node QA value of the latch 113 is changed, the controller 130 turns on the write cell 122 in the state where the pass transistor 121 is turned off to record the number of changes. .

That is, the controller 130 turns off the pass transistor 121 by applying a pass signal having a 'low' level, thereby blocking the flow of current to the write cell 122. Subsequently, the controller 130 applies a write signal REC corresponding to a program voltage so that the write cell 122 performs a program operation. Here, the write signal REC for the program operation is to store a certain amount of charge in the write cell 122 and has a larger value than the write REC signal for turning on the write cell 122 described above. . In addition, the magnitude of the write signal REC for the program operation has a fixed value so that the same amount of charge is stored in every write.

Accordingly, the controller 130 may store a predetermined amount of charge in the write cell 122 whenever the latch node QA is changed. In particular, since the nonvolatile memory device performs a program in units of pages, it is preferable that the program operation of the write cell 122 be performed after the program operation of the last page is completed.

Second, the operation of confirming the number of times of driving the program operation recorded in the recording cell 122 by the controller 130 will be described. Here, the checking of the number of driving of the program operation may be performed at predetermined time intervals or after the program operation is completed. Alternatively, when the latch value variation is detected by the program operation driving, the program operation driving number may be checked first, and the writing operation may be performed only when the program operation driving number is less than or equal to the reference number.

When it is detected that the latch value is changed to the 'high' level by driving the program operation, the controller 130 applies the write signal REC of the reference voltage for checking the threshold voltage. Here, the reference voltage b is a magnitude corresponding to the threshold voltage value of the write cell 122 when the program operation is driven by a reference number for which the reliability of the memory device is guaranteed. The reference voltage b is turned on. It has a smaller value than the magnitude (a) of the write signal (REC) and the magnitude (c) of the write signal (REC) for the program operation (b <a <c).

Subsequently, the controller 130 checks whether the recording cell 122 is turned on. Here, whether the write cell 122 is turned on may be confirmed by detecting whether a current flows in Vt read. When the current flows, it means that the threshold voltage of the write cell 122 is smaller than that of the reference voltage, which means that the reliability of the memory device can be guaranteed. In addition, when no current flows, the threshold voltage of the write cell 122 is larger than that of the reference voltage, which means that the page buffer 110 is driven more than the reference number of times to ensure the reliability of the memory device. .

Therefore, when no current flows, the block may be processed as a fail block, and the fail block process may be performed by the page buffer 110. However, data previously stored in the block is preferably moved to another block by copyback, and it is preferable that the block is not accessed afterwards.

4 is a timing diagram of each signal applied when driving a program operation of a program operation driving circuit to which the present invention is applied.

First, when the latch value QA is changed to a 'high' level by driving a program operation, a pass signal Pass having a 'high' level is applied to turn on the pass transistor 121 and turn on the write cell 122. A write signal REC that is capable of turning on is applied to turn on the write cell 122. Through this, the controller 130 recognizes that the latch value is changed, that is, the program operation is driven.

Subsequently, in a state where the pass transistor 121 is kept turned on, a write signal REC for applying a high voltage level threshold voltage is applied. In this case, the write signal REC is applied at the level of the reference voltage, and according to whether the write cell 122 is turned on, it may be determined whether the program operation driving of the corresponding memory cell is performed more than the reference number of times.

As a result of the check, when it is performed less than or equal to the reference number, that is, when the write cell 122 is turned on, the pass transistor 121 is turned off by applying a pass signal Pass having a 'low' level, and the program operation is performed. The write cell REC is applied to the write cell 122 to perform a program operation.

Here, the relative magnitude of the write signal REC applied to the write cell 122 is as shown in FIG. Since the write signal REC for checking the threshold voltage is for checking the number of driving of the program operation recorded in the writing cell, the magnitude (b) of the threshold voltage corresponding to the number of driving that can ensure the reliability of the memory device, that is, the reference voltage. Is set to the level of. On the other hand, the write signal REC for turning on the write cell 122 should always turn on the write cell 122 regardless of an increase in the threshold voltage of the write cell 122 according to the write operation. Accordingly, the magnitude (a) of the write signal REC for turning on has a larger value than the magnitude b of the write signal REC for checking the threshold voltage. In addition, since the write signal REC for the program operation is for the program operation of the write cell 122, that is, the nonvolatile memory cell, the write signal REC may have a size capable of F-N tunneling. At this time, since the write signal REC for turning on the write cell 122 should not induce a program operation of the write cell 122, a value smaller than the magnitude c of the write signal REC for the program operation. Has

5 is a flowchart showing a procedure of a program operation driving number recording method according to the first embodiment of the present invention.

The latch 113 of the page buffer 110 varies depending on whether program data is transferred to the memory cell 200. Therefore, the controller 130 detects the latch value variation of the page buffer 110 and confirms the driving of the program operation (S510).

When the program operation is driven, the value stored in the latch node QA is changed to a 'high' level (S520), and when the controller 130 detects that the value stored in the latch node QA is changed to a 'high' level, The threshold voltage of the write cell 122 determines whether the number of program operation driving times of the memory cell is greater than or equal to the reference number K (S530).

Here, the number of driving can be confirmed by using the threshold voltage of the write cell 122. After applying the write signal REC having the reference voltage magnitude to the write cell 122, whether the current flows in Vt read. Check it. When the current flow is sensed in Vt read, it means that the threshold voltage of the write cell 122 is smaller than the reference voltage, and thus, the number of driving times of the program operation is smaller than the reference number. In addition, when the current flow is not sensed in Vt read, it means that the threshold voltage of the write cell 122 is larger than the reference voltage.

As a result of the check, when the memory cell is driven less than or equal to the reference number K, the controller 130 causes the recording cell 122 to perform a program operation to record the program operation drive (S540). In addition, when it is determined that the memory cell has been driven more than the reference number of times, the corresponding block is processed as a fail block (S550).

In addition, details of the program operation driving count recording and the recorded program operation driving count checking operation are the same as those described with reference to FIGS. 2 to 4.

7 is a detailed diagram illustrating a program operation driving circuit of a nonvolatile memory device according to a second exemplary embodiment of the present invention.

As shown, the program operation driving circuit 100 is connected to the node B between the pass transistor 121 and the write cell 122 to confirm the number of variations recorded in the write transistor 122. ) May be further included. In this way, by further including the confirmation transistor 123, the number of program operation driving times recorded in the write cell 122 can be checked at any time. Looking at this in more detail as follows.

When the controller 130 wants to check the number of program operation driving times recorded in the write cell 122, the controller 130 applies a high pass signal Pass to turn off the pass transistor 121. The check transistor 123 is turned on by applying a 'confirmation signal CHECK. As a result, the B node between the pass transistor 121 and the write cell 122 is changed to a 'high' level. However, in an operation other than checking the threshold voltage of the write cell 122, the controller 130 maintains the check transistor 123 in the turn-off state by applying a check signal CHECK having a 'low' level.

Subsequently, the controller 130 applies the write signal REC of the reference voltage b for checking the threshold voltage of the write cell 122, and then checks whether the write cell 122 is turned on. Here, whether the write cell 122 is turned on may be confirmed by detecting whether a current flows in Vt read.

According to the second embodiment of the present invention as described above, the controller 130 checks the number of program operation driving times by applying the 'high' level confirmation signal CHECK at any time to change the B node to the 'high' level. Can be.

In the first embodiment described above, when the latch value is changed, the circuit is configured to perform the write operation according to the check result after confirming the number of driving, but this is only an embodiment and the present invention is not limited thereto. As described in the second embodiment, the configuration of the circuit can be variously changed according to the intention of those skilled in the art, and accordingly, the order of writing operations can also be variously changed. In other words, when the latch value changes, the write operation may be performed first, and the driving number confirmation operation may be performed later.

The present invention is to detect the change in the latch value and to record the number of driving of the program operation. If such an operation is possible, the detailed design of the program operation driving circuit can be variously changed by those skilled in the art. It includes.

6 is a timing diagram of each signal applied when checking the number of times of program operation driving by the program operation driving circuit according to the second embodiment of the present invention.

In order to check the number of driving times of the program operation, the controller applies the confirmation signal CHECK to the 'high' level while the pass signal Pass maintains the 'low' level. In this case, the verify transistor 123 is turned on to bring the node B to a 'high' level. In addition, while the confirmation signal CHECK is maintained at the 'high' level, the controller 130 applies a write signal REC having a reference voltage magnitude for checking the threshold voltage to drive the program operation recorded in the write cell 122. Check it.

Although the technical spirit of the present invention has been specifically recorded in accordance with the above-described preferred embodiments, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

1 is a detailed view of a program operation driving circuit of a nonvolatile memory device according to the prior art.

2 is a block diagram of a program operation driving circuit of a nonvolatile memory device according to the present invention;

3 is a detailed diagram of a program operation driving circuit of a nonvolatile memory device according to the first embodiment of the present invention;

Fig. 4 is a waveform diagram of each signal applied when driving a program operation of the program operation driving circuit according to the first embodiment of the present invention.

5 is a detailed diagram of a program operation driving circuit of a nonvolatile memory device according to the second embodiment of the present invention;

6 is a waveform diagram of each signal applied when checking the number of times of driving of a program operation driving circuit according to a second embodiment of the present invention;

7 is a flowchart illustrating a method of writing a program operation driving count of a nonvolatile memory device according to an exemplary embodiment of the present invention.

[Description of Symbols for Main Parts of Drawing]

100: program operation driving circuit 110: page buffer

111: bit line selection section 112: precharge section

113: latch 120: recording unit

121: pass transistor 122 recording cell

123: check transistor 130: control unit

200: cell array

Claims (21)

A page buffer including a latch whose value is changed depending on whether program data is transferred to a memory cell; And A recording unit for recording the number of times the value stored in the latch is changed Nonvolatile memory device comprising a. The method of claim 1, The recording unit, Consisting of non-volatile memory cells Nonvolatile Memory Device. The method of claim 2, The recording unit, Floating gate electrode type nonvolatile memory cell, charge trapped nonvolatile memory cell, FeRAM or MRAM Nonvolatile Memory Device. The method of claim 2, The recording unit, When a value stored in the latch is changed, a predetermined amount of charge is stored in the nonvolatile memory cell. Nonvolatile Memory Device. The method of claim 1, The recording unit, A write cell for recording the number of variations of the value stored in the latch; And A pass transistor coupled between the latch and the write cell and configured to check whether the value stored in the latch changes or not to write the change count to the write cell. Nonvolatile memory device comprising a. The method of claim 5, The recording unit, The write cell and the pass transistor are turned on to check whether the value stored in the latch is changed according to whether the current flows, In the state where the pass transistor is turned off, the write cell is turned on to record the change count. Nonvolatile Memory Device. The method of claim 5, The recording unit, A confirmation transistor coupled to the node between the pass transistor and the write cell and turned on to change the node to a 'high' level when it is desired to check the number of changes written to the write cell Non-volatile memory device further comprising. The method of claim 1, When the number of times of program operation driving recorded in the recording unit is equal to or more than a reference number of times, The block is treated as a fail block Nonvolatile Memory Device. The method of claim 8, The reference number of times, The number of program operation driving times of the page buffer to ensure the reliability of the nonvolatile memory device. Nonvolatile Memory Device. The method of claim 8, In the case where the recording section is made of a nonvolatile memory cell, If the threshold voltage of the nonvolatile memory cell has a value larger than a reference voltage, the corresponding block is processed as a fail block. Nonvolatile Memory Device. The method of claim 10, The reference voltage is, The threshold voltage of the nonvolatile memory cell when charge is stored in the nonvolatile memory cell as many times as a reference number for which the reliability of the nonvolatile memory device is guaranteed. Nonvolatile Memory Device. The method of claim 8, The page buffer is If the block is treated as a fail block, Copying data previously stored in the fail block to another block Nonvolatile Memory Device. The method of claim 8, If the block is treated as a fail block, To prevent the fail block from being accessed. Nonvolatile Memory Device. Detecting a change in a latch value of a page buffer including a latch in which a stored value is changed according to whether program data is transferred to a memory cell; When the latch value is changed, storing a predetermined amount of charge in a nonvolatile memory cell to record the number of times of driving of a program operation of the memory cell; And Determining a number of driving times of a program operation of the memory cell based on the threshold voltage of the nonvolatile memory cell And a program operation driving count of the nonvolatile memory device. The method of claim 14, The checking of the program operation driving count may include: When the threshold voltage of the nonvolatile memory cell has a value larger than a reference voltage, it is determined that the number of times of driving of the program operation of the nonvolatile memory cell is greater than or equal to the reference number. A method of recording a program operation driving count of a nonvolatile memory device. The method of claim 15, The reference number of times, A number of program operation driving times for which the reliability of the nonvolatile memory device is guaranteed; The reference voltage is, The threshold voltage of the nonvolatile memory cell when charge is stored in the nonvolatile memory cell the reference number of times. A method of recording a program operation driving count of a nonvolatile memory device. The method of claim 14, The nonvolatile memory device, A pass transistor connected to one node of the latch to check whether a value stored in the latch is changed, and a write cell to record the variation number; The checking of the program operation driving count may include: In the state where the pass transistor is turned off, the threshold voltage of the write cell is measured to determine the number of driving times of the program operation. A method of recording a program operation driving count of a nonvolatile memory device. The method of claim 14, The nonvolatile memory device, A pass transistor connected to one node of the latch to check whether a value stored in the latch is changed, a write cell for recording the change count, and a node connected between the pass transistor and the write cell and written to the write cell. A check transistor for checking the number of changes, The checking of the program operation driving count may include: In the state where the pass transistor is turned off and the check transistor is turned on, the threshold voltage of the write cell is measured to confirm the program operation driving count. A method of recording a program operation driving count of a nonvolatile memory device. The method of claim 14, After the step of checking the program operation driving count, If the number of program operation driving times of the memory cell is greater than or equal to the reference number, the processing of the corresponding block as a fail block; The method of claim 1, further comprising a program operation driving time of the nonvolatile memory device. The method of claim 19, The reference number of times, The number of program operation driving times that can guarantee the reliability of the nonvolatile memory device. A method of recording a program operation driving count of a nonvolatile memory device. The method of claim 19, After the fail block processing step, Copying data previously stored in the fail block into another block; The method of claim 1, further comprising a program operation driving time of the nonvolatile memory device.

Images