KR20100073778A

KR20100073778A - Semiconductor device and fabricating method thereof

Info

Publication number: KR20100073778A
Application number: KR1020080132536A
Authority: KR
Inventors: 김남주
Original assignee: 주식회사 동부하이텍
Priority date: 2008-12-23
Filing date: 2008-12-23
Publication date: 2010-07-01

Abstract

PURPOSE: A semiconductor device and a method for manufacturing the same are provided to prevent the generation of cross-talk between elements by forming oxide film which functions as an element isolation film from the surface of a substrate to an embedded layer. CONSTITUTION: A semiconductor substrate(100) including a trench is prepared. A silicon epi layer(140) is formed in the trench. A gate oxide layer(151) is formed on the silicon epi layer. A poly silicon layer is formed on the gate oxide layer. The poly silicon layer and the gate oxide layer are patterned to form a gate pattern(153).

Description

Semiconductor device and fabrication method

The embodiment relates to a semiconductor device and a manufacturing method thereof.

In general, in order to form semiconductor devices, such as transistors and capacitors, on a semiconductor substrate, forming a device isolation film on the substrate prevents the devices from being energized with an active region that is electrically energized and electrically connects the devices to each other. Separate isolation regions (isolation regions) to be separated by.

Recent semiconductor technologies require fine device isolation techniques to achieve high integration and low power consumption of devices, and thus, shallow trench isolation is widely used. In this step, a device isolation film is formed on the semiconductor substrate by forming a trench having a constant depth in the semiconductor substrate, depositing an oxide material on the trench, and polishing an unnecessary portion of the oxide film using a chemical mechanical polishing process or the like.

In addition, as a method for isolating the device from the outside, a junction layer is formed in which a buried layer containing n-type or p-type impurities is formed, and an n-type or p-type sinker is formed on the side thereof. Many methods are also used.

However, isolation using STI has limitations in depth and it is not easy to bury oxides. Junction isolation is simple, but the sinker needs to be formed from the surface to the buried layer, so the width is widened to the side. This is a difficult problem.

The embodiment provides a semiconductor device and a method of manufacturing the same, in which isolation between devices can be made of an oxide film while minimizing the distance between devices.

In an embodiment, a semiconductor device may include a semiconductor substrate including a trench, a silicon epitaxial layer formed in the trench, a sidewall of the trench, and an oxide layer pattern interposed between the semiconductor substrate and the silicon epitaxial layer, and the bottom of the trench. And a buried layer interposed between the semiconductor substrate and the silicon epi layer.

A method of manufacturing a semiconductor device according to an embodiment may include forming a first oxide pattern on a semiconductor substrate, forming a trench in the semiconductor substrate using the first oxide pattern as a mask, and forming a second oxide film along the inner wall of the trench. Forming a second oxide layer by anisotropically etching the second oxide layer, forming a second oxide pattern formed on the sidewalls of the trench, forming an ion implantation region by forming impurities in the trench bottom surface, and growing silicon in the trench And forming a silicon epitaxial layer and removing a first oxide film pattern formed on the semiconductor substrate.

The semiconductor device according to the embodiment may include a silicon epitaxial layer, an oxide layer pattern surrounding a side surface of the silicon epitaxial layer, and a buried layer connected to the oxide layer pattern and formed on a bottom surface of the silicon epitaxial layer.

In the semiconductor device, the device isolation layer may be formed of an oxide film from the substrate surface to the buried layer, thereby preventing crosstalk between devices.

According to the embodiment, it is possible to implement high integration and fine patterning without affecting transistor characteristics.

According to the embodiment, there is no need to form a trench of a narrow width or ion implantation deeply, there is an effect that the yield is easy because the process is easy and the application is simple.

The embodiment has the effect of reducing the chip area by isolating the element or the element and the sub-silicon substrate with a minimum area, and has an easy and simple design.

A semiconductor device and a manufacturing method according to the embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where described as being formed "on / over" of each layer, the on / over may be directly or through another layer ( indirectly) includes everything formed.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

1 to 8 are cross-sectional views illustrating a process of manufacturing a semiconductor device in accordance with an embodiment.

Referring to FIG. 1, a first oxide film is formed on a semiconductor substrate 100.

The first oxide film may be formed using a chemical vapor deposition (CVD) method.

The first oxide film may be formed to a thickness of 3000 ~ 7000Å.

A photoresist film is formed on the first oxide film, and the photoresist film is selectively exposed and developed to form a photoresist pattern. The first oxide layer is etched using the photoresist pattern as a mask to form a first oxide layer pattern 110.

The first oxide layer pattern 110 serves as a hard mask for etching the semiconductor substrate 100.

In the present embodiment, the use of an oxide film as a hard mask is exemplified, but various combinations are possible. For example, a pad oxide film and a pad nitride film may be included on the semiconductor substrate. It may also include a pad oxide film, a pad nitride film and an additional oxide film.

Thereafter, the photoresist pattern may be removed or may be used as an etch mask without a removal.

The first oxide pattern 110 opens a region in which the device is to be formed in the semiconductor substrate 100.

As shown in FIG. 2, the trench 101 is formed in the semiconductor substrate 100 using the first oxide layer pattern 110 as a mask.

The width of the trench 101 may vary depending on the type of device to be formed.

The depth of the trench 101 may be 2 ~ 5㎛.

When the device to be formed is a high voltage device, a trench may be formed with a width of 5 to 10 μm.

As illustrated in FIG. 3, the semiconductor substrate 100 on which the trench 101 is formed is oxidized to form a second oxide film 113 along the inner wall of the trench 101.

The second oxide layer 113 is formed by thermal oxidation, and may be formed to have a predetermined thickness along the sidewalls and the bottom surface of the trench 101.

The second oxide layer 113 may have a thickness of about 1000 to about 5000 microns.

In this case, the first oxide layer pattern 110 may be further thickened by further oxidation when the second oxide layer 113 is formed, but the thickness of the first oxide layer pattern may not be increased, and thus the thickness of the first oxide layer pattern 110 may be maintained. have.

As shown in FIG. 4, the second oxide film 113 is etched using anisotropic etching to selectively remove the second oxide film 113 on the bottom surface of the trench 101, and the second oxide film 113 may be removed only on the sidewalls of the trench 101. The oxide film pattern 113a remains.

In this case, the first oxide layer pattern 110 may serve as a barrier layer during anisotropic etching, and since the first oxide layer pattern 110 is thick, the second oxide layer 113 on the bottom surface of the trench 101 may be formed. During etching, the upper surface of the semiconductor substrate 100 may be prevented from being damaged.

If the photoresist pattern remains on the first oxide layer pattern 110, the first oxide layer pattern 110 may be prevented from being etched by the photoresist pattern.

As a result, the silicon substrate on the bottom surface of the trench 101 is revealed.

Subsequently, as illustrated in FIG. 5, the first implanted impurity or the second conductive impurity is implanted into the bottom surface of the trench 101 of the semiconductor substrate 100 using an ion implantation process to thereby implant the ion implantation region 120. To form.

In this case, since the first oxide pattern (or photoresist pattern remaining on the first oxide layer pattern) 110 and the second oxide layer pattern 113 serve as masks in the ion implantation process, the entire surface of the semiconductor substrate 100 may be formed. Even when the ion implantation process is performed, impurities are selectively implanted only into the silicon substrate exposed on the bottom surface of the trench 101.

The implanted impurities are for forming a buried layer later.

The criterion for selecting the first conductivity type impurity or the second conductivity type impurity may be determined according to the type and purpose of the device and sub-substrate to be formed, which is advantageous in terms of latch-up as well as isolation. Ion implantation can be performed using impurities.

Thereafter, as shown in FIG. 6, silicon is epitaxially grown in the trench 101 to form a silicon epitaxial layer 140 in the trench 101.

Next, the buried layer 130 is formed by diffusing the ion implantation region 120 formed by ion implantation through an annealing process or the like.

In this process, the first oxide layer pattern 110 may prevent silicon from growing on the upper surface of the semiconductor substrate 100.

As illustrated in FIG. 7, the first oxide layer pattern 110 formed on the semiconductor substrate 100 is removed using a planarization process such as a chemical mechanical polishing process, and the top surface of the semiconductor substrate 100 is exposed. As a result, the semiconductor substrate 100 and the silicon epitaxial layer 140 are planarized.

Accordingly, the semiconductor substrate 100 includes a silicon epitaxial layer 140 embedded in the trench 101, a second oxide layer pattern 113a interposed between the side surface of the silicon epitaxial layer 140 and the semiconductor substrate 100. The buried layer 140 is interposed between the silicon epitaxial layer 140 and the semiconductor substrate 100.

Silicon epitaxial layer 140 on which the device is to be formed is completely isolated by surrounding the oxide film or the buried layer.

As shown in FIG. 8, an element is formed in the silicon epitaxial layer 140.

The device may be an NMOS, a PMOS, a BJT, a BCD device, a capacitor, or the like.

For example, a p-type impurity is implanted into the silicon epitaxial layer 140 to form a p-type well (not shown).

A gate oxide layer 151 is formed on the silicon epitaxial layer 140 on which the p-type well is formed, a polysilicon layer is deposited on the gate oxide layer 151, and then the polysilicon layer and the gate oxide layer are patterned to form a gate. The pattern 153 is formed. A low concentration of n-type impurities is implanted into the silicon epitaxial layer 140 on the side of the gate pattern 153 to form an LDD region. A gate spacer 155 formed of an insulating layer is formed on sidewalls of the gate pattern 153, and a high concentration of n-type impurities are implanted into the silicon epitaxial layer on the side of the gate spacer 155 to form a source and drain region 157. 159 may be formed. As a result, an NMOS transistor may be formed in the silicon epitaxial layer 140.

As a result, since the embodiment of the device can be completely isolated, the device can be prevented from affecting the device by high integration, and thus, the device-to-device insulation can be easily performed.

In addition, since the planar area of the active region can be minimized, high integration of the device is possible.

While the above embodiments have been described in detail, the present invention is not limited to these embodiments, and various changes can be made without departing from the spirit thereof.

Claims

A semiconductor substrate including a trench;

A silicon epi layer formed in the trench;

An oxide pattern formed on sidewalls of the trench and interposed between the semiconductor substrate and the silicon epi layer;

And a buried layer interposed between the semiconductor substrate and the silicon epitaxial layer and formed on a bottom surface of the trench.

The method of claim 1,

A semiconductor device comprising a transistor formed on the silicon epi layer.

The method of claim 1,

The depth of the trench is a semiconductor device, characterized in that 2 ~ 5㎛.

The method of claim 1,

The oxide film pattern is a semiconductor device, characterized in that the thickness of 1000 ~ 5000 에서부터 from the side wall of the trench.

The method of claim 1,

The buried layer is a semiconductor device, characterized in that connected with the oxide film pattern.

Forming a first oxide pattern on the semiconductor substrate;

Forming a trench in the semiconductor substrate using the first oxide pattern as a mask;

Forming a second oxide film along the inner wall of the trench;

Anisotropically etching the second oxide layer to form a second oxide pattern formed on the sidewalls of the trench;

Forming an ion implantation region by forming impurities in the trench bottom surface;

Growing silicon in the trench to form a silicon epi layer; And

Removing the first oxide film pattern formed on the semiconductor substrate.

The method of claim 6,

The thickness of the first oxide film pattern is a manufacturing method of a semiconductor device, characterized in that 3000 ~ 7000Å.

The method of claim 6,

In the removing of the first oxide layer pattern,

A method of manufacturing a semiconductor device, comprising planarizing the semiconductor substrate and the silicon epilayer using a chemical mechanical polishing process.

The method of claim 6,

The second oxide film is a method of manufacturing a semiconductor device, characterized in that formed by a thermal oxidation process.

Silicon epi layer;

An oxide layer pattern surrounding a side surface of the silicon epi layer; And

And a buried layer connected to the oxide layer pattern and formed on a bottom surface of the silicon epitaxial layer.