KR20100066000A - Auxiliary power supply and user device including the same - Google Patents

Abstract

PURPOSE: An auxiliary power device and a user device including auxiliary power device are provided to automatically block power of a main power device at sudden power off of a main power device and automatically supply auxiliary power, thereby reducing an unstable situation such as power ripple or switching delay. CONSTITUTION: A super capacitor(110) stores auxiliary power. Uni-directional devices(121,122) automatically block main power by a power level of a main power device(15) at sudden power off. The uni-directional devices automatically supply auxiliary power of the super capacitor. The first power detector(131) detects the power level of the main power device. The second power detector(132) detects a power level of the super capacitor. A controller(150) performs a data backup operation.

Description

AUXILIARY POWER SUPPLY AND USER DEVICE INCLUDING THE SAME}

The present invention relates to a user device, and more particularly, to a user device including an auxiliary power supply.

User devices include electronic devices such as personal computers, digital cameras, camcorders, mobile phones, etc., as well as storage devices such as memory cards. Most of these user devices include a memory device for storing data internally. Memory devices include volatile memory such as DRAM and SRAM, and nonvolatile memory such as EEPROM, FRAM, PRAM, MRAM, and Flash Memory. Volatile memory loses its stored data when power is lost, while nonvolatile memory preserves its stored data even when power is lost.

The user device is powered from an internal or external power supply. Here, the power supply device may be a home or business power supply such as 110V, 220V, or the like, or may be an adapter or a charging device inside the user device. The user device may be fatally damaged such as data loss due to sudden power off (hereinafter referred to as sudden power off) of the power supply.

For example, flash memory-based SSD storage devices need to secure metadata or cache data, which can be lost due to sudden power off. To solve this problem, manufacturers are developing various user devices to prepare for sudden power off of the power supply.

Conventional user equipment uses a switching means at sudden power-off to cut off the power supply and provide auxiliary power. Conventional user equipment may have an unstable voltage such as power ripple immediately after power down. In addition, a conventional user device may generate an operation error due to a switching delay.

The present invention has been proposed to solve the above technical problem, and an object of the present invention is to automatically shut off main power and automatically provide auxiliary power at sudden power off (SPO) of a power supply. It is to provide an auxiliary power supply and a user device including the same.

An auxiliary power device according to an embodiment of the present invention includes a power storage device for storing auxiliary power; And a power control device for interrupting external power and providing the auxiliary power according to the power level of the external power supply when sudden power off of the external power supply.

In an embodiment, the power storage device may be a super capacitor. The power control device may include a first unidirectional device for shutting off external power according to a power level of the external power supply device; And a second unidirectional element for providing auxiliary power according to the level of the power storage device. The first and second unidirectional devices may be diodes. The power control device may further include a protection device for protecting the power storage device. The protection device may be a current limiter to reduce overcurrent flowing to the power storage device.

In another embodiment, the auxiliary power supply may include a first power detector for detecting a power level of the external power supply; A second power detector for detecting a power level of the power storage device; And a controller configured to perform a data backup operation in response to the detection result of the first power detector, and to stop the data backup operation in response to the detection result of the second power detector.

In another embodiment, the auxiliary power supply further includes one or more power detectors (hereinafter referred to as nth power detectors) for detecting a power level of the power storage device, wherein the nth power detector is a power source. Different detection level.

The auxiliary power supply further includes a detector for detecting the amount of auxiliary power of the power storage device. The controller informs the state of charge of the power storage device to the outside in response to a detection signal from the detector.

The auxiliary power supply may further include a regulator for adjusting a power level of the power storage device. The regulator may raise or lower the power level of the power storage device to a predetermined level.

A user device according to an embodiment of the present invention includes a main power supply for providing a main power source; And an auxiliary power supply for shutting off the main power and providing auxiliary power according to the power level of the main power supply when the main power supply is suddenly powered off.

In example embodiments, the auxiliary power supply may include a super capacitor for storing the auxiliary power; A first unidirectional element for shutting off main power according to a power level of the main power supply; And a second unidirectional element for providing an auxiliary power source according to the power level of the super capacitor. The auxiliary power supply further includes a current limiter for reducing the overcurrent flowing to the super capacitor.

In another embodiment, the user device may perform a data backup operation from the first memory device to the second memory device using the auxiliary power source. The auxiliary power supply includes a first power detector for detecting a power level of the main power supply; A second power detector for detecting a power level of the super capacitor; And performing a data backup operation from the first memory device to the second memory device in response to the detection result of the first power detector, and stopping the data backup operation in response to the detection result of the second power detector. It may further include a controller for.

According to the present invention, the auxiliary power supply automatically shuts off the power supply of the main power supply at the time of sudden power-off of the main power supply, and supplies the auxiliary power automatically, thereby providing a power ripple or switching delay ( You can reduce unstable conditions such as swicthing delay and safely perform backup data operations.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

1 is a block diagram illustrating a user device according to an exemplary embodiment of the present invention. Referring to FIG. 1, the user device 10 includes a data bus and a power line 11, a central processing unit (CPU) 12, a storage device 13 and 14, and a power supply device 15 and 100.

In FIG. 1, volatile memory (VM) 13 and nonvolatile memory (NVM) 14 are shown as examples of storage devices. And, as an example of the power supply device, the power supply device 15 and the auxiliary power supply device 100 are shown. In the following, the power supply 15 will be used in terms of main power supply or external power supply to distinguish it from an auxiliary power supply.

The user device 10 may be implemented as a personal computer (PC) or a portable electronic device such as a notebook computer, a mobile phone, a personal digital assistant (PDA), and a camera. The user device 10 automatically cuts off the power of the main power supply device 15 when Sudden Power Off (SPO) of the main power supply device 15 is performed, and the auxiliary power device 100 is stored in the auxiliary power supply device 100. Power can be supplied automatically.

Referring to FIG. 1, the volatile memory 13 is a storage device that may lose data when power is cut off, and includes a DRAM or an SRAM. The nonvolatile memory 14 is a storage device capable of preserving data even when power is cut off. The nonvolatile memory 14 may include EEPROM, FRAM, PRAM, MRAM, and Flash Memory. The volatile memory 13 and the nonvolatile memory 14 exchange data using the data bus and the power line 11, and receive power from the main power supply device 15 or the auxiliary power supply device 100.

In general, the nonvolatile memory 14 can retain data even when the power supply is cut off, but has a disadvantage of slow data processing speed. To compensate for this disadvantage, the user device 10 reads data stored in the nonvolatile memory 14 into the volatile memory 13 and then processes the data using the volatile memory 13. The user device 10 backs up the data processed in the volatile memory 13 to the nonvolatile memory 14.

The main power supply 15 provides a power source for the operation of the volatile memory 13 or the nonvolatile memory 14. That is, the main power supply 15 is a power supply for writing / reading / erasing operations of the volatile memory 13 and the nonvolatile memory 14, data backup operation from the volatile memory 13 to the nonvolatile memory 14, and the like. To provide.

On the other hand, the main power supply 15 may cause a sudden power off (SPO) phenomenon in which power is suddenly cut off due to an unexpected situation such as user carelessness or a device defect. If the main power supply 15 suddenly powers off, there is a risk of losing data processed by the volatile memory 13. In particular, if the data processed by the volatile memory 13 is important information such as cache data or metadata, the user device 10 may be fatally damaged due to sudden power off.

The user device 10 shown in FIG. 1 includes an auxiliary power supply 100 to reduce losses due to sudden power off of the main power supply 15. The auxiliary power supply 100 may automatically cut off power of the main power supply 15 and automatically supply auxiliary power when the main power supply 15 suddenly turns off. By using the auxiliary power supply 100, an error due to a power ripple or a switching delay that may occur immediately after a sudden power off may be reduced.

Referring to FIG. 1, the auxiliary power supply 100 includes a super capacitor 110, unidirectional elements 121 and 122, power detectors 131 and 132, a current limiter 140, and a controller 150.

The super capacitor 110 is a power storage device capable of retaining a high capacity of charge, and is used to store auxiliary power. The supercapacitor 110 provides auxiliary power to the user device 100 for a predetermined time by using the retained charge when the power supply of the main power supply device 15 is cut off. The super capacitor 110 may not only charge the electric power when the user device 100 is powered up, but may also charge the electric power during the normal operation of the main power supply 15.

Subsequently, referring to FIG. 1, the unidirectional elements 121 and 122 automatically shut off the main power according to the power level of the main power supply 15 at the time of sudden power-off, and assist the supercapacitor 110. It is a power control device for automatically supplying power. The unidirectional elements 121 and 122 are elements capable of flowing a current only in one direction, such as a diode.

The first unidirectional element 121 is connected to the main power supply device 15 through the first power line PL1 and to the controller 150 through the second power supply line PL2. The first unidirectional element 121 controls a current path from the first power line PL1 to the second power line PL2 according to the voltage difference between the first and second power lines PL1 and PL2. Form. That is, the first unidirectional element 121 forms a current path when the voltage difference between the first and second power lines PL1 and PL2 is greater than or equal to a reference voltage, and blocks the current path if less than or equal to the reference voltage.

The first unidirectional element 121 blocks the current path when the power level of the first power line PL1 falls below a predetermined voltage when the main power supply 15 suddenly turns off. The first unidirectional element 121 automatically cuts off main power according to the power level of the main power supply 15 immediately after sudden power-off, thereby reducing problems due to power ripple. The first unidirectional element 121 may be implemented through a diode.

The second unidirectional element 122 is connected between the super capacitor 110 and the second power line PL2. The second unidirectional element 122 forms a current path from the super capacitor 110 to the second power line PL2 according to the voltage difference between the super capacitor 110 and the second power line PL2. do. That is, the second unidirectional element 122 forms a current path when the voltage difference between the super capacitor 110 and the second power line PL2 is greater than or equal to a reference voltage and blocks the current path if less than or equal to a reference voltage.

When the power supply level of the second power supply line PL2 drops below a predetermined voltage when the power supply level of the second power supply device 15 suddenly turns off, the second unidirectional device 122 may supply a current path according to the power supply level of the supercapacitor 110. To form. That is, the second unidirectional device 122 may automatically provide auxiliary power according to the power level of the supercapacitor 110 at the time of sudden power-off, thereby reducing problems due to switching delay. have. The second unidirectional device 122 may be implemented through a diode.

The first power detector 131 is connected to the first power line PL1 and detects a power level of the main power supply 15. That is, the first power supply detector 131 detects whether the first power supply line PL1 falls below a predetermined level Va (see FIG. 4) when the main power supply device 15 suddenly turns off. The first power detector 131 generates the first control signal CTRL1 as a detection result. The controller 150 performs a data backup operation from the volatile memory 13 to the nonvolatile memory 14 in response to the first control signal CTRL1.

The second power detector 132 is connected to the second power line PL2 and detects a power level of the super capacitor 110. That is, the second power supply detector 132 detects whether or not the second power supply line PL2 falls below a predetermined level Vb (see FIG. 4) at the time of sudden power off. The second power detector 132 generates the second control signal CTRL2 as a detection result. The controller 150 stops the operation of the user device 10 in response to the second control signal CTRL2.

The current limiter 140 is connected between the super capacitor 110 and the second power line PL2. The current limiter 140 is a protection device for protecting the super capacitor 110. The current limiter 140 may reduce overcurrent flowing to the super capacitor 110. In addition to the current limiter 140, a voltage clamp may also be used as a protection device of the super capacitor 110. The voltage clamp may prevent damage due to overvoltage when charging the super capacitor 110.

The controller 150 is connected to the second power line PL2 and operates in response to the first and second control signals CTRL1 and CTRL2. The controller 150 provides the auxiliary power supplied by the super capacitor 110 to the volatile memory 13, the nonvolatile memory 14, or the like at the sudden power off. Meanwhile, the controller 150 performs an operation of the user device 10 such as a data backup operation in response to the first control signal CTRL1 and an operation of the user device 10 in response to the second control signal CTRL2. Stop.

FIG. 2 is a flowchart for describing an operation of the user device illustrated in FIG. 1. Hereinafter, an operation of the user device 10 at sudden power off will be described in detail with reference to FIGS. 1 and 2.

When the user device 10 is powered on (S110), the user device 10 receives power from the main power supply device 15. The user device 15 performs a normal operation under the control of the CPU 12. On the other hand, the auxiliary power supply 100 is supplied with power from the main power supply device 15 during the power-up operation or normal operation to charge the super capacitor 110 (S110).

When sudden power off occurs while using the user device 15 (S120), the user device 15 automatically cuts off the main power using the unidirectional elements 121 and 122 and automatically provides the auxiliary power.

The first power detector 131 detects a power level of the first power line PL1 and generates a first control signal CTRL1 (S130). The controller 150 performs a data backup operation from the volatile memory 13 to the nonvolatile memory 14 in response to the first control signal CTRL1 (S140).

The second power detector 132 detects a power level of the second power line PL2 and generates a second control signal CTRL2 (S150). The controller 150 stops the data backup operation or the like in response to the second control signal CTRL2 (S160). The user device 10 is set to a power down mode.

Referring back to FIG. 1, the user device 10 illustrated in FIG. 1 uses the unidirectional elements 121 and 122 to automatically shut off the main power supply 15 at the time of sudden power-off, and at the same time, the auxiliary power supply. Can be provided automatically. According to the user device 10 according to an embodiment of the present invention, it is possible to solve a problem due to power ripple or switching delay when sudden power off.

3 is a block diagram illustrating another embodiment of the auxiliary power supply shown in FIG. 1. Referring to FIG. 3, the auxiliary power supply 200 includes a super capacitor 210, unidirectional elements 221 and 222, power detectors 231 to 23n, a current limiter 240, and a controller 250. In FIG. 3, the supercapacitor 210, the unidirectional elements 221 and 222, and the current limiter 240 are the same as described with reference to FIG. 1.

In addition to the first and second power detectors 231 and 232, the auxiliary power supply 200 shown in FIG. 3 includes one or more power detectors (hereinafter, referred to as n th power detectors). The first power detector 231 detects a power supply level of the main power supply device (see Fig. 1, 15) and generates a first control signal CTRL1 as a detection result. The second to nth power detectors 232 to 23n detect the power level of the super capacitor 210 and generate the second to nth control signals CTRL2 to CTRLn as a detection result. Here, the second to nth power detectors 232 to 23n vary the power detection level.

The auxiliary power supply 200 may vary the power detection level of the second to nth power detectors 232 to 23n to change the backup range, the backup time, the backup data, or the like. Can be adjusted selectively.

For example, referring to FIG. 4, the auxiliary power supply 100 of FIG. 1 may perform a backup operation for a backup range of Va to Vb, a backup time of T1 to T2, and cache data. On the other hand, the auxiliary power supply 200 of FIG. 3 may perform a backup operation for backup ranges of Va to Vn, backup times of T1 to Tn, and cache and metadata. That is, since the auxiliary power supply 200 of FIG. 3 includes the n th power detector, it is possible to freely adjust the available backup range or time. 4 assumes the occurrence of a sudden power off (SPO) at T0.

FIG. 5 is a block diagram illustrating still another embodiment of the auxiliary power supply shown in FIG. 1. Referring to FIG. 5, the auxiliary power supply 300 includes a super capacitor 310, a charge detector 315, unidirectional elements 321 and 322, a power detector 331 and 332, a current limiter 340, and a controller ( 350). In FIG. 5, the supercapacitor 310, the unidirectional elements 321 and 322, the power detectors 331 and 332, and the current limiter 340 are the same as described with reference to FIG. 1.

The charge detector 315 measures the amount of auxiliary power of the super capacitor 310. The charge detector 315 may calculate the amount of charge stored in the super capacitor 310 by measuring the capacitance and the voltage of the super capacitor 310. The charge detector 315 provides a sense signal SNSR to the controller 350. The controller 350 notifies the user of the state of charge of the super capacitor 310 in response to the detection signal SNSR.

The user device 10 may use the charge detector 315 to check the capacitance of the super capacitor 310, and the like. The capacitance of the super capacitor 310 has a property that decreases with time.

6 is a graph exemplarily illustrating a change in capacitance with use time of the supercapacitor 310. In FIG. 6, the horizontal axis represents the use time of the super capacitor 310, and the vertical axis represents the capacitance. On the other hand, the supercapacitor 310 has a property that the change rate of the capacitance varies depending on the temperature.

Referring to FIG. 6, lines A and B show the results of predicting the capacitance change of the supercapacitor 310 at 30 ° C. and 70 ° C., respectively. According to line A, the capacitance of the supercapacitor 310 is reduced by about 10% after 20 years. According to line B, the capacitance of the supercapacitor 310 is reduced by about 15% after 10,000 hours.

On the other hand, the C line shows the result of measuring the capacitance change of the super capacitor 310 for 1000 hours at 70 ℃. Comparing the B and C lines, the measured and predicted results of capacitance change at 70 ° C are almost the same. According to line C, the capacitance of the supercapacitor 310 is reduced by about 11% after 1000 hours.

As shown in FIG. 6, the supercapacitor 310 has a property that the capacitance decreases with use time or temperature. The auxiliary power supply 300 may reduce the amount of auxiliary power or the power supply time according to the change in electric capacity.

Referring back to FIG. 5, the auxiliary power supply 300 may include a charge detector 315 to inform the outside of the state of charge of the super capacitor 310. In addition, the auxiliary power supply 300 may check the capacitance of the super capacitor 310 through the charge detector 315, thereby efficiently utilizing the auxiliary power, and predict the replacement time of the super capacitor 310.

FIG. 7 is a block diagram illustrating still another embodiment of the auxiliary power supply shown in FIG. 1. Referring to FIG. 7, the auxiliary power supply 400 includes a super capacitor 410, unidirectional elements 421 and 422, power detectors 431 and 432, a current limiter 440, a controller 450, and a voltage regulator ( 460). In FIG. 7, the supercapacitor 410, the unidirectional elements 421 and 422, the power detectors 431 and 432, and the current limiter 440 are the same as described with reference to FIG. 1.

The voltage regulator 460 is connected between the second power line PL2 and the third power line PL3. The voltage regulator 460 adjusts the power level of the super capacitor 410 at sudden power off. The voltage regulator 460 may provide a level of auxiliary power to the controller 450. The voltage regulator 460 may cut off the supply of the auxiliary power in response to the third control signal CTRL3. The third control signal CTRL3 is provided from the controller 450.

When a data backup operation is performed at a sudden power off, the auxiliary power stored in the super capacitor 410 may decrease over time. In this case, the voltage regulator 460 performs a boost function of raising the auxiliary power of the super capacitor 410 to a predetermined level. In addition, the voltage regulator 460 may perform a buck function of lowering a predetermined level when the level of the auxiliary power stored in the super capacitor 410 is high.

The voltage regulator 460 may provide a level of auxiliary power through boost and buck functions. In addition, the user device 10 may use the voltage regulator 460 to reduce the size of the supercapacitor or utilize a supercapacitor having a low capacitance.

FIG. 8 is a block diagram illustrating an example of the voltage regulator shown in FIG. 7. Referring to FIG. 8, the voltage regulator 460 includes a buck and boost circuit 461, step up circuits 462 and 463, and step down circuits 464 and 465. The voltage regulator 460 may include one or more of these circuits.

The buck and boost circuit 461 may adjust the auxiliary power supply to a predetermined level (V0). Referring to FIG. 9, when the level of the second power line PL2 is 5V, the buck and boost circuit 461 may be lowered to 3.3V through the buck operation. In addition, when the level of the second power line PL2 is 1V, the buck and boost circuit 461 may increase the voltage to 3.3V through the boost operation. Buck and boost circuit 461 provides a predetermined level (V0, 3.3V) to the controller 450 through the third power line (PL3).

 The first step-up circuit 462 raises the auxiliary power supply to the specific voltage Vu1, and the second step-up circuit 463 raises the specific voltage Vu2. The first step-down circuit 464 lowers the auxiliary power supply to the specific voltage Vd1, and the second step-down circuit 465 lowers the specific voltage Vd2. The voltage regulator 460 may provide various levels of auxiliary voltages through a step up circuit or a step down circuit.

The auxiliary power supply according to the embodiment of the present invention can be variously expanded in addition to those described above. For example, the auxiliary power supply may include some or all of the n-th power detector 23n of FIG. 3, the charge detector 315 of FIG. 5, and the voltage regulator 460 of FIG. 7.

Meanwhile, the auxiliary power supply device may be applied or applied to various products (eg, HDD, SSD, memory card, computer, portable electronic device, etc.). In FIG. 1, the nonvolatile memory 14 may also be applied to a hard disk device (HDD). That is, the auxiliary power supply may provide an auxiliary power supply for data backup from the memory device to the hard disk device.

10 is a block diagram illustrating an example in which an auxiliary power supply device is applied to a semiconductor disk device. Referring to FIG. 10, the semiconductor disk device 500 includes an SSD controller 510 and nonvolatile memories 520 ˜ 523. The SSD controller 510 includes a CPU 511, an ATA interface 512, an SRAM cache 513, a flash interface 514, and an auxiliary power supply 515.

In FIG. 10, a solid state drive (SSD) is shown as an example of the semiconductor disk device 500. SSD products, which are expected to replace hard disk drives (HDDs), are in the spotlight in the next-generation memory market. An SSD is a data storage device that uses memory chips such as flash memory to store data instead of a rotating dish used in a typical hard disk drive. SSDs have the advantage of being faster, more resistant to external shocks, and lower power consumption than mechanically moving hard disk drives.

The CPU 511 receives a command from a host (not shown) and determines and controls whether data from the host is stored in the flash memory or whether the stored data of the flash memory is read and transmitted to the host.

The ATA interface 512 exchanges data with the host side under the control of the CPU 511 described above. The ATA interface 512 patches commands and addresses from the host side and delivers the commands and addresses to the CPU 511 through the CPU bus. Data input from the host through the ATA interface 512 or data to be transmitted to the host is transmitted through the SRAM cache 513 without passing through the CPU bus under the control of the CPU 511. Here, the ATA interface 512 may be implemented as a SATA or PATA interface.

The SRAM cache 513 temporarily stores cache data (or metadata) of the host and flash memories 520 to 523. The SRAM cache 513 is also used to store a program to be operated by the central processing unit 511. The SRAM cache 513 may be regarded as a kind of buffer memory, and does not necessarily need to be configured as SRAM.

The flash interface 514 exchanges data with the nonvolatile memories 520 through 523. The flash interface 514 may be configured to support NAND flash memory, One-NAND flash memory, or multi-level flash memory. The flash interface 514 and the nonvolatile memories 520 to 523 exchange control signals CE, CLE, ALE, WE, RE, and RB and data DQ.

The auxiliary power supply 515 may be located in the SSD controller 510 or may be located outside. In FIG. 10, the auxiliary power supply 515 is located in the SSD controller 510. The auxiliary power supply 515 has the same configuration and operation principle as the previous embodiments. That is, the auxiliary power supply 515 provides an auxiliary power supply for performing a data backup operation from the SRAM cache 513 to the nonvolatile memories 520 to 523 when the main power supply is suddenly powered off.

11 is a block diagram illustrating an example in which an auxiliary power supply is applied to a semiconductor memory device. Referring to FIG. 11, the semiconductor memory device 600 includes a memory controller 610 and a flash memory 620. The semiconductor memory device 600 may include a storage device including a volatile memory or a nonvolatile memory, such as a memory card (eg, SD or MMC) or a removable removable storage device (eg, a USB memory). It includes everything.

Referring to FIG. 11, the memory controller 610 may include a central processing unit (CPU) 611, a host interface 612, a random access memory (RAM) 613, a flash interface 614, and an auxiliary power supply 615. Include. The auxiliary power supply 615 may be located in the memory controller 610 or may be located outside. The auxiliary power supply 615 has the same configuration and operation principle as the previous embodiments.

The semiconductor memory device 600 is used in connection with a host. The semiconductor memory device 600 exchanges data with the host through the host interface 612, and exchanges data with the flash memory 620 through the flash interface 614. The semiconductor memory device 600 receives internal power from a host to perform internal operations. The auxiliary power supply 615 provides auxiliary power for performing a data backup operation from the RAM 613 to the flash memory 620 when the power from the host is suddenly cut off.

12 is a block diagram illustrating an example of applying an auxiliary power supply device to a user device. The user device 700 may be implemented as a personal computer (PC) or a portable electronic device such as a notebook computer, a mobile phone, a personal digital assistant (PDA), and a camera.

Referring to FIG. 12, the user device 700 includes a bus and a power line 705, a semiconductor memory device 710, a power supply 720, an auxiliary power supply 725, a central processing unit 730, and a RAM 740. And a user interface 750. The semiconductor memory device 710 includes a flash memory 711 and a memory controller 712. The auxiliary power supply 725 provides an auxiliary power supply at the sudden power off of the power supply 720.

 It will be apparent to those skilled in the art that the structure of the present invention can be variously modified or changed without departing from the scope or spirit of the present invention. In view of the foregoing, it is intended that the present invention cover the modifications and variations of this invention provided they fall within the scope of the following claims and equivalents.

1 is a block diagram illustrating an exemplary user device according to the present invention.

FIG. 2 is a flowchart for describing an operation of the user device illustrated in FIG. 1.

3 is a block diagram illustrating another embodiment of the auxiliary power supply shown in FIG. 1.

4 is a graph and a diagram for describing a backup range, a backup time, and a backup operation for cache data of the auxiliary power supply illustrated in FIG. 3.

FIG. 5 is a block diagram illustrating still another embodiment of the auxiliary power supply shown in FIG. 1.

FIG. 6 is a graph illustrating a change in capacitance according to the use time of the supercapacitor shown in FIG. 5.

FIG. 7 is a block diagram illustrating still another embodiment of the auxiliary power supply shown in FIG. 1.

FIG. 8 is a block diagram illustrating an example of the voltage regulator shown in FIG. 7.

FIG. 9 is a diagram for describing an operation of the buck and boost circuit shown in FIG. 8.

10 is a block diagram illustrating an example in which an auxiliary power supply device is applied to a semiconductor disk device.

11 is a block diagram illustrating an example in which an auxiliary power supply is applied to a semiconductor memory device.

12 is a block diagram illustrating an example of applying an auxiliary power supply device to a user device.

Claims (25)

A power storage device for storing auxiliary power; And And a power control device for interrupting external power and providing the auxiliary power according to the power level of the external power supply when sudden power off of the external power supply. The method of claim 1, And the power storage device is a super capacitor. The method of claim 1, The power control device A first unidirectional element for automatically cutting off an external power source according to a power level of the external power supply device; And And a second unidirectional element for automatically providing auxiliary power in accordance with the level of the power storage device. The method of claim 3, wherein And the first and second unidirectional elements are diodes. The method of claim 1, And a protection device for protecting the power storage device. The method of claim 5, And the protection device is a current limiter for reducing an overcurrent flowing to the power storage device. The method of claim 1, A power detector for detecting a power level of the external power supply; And And a controller for controlling a data backup operation in response to the detection result of the power detector. The method of claim 1, A first power detector for detecting a power level of the external power supply; A second power detector for detecting a power level of the power storage device; And And a controller configured to perform a data backup operation in response to the detection result of the first power detector, and to stop the data backup operation in response to the detection result of the second power detector. The method of claim 8, And one or more power detectors (hereinafter referred to as n th power detectors) for detecting a power level of the power storage device, wherein the nth power detector is different from a power detection level of the second power detector. Auxiliary power supply. The method of claim 1, And a detector for detecting an amount of auxiliary power of the power storage device. The method of claim 10, And the controller informs the state of charge of the power storage device to the outside in response to a detection signal from the detector. The method of claim 1, And a regulator for adjusting a power level of the power storage device. 13. The method of claim 12, The regulator increases or decreases the power level of the power storage device to a predetermined level. A main power supply for providing main power; And And an auxiliary power supply for shutting off the main power and providing auxiliary power according to the power level of the main power supply when the main power supply is suddenly powered off. The method of claim 14, The auxiliary power supply A super capacitor for storing the auxiliary power; A first unidirectional element for automatically cutting off main power according to a power level of the main power supply; And And a second unidirectional element for automatically providing auxiliary power in accordance with the power level of the supercapacitor. The method of claim 15, The auxiliary power supply further comprises a current limiter for reducing the overcurrent flowing to the super capacitor. The method of claim 14, And a data backup operation from the first storage device to the second storage device using the auxiliary power source. The method of claim 17, The auxiliary power supply A first power detector for detecting a power level of the main power supply; A second power detector for detecting a power level of the super capacitor; And To perform a data backup operation from the first storage device to the second storage device in response to the detection result of the first power detector, and to stop the data backup operation in response to the detection result of the second power detector. The user device further comprising a controller. The method of claim 17, The first storage device is implemented as a memory device, and the second storage device is implemented as a hard disk device (HDD). The method of claim 17, And wherein the first storage device is a volatile memory device and the second storage device is a nonvolatile memory device. The method of claim 20, The auxiliary power supply device, the volatile memory device, and the nonvolatile memory device are implemented as a semiconductor disk device (SSD). The method of claim 20, The auxiliary power supply device, the volatile memory device, and the nonvolatile memory device are implemented as a memory card. The method of claim 20, The auxiliary power supply device, the volatile memory device, and the nonvolatile memory device are implemented as a removable removable storage device. The method of claim 17, And the main power supply, the auxiliary power supply, and the first and second storage devices are computer implemented. The method of claim 17, The main power supply device, the auxiliary power supply device, and the first and second storage devices are implemented as a portable electronic device.

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