KR20100064659A - Pattern depth measuring apparatus and measuring method of thin-film transistor for liquid crystal display device - Google Patents

Abstract

PURPOSE: A thin film transistor pattern depth measuring apparatus for LCD device and a measuring method thereof are provided to measure fast and accurately doped amorphous silicon layer of a channel part of the thin film transistor and thickness reduction quantity of an amorphous silicon layer with continuous deposition and continuous patterning process. CONSTITUTION: Using an upper optical system, light is researched in an upper side minute measurement pattern of a sample. A structure of a layer and thickness of an etched doped amorphous silicon layer or etched amorphous silicon layer are measured. Using a lower optical system, original thickness of a doped amorphous silicon layer or amorphous silicon layer is measured. Etching quantity of the doped amorphous silicon layer or amorphous silicon layer is calculated with difference between the etched doped amorphous silicon layer or etched amorphous silicon layer and the doped amorphous silicon layer or amorphous silicon layer.

Description

Pattern Depth Measuring Apparatus and Measuring Method of Thin-Film Transistor for Liquid Crystal Display Device

The present invention provides a thickness of a doped amorphous silicon layer or an etched amorphous silicon layer etched by an etching process during the production process of a thin film transistor liquid crystal display device product, which is produced through a four mask and a three mask process, which is one of the liquid crystal display device manufacturing processes. The present invention relates to a thin film transistor pattern depth measuring apparatus and a measuring method for a liquid crystal display device for measuring a change amount.

In general, in order to produce a thin film transistor using a 4 mask or 3 mask process in a liquid crystal display device manufacturing process, a semiconductor 3 layer film composed of a gate insulating film, an amorphous silicon film, and a doped amorphous silicon film and a metal film serving as a source and a drain are continuously deposited. Subsequently, a thin film transistor semiconductor is manufactured by performing a continuous patterning and etching process with one mask. Since the continuous pattern process is performed with one mask after the continuous deposition, the doped amorphous silicon film is not exposed except for the channel portion of the thin film transistor and is covered with a metal film.

Although the structure and thickness of the channel film can be measured after etching the thin film transistor semiconductor channel, since the visible light cannot penetrate the metal film at the pre-etching stage of the metal film, the thickness of the lower film cannot be measured after the source and drain metal film coating. It was difficult to measure the reduction amount of the doped amorphous silicon film or the amorphous silicon film etched by the.

If the etching amount of the amorphous silicon film is not accurately managed, it is a cause of poor operation of the thin film transistor. Therefore, it is very important to manage the thickness of the amorphous silicon film layer remaining after the etching of the amorphous silicon film.

Conventionally, the pattern depth measurement method of the etched doped amorphous silicon film or the amorphous silicon film can measure the thickness before etching and the amount etched by the thickness difference from the value measured after the manufacturing process or the actual measurement A realistic test pattern was created on the outside of the panel located at a location different from the one to be used, and the contact method was used.

In this case, since the same glass is not the same glass, accurate thickness measurement is difficult due to an error caused by the difference between the management before and after the etching and the actual measurement position.

In addition, most of the thin film transistor thickness measuring equipment can measure the structure and thickness of the thin film transistor semiconductor channel after etching, but since the visible light does not pass through the metal film after the deposition of the metal film serving as the source and drain There was a problem that the thickness before etching can not be measured by the optical system using visible light. Accordingly, the thickness measurement of the doped amorphous silicon film or the amorphous silicon film of the thin film transistor channel part is mostly performed on the upper surface due to the continuous deposition and the continuous pattern process, which are characteristic of the 4 mask process and the 3 mask process. Accordingly, the reduced thickness measurement of the doped amorphous silicon film or the amorphous silicon film can be measured using an optical system after etching, but the thickness reduction of the doped amorphous silicon film or the amorphous silicon film before etching in the same sample is impossible, so accurate thickness reduction measurement There was this impossible issue.

An object of the present invention for solving the above problems is to measure the thickness of the etched semiconductor film and the thickness of the etched semiconductor film on both sides of the substrate at the same time after the completion of the process of forming the semiconductor layer at the same time on both sides of the substrate to maintain the residual amorphous The present invention provides a thin film transistor pattern depth measuring apparatus and a measuring method for a liquid crystal display device that accurately measures the thickness of a silicon film to improve process management efficiency and productivity.

The thin film transistor pattern depth measuring method of the liquid crystal display device according to the present invention includes a gate insulating film 3, an amorphous silicon film 4, and a doped amorphous silicon film 5 on the gate electrode 2 bonded to the substrate 1. For a liquid crystal display device fabricated by a four-mask or three-mask process in which a semiconductor three-layer film and a metal film 8 serving as a source 6 and a drain 7 are successively deposited to perform continuous patterning and etching with one mask. A thin film transistor pattern depth measuring method, comprising: a) a doped amorphous silicon film (5) or an etched amorphous silicon film (4) etched by irradiating a microscopic measurement pattern on the upper surface of a sample using an upper optical system (10) Measuring the thickness of the substrate; b) measuring the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 using the lower optical system 20; c) the thickness of the etched doped amorphous silicon film (5) or etched amorphous silicon film (4) measured in step a) and the doped amorphous silicon film (5) or amorphous silicon film (4) measured in step b). Calculating an etching amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 by using the difference in the original thickness of the? Characterized in that comprises a.

In addition, in step a), the upper optical system 10 is positioned above the gate electrode 2, and in step b), the lower optical system 20 is positioned below the non-etched metal film 8. It features.

In addition, the steps a) and b) obtain the reflection spectra obtained from the light incident from the upper optical system 10 and the lower optical system 20, respectively, to form a film structure and an etched doped amorphous silicon film 5 or an etched layer. The thickness of the amorphous silicon film 4 and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 are measured, in step c) measured from the reflection spectra obtained from steps a) and b). By using the difference in the thickness value, the structure of the film and the amount of etching of the doped amorphous silicon film 5 or the amorphous silicon film 4 is characterized.

The method may further include adjusting the positions of the upper optical system 10 and the lower optical system 20 in steps a) and b).

In addition, according to the present invention, the thin film transistor pattern depth measuring apparatus for the liquid crystal display device includes a gate insulating film 3, an amorphous silicon film 4, and a doped amorphous silicon film 5 on the gate electrode 2 bonded to the substrate 1. Liquid crystal display fabricated by a four-mask or three-mask process in which a semiconductor three-layer film composed of a semiconductor layer and a metal film (8) serving as a source (6) and a drain (7) are continuously deposited to perform continuous patterning and etching with one mask. In the device thin film transistor pattern depth measuring device, the upper optical system for injecting light into the upper surface micro-measuring pattern of the sample to measure the structure of the film of the upper surface micro-measuring pattern of the sample and the thickness of the etched doped amorphous silicon film (5) 10; A lower optical system 20 for injecting light into the lower part of the sample to measure the structure of the film and the original thickness of the doped amorphous silicon film 5; The structure of the film and the etched doped amorphous silicon film 5 or the etched amorphous silicon film 4 are analyzed by analyzing the light incident from the upper optical system 10 and reflected from the lower optical system 20. An analyzer 30 which analyzes the thickness of the < RTI ID = 0.0 >) < / RTI > and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4; The difference between the thickness of the etched doped amorphous silicon film 5 or the etched amorphous silicon film 4 obtained from the analyzer 30 and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 is determined. An arithmetic unit 40 for calculating an etching amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 by using; Characterized in that comprises a.

In addition, the upper optical system 10 is positioned on the upper surface fine measurement pattern of the sample positioned on the gate electrode 2, and the lower optical system 20 is located below the unetched metal film 8 Characterized in that the lower portion of the sample.

In addition, the analyzer 30 acquires reflection spectra obtained from the light incident from the upper optical system 10 and the lower optical system 20, respectively, to form a film structure, an etched doped amorphous silicon film 5, or an etched amorphous silicon. The thickness of the film 4 and the original thickness of the doped amorphous silicon film 5 or the amorphous silicon film 4 are measured, and the calculation unit 40 is doped by using the difference in the thickness values measured from the reflection spectra respectively obtained. An etching amount of the amorphous silicon film 5 or the amorphous silicon film 4 is calculated.

In addition, the position adjusting unit 60 for adjusting the position of the upper optical system 10 and the lower optical system 20 is characterized in that it is further provided.

Due to the continuous deposition and the continuous pattern process characteristic of the 4 mask process and the 3 mask process, the thickness reduction amount of the channel-doped amorphous silicon film or the amorphous silicon film of the thin film transistor can be measured only from the top surface, thereby preventing the accurate measurement. Comparing the difference in thickness of the semiconductor three-layer film with the reduced thickness of the upper part and the lower part of the lower part, the reduction amount can be measured quickly and accurately at the same time.

Hereinafter, a thin film transistor pattern depth measuring apparatus and a measuring method for a liquid crystal display device of the present invention will be described with reference to the accompanying drawings.

1 is a view showing a schematic structure of a thin film transistor pattern depth measuring apparatus for a liquid crystal display device according to the present invention, Figure 2 is a cross-sectional view showing the state before and after etching of the thin film transistor for liquid crystal display device.

As shown, the thin film transistor pattern depth measuring apparatus for the liquid crystal display device of the present invention includes an upper optical system 10 for injecting light to measure the thickness of the etched doped amorphous silicon film; A lower optical system 20 for injecting light to measure the structure of the etched film and the original thickness of the doped amorphous silicon film; Analyze the light incident and reflected from the upper optical system 10 and the light incident and reflected from the lower optical system 20 to determine the structure of the film and the thickness of the etched amorphous silicon film or the etched amorphous silicon film and the doped amorphous silicon film. An analyzer 30 for analyzing the original thickness of the film or amorphous silicon film; Of the doped amorphous silicon film or amorphous silicon film by using the difference between the thickness of the etched doped amorphous silicon film or the etched amorphous silicon film obtained from the analyzer 30 and the original thickness of the doped amorphous silicon film or amorphous silicon film before etching. A calculator 40 for calculating an etching amount; It is made, including.

In general, a thin film transistor semiconductor is formed by continuously depositing a semiconductor three-layer film including a gate insulating film 3, an amorphous silicon film 4, and a doped amorphous silicon film 5, and a metal film 8 serving as a source and a drain. It is manufactured by a 4 mask or 3 mask process that performs a continuous patterning and etching process with a mask. After the continuous deposition of the metal film 8 (see (a) of FIG. 2), the continuous pattern process is performed with one mask, so that the doped amorphous silicon film 5 or amorphous silicon is removed except for the channel portion 9 of the thin film transistor. The film 4 is not exposed and is covered with the metal film 8 (see Fig. 2B).

FIG. 2A is a cross-sectional view showing a thin film transistor for a liquid crystal display device after continuous deposition of a metal film 8, which is not etched. The gate electrode 2 is attached to an upper portion of the substrate 1 and the gate electrode 2 is attached thereto. The gate insulating film 3, the amorphous silicon film 4, the doped amorphous silicon film 5, and the metal film 8 are sequentially deposited on the attached substrate 1. The photoresist for patterning is coated on the metal film 8.

FIG. 2B is a cross-sectional view of a thin film transistor for liquid crystal display device after etching, wherein the metal film 8 is etched to form the source 6 and the drain 7 on both sides of the gate electrode 2, and the source 6. ) And the fine channel portion 9 is formed between the drain 7 and the drain 7, and the doped amorphous silicon film 5 or the amorphous silicon film 4 is partially etched when the metal film 8 is etched. In this case, when the doped amorphous silicon film 5 remains in the microchannel part 9, the doped amorphous silicon film 5 does not remain and the amorphous silicon film 4 is partially etched. Is in good condition. In the drawing, a good state in which the doped amorphous silicon film 5 is not left and the amorphous silicon film 4 is partially etched is illustrated.

The stage 50 is mounted with a thin film transistor liquid crystal display device substrate to be measured. In this case, since the stage 50 needs to be measured at the bottom surface, the stage 50 should be configured to allow the incident light to be irradiated onto the sample.

In order to achieve the object of the present invention, an optical system for measuring the thickness of the film may be formed on the upper and lower portions of the TFT panel, and the micro pattern matching technique and the micro measurement spot for measuring the micro pattern area may be used. An optical measuring instrument composed of

Since the channel width of the thin film transistor semiconductor is narrow to a few um or less, the upper optical system 10 should be configured as a measuring spot small enough to measure the size of the thin film transistor semiconductor. Since the fine patterns of the drain metal region and the data line must be measured, they must be of small size.

In the upper optical system 10, information obtained by measuring the structure and thickness of the film inside the thin film transistor channel unit 9 may be obtained, and the micropatterns having the same structure formed at the position adjacent to the measurement position of the upper optical system 10 or at the outside of the panel and The thickness of the test pattern is measured using the lower optical system 20 to measure the structure and thickness of the film.

The upper optical system 10 is composed of a 2D CCD camera and a high magnification lens and an optical fiber capable of measuring a fine measurement pattern so as to find an accurate measurement position by pattern matching after acquiring an image of the measurement pattern.

The upper light source irradiates the incident light vertically using the focus lens inside the channel portion 9. In the upper optical system 10, the reflection spectrum of the semiconductor film of the channel portion 9 of the thin film transistor is obtained (see FIG. 2B).

The result obtained by the upper optical system 10 is a part of the film is scraped off by the etching and etching process.

The lower optical system 20 is also symmetrical in the same structure as the upper optical system 10, and the lower optical system 20 is the lower portion of the unetched metal film 8, that is, the lower portion of the source 6 or the drain 7 or Located below the adjacent non-etched metal film 8 (see (b) of FIG. 2), the reflection spectrum of the semiconductor three-layer film of the data metal line or the semiconductor three-layer film of the source and drain portions is obtained.

The structure and thickness of the film measured using the lower optical system 20 contains information on the structure and thickness of the initial deposition step that is not damaged by the pattern process, which structure is a data metal line / doped amorphous silicon film. Amorphous silicon film / gate insulating film / glass substrate.

The analyzer 30 analyzes the light incident and reflected from the upper optical system 10 and the light incident and reflected from the lower optical system 20 to etch the doped amorphous silicon film 5 or the etched structure. The thickness of the amorphous silicon film 4 and the original thickness of the doped amorphous silicon film 5 or the amorphous silicon film 4 are analyzed.

In this case, the analyzer 30 obtains a reflection spectrum obtained from the light incident from the upper optical system 10 and the lower optical system 20, respectively, to form a film structure, an etched amorphous silicon film 5 or an etched amorphous silicon. The thickness of the film 4 and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 will be measured.

The calculation unit 40 uses the difference between the thickness of the etched doped amorphous silicon film or the etched amorphous silicon film obtained from the analyzer 30 and the original thickness of the doped amorphous silicon film or the amorphous silicon film, and the doped amorphous film. The etching amount of the silicon film or the amorphous silicon film is calculated.

In this case, the calculation unit 40 is a measurement program implemented by a thickness measurement algorithm on the reflection spectra obtained by the upper and lower optical systems 10 and 20, and after measuring the structure and thickness of each film, the doped amorphous silicon film of the upper and lower parts. Alternatively, the thickness difference of the amorphous silicon film is calculated.

Thus, the present invention provides a method for producing a doped amorphous silicon film which is 1) the thickness of the deposition state prior to patterning is known, and 2) the thickness of the film after being scraped off by the process, and 3) reduced by the process from the difference between the two values. The amount of the amorphous silicon film can be measured accurately.

In addition, the position adjusting unit 60 for adjusting the position of the upper optical system 10 and the lower optical system 20 is further provided so that each reflecting spectrum obtained by the analyzer 30 has a reflecting spectrum having the same structure. desirable.

The position adjusting unit 60 is controlled by driving means to adjust the positions of the upper optical system 10 and the lower optical system 20 to find and focus a fine pattern to be measured.

The display unit 70 displays the measured images of the upper and lower parts and the calculation process, and finally displays the difference in thickness of the amorphous silicon film.

Hereinafter, a method of measuring a reduction amount of the doped amorphous silicon film or the amorphous silicon film etched by the manufacturing process of the thin film transistor liquid crystal display device panel having the above structure will be described.

3 is a flowchart illustrating a method of measuring a depth of a thin film transistor pattern for a liquid crystal display according to the present invention.

First, the absolute reflectivity of the sample is measured.

In order to measure the absolute reflectivity of the sample, the intensity of incident light is measured using Bare silicon as a reference, and the dark is measured to measure the noise level of the spectral sensor which the incident light does not reflect. After this process, you will need to measure the sample you want to measure to achieve absolute reflectivity.

From the absolute reflectivity of the sample obtained by optical interference, information about the structure and thickness of the film can be calculated.

After the absolute reflectivity measurement, the position of the upper optical system 10 and the lower optical system 20 is adjusted.

In order to form a thin film transistor semiconductor, a measurement pattern of a sample subjected to an etching process is found, and a pattern matching algorithm is used to match the center of the pattern to be measured to the center of the measurement spot.

The upper optical system 10 positioned above the metal film is irradiated onto the microscopic measurement pattern of the upper surface of the sample to measure the structure of the film and the thickness of the etched doped amorphous silicon film or amorphous silicon film.

Here, the thin film transistor panel is mounted on the vibration-free stage 50, and the upper light source irradiates incident light vertically using a focus lens inside the microchannel part 9.

The interference light reflected from the fine pattern inside the channel part is analyzed to store information analyzing the film structure and the thickness of the fine pattern of the channel part 9.

After the measurement by the upper optical system 10, the original thickness of the doped amorphous silicon film or the amorphous silicon film is measured by using the lower optical system 20 positioned below the non-etched metal film 8. In this case, the measurement by the lower optical system 20 may be performed simultaneously with the measurement by the upper optical system 10.

In the lower part of the source and drain patterns and the data metal line formed by the four-mask or three-mask process, the semiconductor three-layer film is present as it is. When viewed from the rear side of the glass substrate, the structure of the film is opposite to that observed with the upper optical system 10. The structure has a thickness at the time of deposition.

In the same principle as the above method, the semiconductor film under the data line connected to the source and the drain can be measured by using the lower optical system 20 positioned below the substrate. In this case, the structure of the film is symmetrical with the upper part. to be.

By analyzing the reflection spectrum obtained by the above method, it is possible to calculate the structure and thickness of the semiconductor three-layer film measured from the bottom.

As such, the structure of the film and the etch amount of the doped amorphous silicon film or the amorphous silicon film are calculated by comparing the reflection spectrum measured by the upper optical system 10 and the reflectance spectrum measured by the lower optical system 20.

The structure of the semiconductor film in the channel portion 9 obtained by the upper optical system 10 by the above method is, for example, generally a structure of a doped amorphous silicon film / amorphous silicon film / gate insulating film / gate electrode / glass substrate. However, since the amorphous silicon film layer doped by the etching process is removed, it is actually the structure of some etched amorphous silicon film / gate insulating film / gate electrode / glass substrate.

The structure of the film measured by using the lower optical system 20 located below the substrate has a structure of an amorphous silicon film, an amorphous silicon film, a gate insulating film, and a glass substrate doped under the source and drain metals. The structure and thickness of the initial state of the deposition which are not etched are maintained.

Thus, the thickness of the silicon nitride film used as the gate insulating film is almost the same when the thickness difference between the film structure and thickness information obtained by analyzing the reflection spectrum measured by the lower optical system 20 is compared with the result measured by the upper optical system 10. The thickness of the semiconductor layer may vary. That is, if the thickness of the amorphous silicon film measured after etching by the etching process is subtracted from the sum of the thicknesses of the doped amorphous silicon film, which is the initial deposition layer measured by the lower optical system 20, and the amorphous silicon film, which is the semiconductor layer, is etched from the top. The etching amount of the amorphous silicon film can be accurately calculated by the etching process.

In order to know the etched amount of the doped amorphous silicon film that is the ohmic contact layer in the conventional four-mask or three-mask process, the process is performed after measuring the initial thickness of the semiconductor three-layer film before depositing the metal source and drain films. Proceed. After the process, the thickness of the semiconductor channel portion formed by the etching process was measured, and the change amount of the amorphous silicon film was observed using the difference.

The above method is a method of calculating the difference between the initial thickness information and the thickness after etching after the production process, even if the same substrate, or a test pattern that is similar to the outside of the panel but not similar to the actual thin film transistor semiconductor pattern. The method of making contact and measuring by contact has errors. Such an error may cause a large amount of defects when the performance and defects of the liquid crystal display panel occur, which may cause a large decrease in production yield.

The present invention measures the thickness of the doped amorphous silicon film or the amorphous silicon film which is changed by the process because the thickness of the film is measured at the same substrate and adjacent to the actual pattern at the same time to accurately measure the performance and productivity of the thin film transistor liquid crystal display device. The invention is about a measuring method that can be greatly improved.

Although the preferred embodiments of the present invention have been described above, those skilled in the art may variously modify and change the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. .

1 is a view showing a schematic structure of a thin film transistor pattern depth measuring device for a liquid crystal display device according to the present invention.

2 is a cross-sectional view showing states before and after etching of a thin film transistor for a liquid crystal display device;

3 is a flowchart illustrating a method of measuring a depth of a thin film transistor pattern for a liquid crystal display according to the present invention.

* Description of the symbols for the main parts of the drawings *

10: upper optical system 20: lower optical system

30: analyzer 40: calculator

50: stage 60: position adjusting unit

70: display unit

Claims (8)

A semiconductor three-layer film, a source 6 and a drain 7 composed of a gate insulating film 3, an amorphous silicon film 4, and a doped amorphous silicon film 5 on the gate electrode 2 bonded to the substrate 1. In the thin film transistor pattern depth measuring method for a liquid crystal display device manufactured by successive deposition of a metal film (8) which plays a role and by a continuous patterning and etching process with one mask, a) irradiating the upper microscopic measurement pattern of the sample using the upper optical system 10 to measure the structure of the film and the thickness of the etched doped amorphous silicon film 5 or etched amorphous silicon film 4; b) measuring the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 using the lower optical system 20; c) the thickness of the etched doped amorphous silicon film (5) or etched amorphous silicon film (4) measured in step a) and the doped amorphous silicon film (5) or amorphous silicon film (4) measured in step b). Calculating an etching amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 by using the difference in the original thickness of? Thin film transistor pattern depth measurement method for a liquid crystal display device comprising a. The method of claim 1, In the step a), the upper optical system 10 is positioned above the gate electrode 2, The method of measuring a depth of a thin film transistor pattern for a liquid crystal display device, characterized in that in the step b), the lower optical system (20) is located below the non-etched metal film (8). The method according to claim 1 or 2, Steps a) and b) obtain the reflection spectra obtained from the light incident from the upper optical system 10 and the lower optical system 20, respectively, to form a film structure and an etched doped amorphous silicon film 5 or etched amorphous silicon. Measuring the thickness of the film 4 and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4, In the step c), the etch amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 is calculated using the difference in the thickness values measured from the reflection spectra obtained in the steps a) and b). A thin film transistor pattern depth measuring method for a liquid crystal display device, characterized in that. The method of claim 3, wherein And a) adjusting the positions of the upper optical system (10) and the lower optical system (20) in the steps a) and b), respectively. A semiconductor three-layer film, a source 6 and a drain 7 composed of a gate insulating film 3, an amorphous silicon film 4, and a doped amorphous silicon film 5 on the gate electrode 2 bonded to the substrate 1. In the thin film transistor pattern depth measuring apparatus for a liquid crystal display device manufactured by continuous deposition of a metal film (8), which plays a role, and a continuous patterning and etching process with one mask, An upper optical system 10 for injecting light into the upper microscopic measurement pattern of the sample to measure the structure of the film of the upper microscopic measurement pattern of the sample and the thickness of the etched doped amorphous silicon film 5 or the amorphous silicon film 4; A lower optical system 20 for injecting light into the lower portion of the sample to measure the structure of the film and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4; The structure of the film and the etched doped amorphous silicon film 5 or the etched amorphous silicon film 4 are analyzed by analyzing the light incident from the upper optical system 10 and reflected from the lower optical system 20. An analyzer 30 which analyzes the thickness of the < RTI ID = 0.0 >) < / RTI > and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4; The difference between the thickness of the etched doped amorphous silicon film 5 or the etched amorphous silicon film 4 obtained from the analyzer 30 and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4 is determined. An arithmetic unit 40 for calculating an etching amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 by using; Thin film transistor pattern depth measuring apparatus for a liquid crystal display device comprising a. The method of claim 5, The upper optical system 10 is positioned on the upper surface fine measurement pattern of the sample located on the gate electrode 2, The lower optical system (20) is a thin film transistor pattern depth measuring device for a liquid crystal display device, characterized in that located on the lower portion of the sample located below the non-etched metal film (8). The method according to claim 5 or 6, The analyzer 30 acquires reflection spectra obtained from the light incident from the upper optical system 10 and the lower optical system 20 to form a film structure, an etched doped amorphous silicon film 5 or an etched amorphous silicon film ( The thickness of 4) and the original thickness of the doped amorphous silicon film 5 or amorphous silicon film 4, The operation unit 40 calculates an etching amount of the doped amorphous silicon film 5 or the amorphous silicon film 4 by using the difference in the thickness values measured from the obtained reflection spectra, respectively. Transistor pattern depth measuring device. The method of claim 7, wherein Thin film transistor pattern depth measuring apparatus for a liquid crystal display device, characterized in that the position adjusting unit 60 for adjusting the position of the upper optical system 10 and the lower optical system 20 is further provided.

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