KR20100038564A - Method and system for permanent computing using non-volatile random access memory - Google Patents

Abstract

PURPOSE: A permanent computing method using a non-volatile random access memory and a system thereof are provided to give permanence to a program. CONSTITUTION: A non-volatile RAM(Random Access Memory)(120) does not lose stored even though a power is disconnected, enables a byte unit based address access, and stores register and state values while executing a program. When a power is resupplied after disconnection, a processor(110) calls up the register and state values and restores the current state into a state before the power disconnection. A power disconnection detection unit detects an event of which supplied power is lower than a critical value. When sensing the event, the non-volatile RAM stores the register and state values.

Description

Persistent Computing Method and System Using Nonvolatile RAM {METHOD AND SYSTEM FOR PERMANENT COMPUTING USING NON-VOLATILE RANDOM ACCESS MEMORY}

Embodiments of the present invention are directed to a method and system for providing a persistent computing environment regardless of physical interference.

Flash memory is a non-volatile memory that retains stored data even when power is not supplied. The flash memory is capable of electrically erasing and rewriting all or part of a chip. to provide.

Flash memories may be classified into various types such as NAND and NOR according to the structure of an array of memory cells. The memory cell is the smallest unit that can store one bit of data.

NAND flash memory is rapidly attracting attention in the memory market as a device to replace the existing hard disk because of the high integration and large capacity. NAND flash memory is widely used as a storage medium for portable mobile devices such as mobile phones, digital cameras, MP3 players, camcorders, and PDAs.

However, the time for reading and writing data in the flash memory is longer than that for static random access memory (SRAM) or dynamic random access memory (DRAM). Also, the time for erasing data stored in the flash memory and the time for storing data in the flash memory are longer than the time for reading the data stored in the flash memory.

Compared to such flash memory, non-volatile random access memory (NVRAM), which is recently nonvolatile and byte addressable, and reads and writes data, is similar to that of conventional SRAM or DRAM. The area of use has been expanded.

According to an embodiment of the present invention, there is provided system software that provides persistence for a program by executing the program on a nonvolatile RAM.

According to an embodiment of the present invention, by executing the program on the nonvolatile RAM, the program can be completely restored to the last time point before powering off without the overhead of execution time, thereby providing persistent computing.

Computing system according to an embodiment of the present invention, the processor for performing the program, and the stored data does not lose even if the power is cut off, the address is accessible by byte unit, the value and the periphery of the register generated during the program execution It may include a nonvolatile RAM that stores the state value of the device. The processor may call the value of the register and the state value stored in the nonvolatile RAM when the power is supplied again and restore the state before the power is turned off.

Computing method according to an embodiment of the present invention non-volatile RAM to the value of the register and the peripheral device that occurs while the program is running-the non-volatile RAM does not lose the stored data even if the power is off, address in bytes Accessible; detecting an event that is resupplyed after the power is cut off; recalling the value of the register and the state value stored in the non-volatile RAM when the event is detected; and Restoring a state before the power is cut based on the value of the called register and the state value.

In case of sudden power failure in a system configured only with volatile RAM, the program's data and state could not be preserved, causing significant loss.

According to an embodiment of the present invention, since the nonvolatile RAM is used as all or part of the memory, and the data and state of the program to be executed permanently are preserved in the nonvolatile RAM, the register information and the simple recovery procedure are completely eliminated without any significant cost. Recovery allows for persistent computing, providing users with reliability, stability and convenience.

According to an embodiment of the present invention, since all information for operating a program is stored in the nonvolatile RAM, restoring only the register state value puts the state before power down, so that the user can use the system very quickly without initializing or booting the system. Provide convenience.

According to an embodiment of the present invention, when critical system software for operating a system such as an operating system is executed on a nonvolatile RAM, the time to stop and restart the system is very short, such as several seconds to restore the register value. This overhead does not occur even when the power is turned off and then used again when the power is not used. Therefore, according to an embodiment of the present invention can save energy.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited or limited by the embodiments. Like reference numerals in the drawings denote like elements.

1 illustrates a computing system 100 in accordance with one embodiment of the present invention.

Computing system 100 includes a processor 110, a nonvolatile RAM 120, and an auxiliary power supply 130.

Since the nonvolatile RAM 120 may access an address in units of bytes, the nonvolatile RAM 120 may be accessed using a physical address that matches a logical address recognized by the processor 110. Accordingly, the processor 110 may recognize the nonvolatile RAM 120 using a logical address space recognized by the processor 110 without address translation. Due to the characteristics of the nonvolatile RAM 120, a program may be performed on the nonvolatile RAM 120.

Nonvolatile RAM 120 has the characteristics of nonvolatile and random access. Examples of such nonvolatile RAM 120 are known as ferroelectric RAM (FRAM), magnetoresistive RAM (MRAM), phase-change RAM (PRAM), etc., but the present invention is not limited thereto.

The nonvolatile RAM 120 may permanently preserve stored data even when power is cut off. When the power is cut off while the program is being executed, the processor 110 may change the state value of the register 111 (memory included in the processor 110), which is volatile data, and the state value of peripheral devices (not shown). May be transferred to RAM 120 and stored. When the power is supplied again, the processor 110 may restore the state value stored in the nonvolatile RAM 120 to the register 111 and the device. At this point, the program is the same as if it were run again before the power was shut down, allowing for persistent computing.

Computing system 100 is completely restored to its previous state even when the power is suddenly cut off, so that the program can be safely executed without losing data.

The computing system 100 of FIG. 1 is an embodiment in which the nonvolatile RAM 120 corresponds to the entire memory area without including the volatile RAM. This embodiment consumes less power and may therefore be more suitable for embedded systems.

An operation value is stored in a register 111 inside the processor 110 during program execution. The register 111 is a volatile memory that loses stored data when power is cut off. The nonvolatile RAM 120 stores program data and state information, and the processor 110 accesses the nonvolatile RAM 120 using an address.

Capacitor 131 and voltage monitor / dump manager 132 operate to allow processor 110 to store the contents of volatile register 111 in nonvolatile RAM 120. The voltage monitor / dump manager 132 considers the computing system 100 to be powered off when the voltage drops below the reference value and controls the processor 110 to preview the contents of the register 111 in advance of the nonvolatile RAM 120. Move to the designated area and save. As a result, the value stored in the nonvolatile RAM 120 may be preserved even after the power is cut off. Capacitor 131 maintains the power supply voltage of computing system 100 for the time it takes for voltage monitor / dump manager 132 or processor 110 to securely store the contents of register 111 in nonvolatile RAM 120. It is an apparatus for doing this. The voltage monitor / dump manager 132 may be implemented in software as well as hardware.

In an environment in which the nonvolatile RAM 120 corresponds to the entire memory area as shown in the embodiment of FIG. 1, all programs executed in the computing system 100 may be executed on the nonvolatile RAM 120. Storing the contents of register 111 in nonvolatile RAM 120 ensures persistence for all programs.

2 is a diagram illustrating a computing system 200 according to another embodiment of the present invention.

Computing system 200 includes a processor 210, a nonvolatile RAM 220, an auxiliary power supply 230, and a volatile RAM 240.

In the embodiment of FIG. 2, the memory area is implemented by the nonvolatile RAM 220 and the volatile RAM 240, and the address space recognized by the processor 210 corresponds to the nonvolatile RAM 220 and the volatile RAM 240. do. In general applications such as personal computers and server systems, the volatile RAM 240 and the nonvolatile RAM 220 may be used interchangeably.

The program executed by the processor 210 may be executed on the volatile RAM 240 or the nonvolatile RAM 220. The processor 210 may store the contents stored in the register 211 in the volatile RAM 240 or the nonvolatile RAM 220 as necessary. Since the volatile RAM 240 may lose stored data when the power is cut off, the processor 210 may set a data retention instruction or a persistence instruction, and if the data retention instruction or a persistence instruction is declared, the contents stored in the register 211. Can be stored in the nonvolatile RAM 220 to achieve durability.

In the embodiment of FIG. 2, the processor 210 may declare a special instruction for storing, in the nonvolatile RAM 220, contents necessary for restoring a program among contents stored in the register 211 or the volatile RAM 240. In this specification, such a special command will be referred to as a data preservation command or a persistence command.

The auxiliary power supply 230 includes a capacitor 231 and a voltage monitor / dump manager 232. The capacitor 231 maintains the power supply voltage of the computing system 200 when an event in which power is cut off is detected. The voltage monitor / dump manager 232 monitors the supply voltage and may generate data retention commands or persistence commands as needed.

3 is an operational flow diagram illustrating an example of a computing method performed in the computing system 100 of FIG. 1.

The computing system 100 performs a program on the nonvolatile RAM 120 (S310). The program may be created and executed on nonvolatile RAM 120. At this time, the computing system 100 operates stably.

When the voltage monitor / dump manager 132 detects a power cut (S320), the voltage monitor / dump manager 132 drives the dump manager part (S330). In this case, since the program is executed on the nonvolatile RAM 120, the computing system 100 may store program state information in the nonvolatile RAM 120 at a high cost. Capacitor 131 may maintain the power supply voltage of computing system 100 while the state value of register 111 is stored in nonvolatile RAM 120. The dump manager stores the contents of the register 111 at a predetermined address on the nonvolatile RAM 120.

In this case, all the information about the program to be executed may be safely stored in the nonvolatile RAM 120 and stored permanently. Power to computing system 100 is shut off when the charge in capacitor 131 is exhausted or when the dump manager explicitly issues a shutdown command.

When the voltage monitor detects power resupply (S340), the computing system 100 calls information stored at a predetermined address on the nonvolatile RAM 120 to the register 111 (S350). The information called at this time may include the value of the register 111 and the state value.

The computing system 100 restores the state of the computing system 100 before the power is cut off based on the called value (S360).

4 is a flowchart illustrating an example of a computing method performed in the computing system 200 of FIG. 2.

The computing system 200 executes a program on the volatile RAM 240 (S410).

When the preservation command or the persistence command of the processor 210 is received (S420), the computing system 210 searches for a program for which the persistence is designated (S430).

The preservation instructions may be implemented using instructions such as, but not limited to, system calls, and may be generated by the voltage monitor / dump manager 232 as well as the processor 210.

In operation S430, the computing system 200 searches for a program having a designated persistence, and obtains an address of the volatile RAM 240 in which data and state information corresponding to the retrieved program are stored.

The computing system 200 may read data and state information corresponding to the program from the obtained address of the volatile RAM 240. The computing system 200 or the dump manager 232 may store the read data and state information in the nonvolatile RAM 220 according to a data preservation command.

Preservation commands can be implemented in a number of ways, but can also be implemented in a form similar to conventional fork system calls. Since the program designated as the persistence maintenance target is stored on the nonvolatile RAM 220, the persistence may be maintained even when the power is cut off.

The computing system 200 executes a program designated as a persistence target on the nonvolatile RAM 220 (S440).

At this time, if a power off event is detected by the voltage monitor 232, the program may be maintained through a process similar to the steps S320 to S360 of FIG. 3. At this time, if necessary, the value of the register 211 may be stored in the nonvolatile RAM 220.

If the computing system 200 determines that there is no need to maintain persistence for the program, the computing system 200 may issue an unconservation command for the program.

When the preservation release command is received (S450), the computing system 200 may execute the program on the volatile RAM 240. In this case, the computing system 200 may store data and state information of the program stored in the nonvolatile RAM 220 in the volatile RAM 240. Alternatively, the computing system 200 may store data and state information of the program in the nonvolatile RAM 220 and indicate that persistence is released in a data structure for program management.

Method according to an embodiment of the present invention is implemented in the form of program instructions that can be executed by various computer means may be recorded on a computer readable medium. The computer readable medium may include program instructions, data files, data structures, etc. alone or in combination. Program instructions recorded on the media may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well-known and available to those having skill in the computer software arts. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROMs, DVDs, and magnetic disks, such as floppy disks. Magneto-optical media, and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, flash memory, and the like. Examples of program instructions include not only machine code generated by a compiler, but also high-level language code that can be executed by a computer using an interpreter or the like. The hardware device described above may be configured to operate as one or more software modules to perform the operations of the present invention, and vice versa.

As described above, the present invention has been described by way of limited embodiments and drawings, but the present invention is not limited to the above embodiments, and those skilled in the art to which the present invention pertains various modifications and variations from such descriptions. This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below but also by the equivalents of the claims.

1 illustrates a computing system 100 in accordance with one embodiment of the present invention.

2 is a diagram illustrating a computing system 200 according to another embodiment of the present invention.

3 is an operational flow diagram illustrating an example of a computing method performed in the computing system 100 of FIG. 1.

4 is a flowchart illustrating an example of a computing method performed in the computing system 200 of FIG. 2.

<Explanation of symbols for the main parts of the drawings>

110: processor

120: nonvolatile RAM

130: auxiliary power

Claims (12)

A processor for executing a program; And Non-volatile RAM that does not lose the stored data even when the power is cut, access address by byte, and store the register value and the status value of peripheral device that occur while the program is running Including, And the processor recalls the value of the register and the state value stored in the nonvolatile RAM when the power is supplied again after the power is cut off, and restores the state before the power is cut off. The method of claim 1, A power cutoff detection unit for detecting an event in which the power supply voltage of the power supply is smaller than a threshold value More, The nonvolatile RAM is And store the value of the register and the state value when the event is detected. The method of claim 2, Auxiliary power source that maintains the voltage of the power source for a reference time when the event is detected More, And the non-volatile RAM stores the value of the register and the state value during the reference time. The method of claim 1, The processor performs a preservation instruction, And the nonvolatile RAM stores a value of the register and the state value according to the preservation command. The method of claim 4, wherein The processor is Computing system that explicitly or implicitly performs the preservation instructions. The method of claim 4, wherein Volatile memory that loses stored data when power is interrupted More, And the nonvolatile RAM stores data stored in the volatile memory according to the preservation command. Storing a value of a register and a value of a peripheral device generated while a program is executed in a nonvolatile RAM, in which the stored data does not lose data even when the power is cut off and the address is accessible in bytes; Detecting an event of resupply after the power is cut off; Invoking a value of the register and a state value stored in the nonvolatile RAM when the event is detected; And Restoring a state before the power is cut based on the value of the called register and the state value; Computing method comprising a. The method of claim 7, wherein Detecting a power off event in which the supply voltage of the power supply is less than a threshold; More, Storing the value of the register and the value of the peripheral device in the nonvolatile RAM And storing the value of the register and the value of the peripheral device in the nonvolatile RAM when the power down event is detected. The method of claim 8, Maintaining a voltage of the power source for a reference time when the power-off event is detected; More, Storing the value of the register and the value of the peripheral device in the nonvolatile RAM And storing the value of the register and the value of the peripheral device in the nonvolatile RAM during the reference time. The method of claim 7, wherein Storing the value of the register and the value of the peripheral device in the nonvolatile RAM And storing a value of the register and a value of the peripheral device in the nonvolatile RAM in response to a preservation command of a processor. The method of claim 10, Storing data stored in the volatile memory in the nonvolatile RAM in response to the preservation command, wherein the volatile memory loses stored data when the power is cut off. Computing method further comprising. A computer-readable recording medium in which a program for executing the method of any one of claims 7 to 11 is recorded.

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