KR20100030814A

KR20100030814A - Cmos image sensor and method for fabricating of the same

Info

Publication number: KR20100030814A
Application number: KR1020080089713A
Authority: KR
Inventors: 황상일
Original assignee: 주식회사 동부하이텍
Priority date: 2008-09-11
Filing date: 2008-09-11
Publication date: 2010-03-19

Abstract

PURPOSE: A CMOS image sensor and a manufacturing method thereof are provided to improve photosensitivity by forming a channel with a low surface resistance by increasing the surface of the channel. CONSTITUTION: A channel region with an uneven shape is formed on a semiconductor substrate(102). A gate electrode(112) is formed by interposing a gate insulation layer(114) on the semiconductor substrate. A gate spacer(118) is formed on both sidewalls of the gate electrode. An interlayer dielectric layer(132) is formed on the semiconductor substrate to cover the gate electrode including a gate spacer.

Description

CMOS Image sensor and Method for Fabrication of the same

The present invention relates to a CMOS image sensor, and more particularly, to a CMOS image sensor and a manufacturing method thereof that can improve the charge transfer efficiency by improving the dark characteristics.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and includes an optical sensing part that senses light and a logic circuit part that processes the sensed light into an electrical signal to make data. Complementary Metal Oxide Semiconductor (CMOS) image sensors use CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits to form MOS transistors corresponding to the number of unit pixels on a semiconductor substrate. Is a device employing a switching method for sequentially detecting the output of each unit pixel.

That is, the CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel.

1 is a circuit diagram illustrating a unit pixel of a conventional CMOS image sensor, and FIG. 2 is a plan view of a field region and a transfer gate laid out in a conventional CMOS image sensor.

As shown in FIG. 1, the unit pixel is composed of one photodiode PD and four NMOS transistors Tx, Rx, Dx, and Sx, which are optical sensing means, and four NMOS transistors are focused on the photodiode. A transfer transistor (Tx) for transporting photocharges to the floating node (F), a reset transistor (Rx) for discharging and resetting charges stored in the floating node, and acts as a source follower buffer amplifier. A drive transistor (Dx) and a select transistor (Sx) serving as a switching and addressing (Sx). In addition, capacitances Cf and Cp exist in the floating node and the photodiode, respectively, and a load transistor is formed outside the unit pixel to read an output signal.

Here, the transfer transistor and the reset transistor are formed of a native NMOS transistor without forming a P well to have a low threshold voltage, and boron (B) is used to improve the dark characteristics of the image sensor while securing breakdown voltage and leakage current characteristics. The N channel stop ion implantation is used to form an N channel stop layer around the field region.

However, in the conventional CMOS image sensor, as shown in FIG. 2, when an N-channel stop layer (NCST) 110 is formed around the field region 100, the transfer transistor is formed by lateral diffusion of B ions. W has an effective transistor width W 'reduced by 2ΔW, thereby degrading the charge transfer efficiency and performance of the transfer transistor, thereby causing a problem of deteriorating the light sensitivity characteristic of the image sensor.

Accordingly, in order to solve the above problems, the present invention relates to a CMOS image sensor, and in particular to provide a CMOS image sensor and a manufacturing method thereof that can improve the charge transfer efficiency by improving the dark characteristics There is this.

According to an embodiment of the present disclosure, a CMOS image sensor may include a semiconductor substrate having a channel region having an uneven shape, a gate electrode formed on the semiconductor substrate via a gate insulating layer, gate spacers formed on both sidewalls of the gate electrode, And an interlayer insulating layer formed on the entire surface of the semiconductor substrate to cover the gate electrode including the gate spacer.

A method of manufacturing a CMOS image sensor according to the present invention includes: forming an oxide film by performing a nitriding process on a semiconductor substrate; Leaving an oxide film through etching using a photoresist pattern only in a channel region of the semiconductor substrate; Forming a concave-convex shape by performing a wet etching process on the oxide film; And patterning the uneven oxide film and the semiconductor substrate through dry etching to form the unevenness only in the channel region of the semiconductor substrate.

As described above, in the CMOS image sensor according to the present invention, the channel region is formed in an uneven shape, thereby increasing the surface area of the channel, thereby reducing the channel resistance, and thus having a channel having a low sheet resistance. As a result, the dark characteristics may be improved, thereby improving charge transfer efficiency and performance of the transfer transistor and thus having excellent light sensitivity characteristics.

Hereinafter, a CMOS image sensor and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view showing a CMOS image sensor according to the present invention.

As shown in FIG. 3, the CMOS image sensor according to the present invention has a P ++ type semiconductor substrate 102 having a concave-convex surface on the channel region, and a gate on the semiconductor substrate 102 for the transfer transistor Tx. The gate electrode 112 formed through the insulating film 114, the gate oxide film 116 and the gate spacer 118 formed on both sidewalls of the gate electrode 112, and the semiconductor substrate 102 of the photodiode region PD. N + formed on the surface of the semiconductor substrate 102 adjacent to the side of the gate spacer 118 spaced apart from the n-type diffusion region 122 formed by a predetermined distance with the n-type diffusion region 122 and the gate electrode 112 interposed therebetween. And an interlayer insulating layer 132 formed on the entire surface of the semiconductor substrate 102 so as to cover the gate region 112 including the source region 126 doped with the gate spacer 118.

Hereinafter, a method of manufacturing the CMOS image sensor according to the present invention will be described in detail with reference to the accompanying drawings.

4A to 4E are cross-sectional views illustrating a method of manufacturing the CMOS image sensor according to the present invention.

First, as shown in FIG. 4A, an oxide film 104 having a predetermined thickness is formed by performing a nitriding process on the high concentration P ++ type semiconductor substrate 102. Subsequently, the first photoresist pattern 106a exposing the surface of the semiconductor substrate 102 other than the channel region is formed on the channel region, and patterning is performed to leave the oxide film 104 only in the channel region.

Here, the nitriding process is preferably performed by N 2 plasma using a heat treatment or a CDE apparatus in an NH 3 or N 2 atmosphere. In addition, the nitriding process is preferably performed in 1 ~ 1E3 Pascal, 100 ~ 2000W, 1 ~ 2000N2, 1 ~ 300sec.

Subsequently, as shown in FIG. 4B, ashing and cleaning are performed to remove the first photoresist pattern 106a. In addition, the oxide layer 104 remaining only in the channel region is formed in a concave-convex shape through wet etching. Here, the wet etching is preferably performed at 150 to 200 ° C. with H 3 PO 4.

Thereafter, as shown in FIG. 4C, after forming the second photoresist pattern 106b exposing only the channel region, the uneven oxide layer 104 and the semiconductor substrate 102 are patterned by dry etching.

Here, the dry etching is preferably performed under the conditions of 10 ~ 200 Pascal, 10 ~ 2000W, 10 ~ 500 O2 gas, 10 ~ 500 CF4 gas, 10 ~ 200 N2 gas.

Next, as shown in FIG. 4D, when the second photoresist pattern 106b is removed by ashing and cleaning, irregularities are formed only in the channel region of the semiconductor substrate 102.

Then, as shown in FIG. 4E, the gate insulating film 114 and the gate electrode 112 are formed on the semiconductor substrate 102. Thereafter, an n-type diffusion region 122 is formed on the semiconductor substrate 102 of the photodiode region PD.

Subsequently, after the gate oxide film is deposited on the entire surface of the semiconductor substrate 102 on which the gate electrode 112 is formed, the gate oxide film 116 is formed by patterning using a photolithography process and a dry etching process. Here, the gate oxide film 116 formed on the gate electrode 112 is removed by a dry etching process to expose the top surface of the gate electrode 112. Thereafter, an insulating film is formed on the gate electrode 112 including the gate oxide film 116, and then an etch back process is performed to form gate spacers 118 on both sidewalls of the gate electrode 112.

Next, a high concentration of n + type impurity ions are implanted into the surface of the semiconductor substrate 102 adjacent to the side of the gate spacer 118 spaced apart from each other with the n-type diffusion region 122 and the gate electrode 112 interposed therebetween. 126, a drain region not shown is formed.

Thereafter, an interlayer insulating film 132 is formed on the entire surface of the semiconductor substrate 102 including the gate electrode 112 and the gate spacer 118.

As described above, in the present invention, since the channel region is formed in the uneven form, the surface area of the channel is increased to reduce the channel resistance, thereby allowing the channel resistance to be low. As a result, the dark characteristics may be improved, thereby improving charge transfer efficiency and performance of the transfer transistor and thus having excellent light sensitivity characteristics.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a circuit diagram showing a unit pixel of a conventional CMOS image sensor.

2 is a plan view in which a field region and a transfer transistor are laid out in a conventional CMOS image sensor.

102 semiconductor substrate 114 gate insulating film

116: gate oxide film 118: gate spacer

122: n-type diffusion region 126: source region

132: interlayer insulating film

Claims

A semiconductor substrate formed so that the channel region has an uneven shape,

A gate electrode formed on the semiconductor substrate via a gate insulating film;

Gate spacers formed on both sidewalls of the gate electrode;

And an interlayer insulating film formed on the entire surface of the semiconductor substrate to cover the gate electrode including the gate spacer.

The method of claim 1,

And a gate oxide layer formed between both sidewalls of the gate electrode and the gate spacer.

The method of claim 1,

An n-type diffusion region formed in the photodiode region PD of the semiconductor substrate;

And an n + doped source region formed on a surface of the semiconductor substrate adjacent to the gate spacer side and spaced apart from the n-type diffusion region with the gate electrode therebetween.

Forming an oxide film by performing a nitriding process on the semiconductor substrate;

Leaving an oxide film through etching using a photoresist pattern only in a channel region of the semiconductor substrate;

Forming a concave-convex shape by performing a wet etching process on the oxide film;

And patterning the uneven oxide film and the semiconductor substrate through dry etching to form the unevenness only in the channel region of the semiconductor substrate.

The method of claim 4, wherein

After the irregularities are formed only in the channel region of the semiconductor substrate,

Forming a gate insulating film and a gate electrode on the semiconductor substrate;

Forming an n-type diffusion region on the photodiode region of the semiconductor substrate;

Forming gate oxide films and gate spacers on both sidewalls of the gate electrode;

Forming a source region by implanting high concentration n + type impurity ions into a surface of the semiconductor substrate adjacent to a side of the gate spacer spaced apart from the n-type diffusion region with a gate electrode interposed therebetween;

And forming an interlayer insulating film on the entire surface of the semiconductor substrate.

The method of claim 4, wherein

The nitriding process is a method of manufacturing a CMOS image sensor, characterized in that the heat treatment in the atmosphere NH3 or N2.

The method of claim 4, wherein

The nitriding process is a method of manufacturing a CMOS image sensor, characterized in that carried out with N2 plasma using a CDE device.

The method according to claim 6 or 7,

The nitriding process is a manufacturing method of the CMOS image sensor, characterized in that performed in 1 ~ 1E3 Pascal, 100 ~ 2000W, 1 ~ 2000N2, 1 ~ 300sec.

The method of claim 4, wherein

The wet etching is a method of manufacturing a CMOS image sensor, characterized in that carried out at 150 ~ 200 ℃ with H3PO4.

The method of claim 4, wherein

The dry etching method of the CMOS image sensor, characterized in that performed by 10 ~ 200 Pascal, 10 ~ 2000W, 10 ~ 500 O2 gas, 10 ~ 500 CF4 gas, 10 ~ 200 N2 gas.