KR20100030792A - Image sensor and manufacturing method of image sensor - Google Patents

Abstract

PURPOSE: An image sensor and a method for manufacturing the same are provided to improve a dark noise property of a photo diode by minimizing a parasitic current on an interface of a device isolation layer and a depletion area. CONSTITUTION: A first device isolation layer(140), a readout circuit, and an electric junction area(130) connected to the readout circuit are formed on a first substrate(100). A first interlayer insulation layer(200) including a first contact plug connected to the electric junction area is formed on the first substrate. A second ion implantation layer is connected to a first contact plug. A first ion implantation layer is formed on the second ion implantation layer. An image sensor is comprised of a third ion implantation layer. A second substrate includes the first and second ion implantation layers and the image sensor.

Description

Image sensor and manufacturing method of image sensor

Embodiments relate to an image sensor and a method for manufacturing the image sensor.

An image sensor is a semiconductor device that converts an optical image into an electrical signal, and is divided into a charge coupled device (CCD) and a CMOS image sensor (CIS). do.

In the prior art, a photodiode is formed on a substrate by ion implantation. However, as the size of the photodiode gradually decreases for the purpose of increasing the number of pixels without increasing the chip size, the image quality decreases due to the reduction of the area of the light receiver.

In addition, a method of increasing the electron generation rate by increasing the capacitance of the photodiode has been considered, but there is a limit to extending the depletion region of the photodiode to increase the capacitance, and is formed by a back end process of the photodiode. The light opening ratio is lowered by the structure.

One alternative to overcome this is to deposit photodiodes with amorphous Si, or read-out circuitry using wafer-to-wafer bonding such as silicon substrates. And a photodiode on another substrate on the lead-out circuit (referred to as "three-dimensional image sensor", "PD-up CIS") have been tried.

This structure is achieved by sequentially forming n + regions, p− regions, and p0 regions in the photodiode region of the other substrate defined as the device isolation film.

According to such a structure, the photo-opening ratio can be improved, and as the depletion region (p- region) of the photodiode is extended, a large value of capacitance can be realized to obtain a high electron generation rate.

However, when the depletion region (p-- region) forms a wide interface with the device isolation layer made of SiO ₂ , parasitic currents are generated in large quantities, and photodiodes are dark noise due to parasitic current characteristics. There is a problem in that the sensitivity is reduced to light sensitivity.

The embodiment relates to a three-dimensional image sensor having a vertical structure, which minimizes the parasitic current generated at the interface between the depletion region of the photodiode and the device isolation layer, and improves the electron generation rate by extending the depletion region of the photodiode. And a method for manufacturing the image sensor.

In another embodiment, an image sensor includes: a first substrate having a first device isolation layer, a readout circuit, and an electrical junction region connected to the readout circuit; A first interlayer insulating film including a first contact plug connected to the electrical bonding region and formed on the first substrate; And a second ion implantation layer connected to the first contact plug and a first ion implantation layer formed on the second ion implantation layer. An image sensing unit including a third ion implantation layer formed on a portion of an upper surface and a side surface of the first ion implantation layer, and a second substrate formed on the first interlayer insulating film.

In another embodiment, a method of manufacturing an image sensor includes forming a first device isolation layer and a readout circuit on a first substrate; Forming an electrical junction region connected to the lead-out circuit on the first substrate; Forming a first interlayer insulating film on the first substrate, the first interlayer insulating film including a first contact plug connected to the electrical bonding region; And a second ion implantation layer connected to the first contact plug and a first ion implantation layer formed on the second ion implantation layer. And forming a second substrate including an image sensing unit formed of a third ion implantation layer formed on a portion of an upper surface and a side surface of the first ion implantation layer.

According to the embodiment, the following effects are obtained.

First, the electron generation rate can be improved by extending the depletion region of the photodiode having a vertical structure to realize a large value of capacitance.

Second, even if the depletion region of the photodiode is expanded, the parasitic current generated at the interface between the depletion region and the device isolation layer can be minimized, thereby improving the dark noise characteristic of the photodiode.

Third, in forming the ion implantation region in the depletion region of the photodiode in order to suppress the generation of parasitic current at the interface with the device isolation film, it is possible to sufficiently activate the boron ions due to the hydrogen ion implantation. Therefore, the additional high temperature heat treatment process can be omitted and the application to the existing process is easy.

Fourth, due to the diffusion effect of the boron ions can form a P-type region having an appropriate concentration in the photodiode, maximize the electron generation rate without the influence of parasitic current, and can improve the light sensitivity of the image sensor .

With reference to the accompanying drawings, it will be described in detail with respect to the image sensor and the manufacturing method of the image sensor according to the embodiment.

Hereinafter, in describing the embodiments, since it is determined that the detailed description of related known functions or configurations may unnecessarily obscure the subject matter of the present invention, only the essential components directly related to the technical spirit of the present invention will be referred to. do.

In the description of an embodiment according to the present invention, each layer (film), region, pattern or structure may be "on" or "under" the substrate, each layer (film), region, pad or pattern. "On" and "under" include both "directly" or "indirectly" formed through another layer, as described in do. In addition, the criteria for the above / above or below of each layer will be described with reference to the drawings.

The present invention is not limited to the CMOS image sensor, and is applicable to an image sensor requiring a photodiode.

Hereinafter, the doping symbols used in describing the embodiments are shown in the following table.

Doping symbol n ++ / p ++ n + / p + n0 / p0 n- / p- n-/ p-- Doping Level (Number / cm ³ ) 1 over ¹⁹ 1 ¹⁹ 1 ¹⁸ 1 ¹⁷ 1 less than ¹⁷

1 is a side sectional view showing the structure of an image sensor according to a first embodiment.

Referring to FIG. 1, the image sensor according to the first exemplary embodiment may include a gate electrode 122, a gate insulating layer 124, a floating diffusion layer 110, an electrical junction region 130, and a first device isolation layer 140. A first interlayer insulating film 200 having a first substrate 100, a first contact plug 210, a second ion implantation layer 310a and a second ion implantation layer 310a formed on the first interlayer insulating film 200. ) A first ion implantation layer 320a formed on the substrate, a third ion implantation layer 320b formed on the first ion implantation layer 320a, a second interlayer insulating layer 400a, and a second contact plug 500. It is done by

The first ion implantation layer 320a, the second ion implantation layer 310a, and the third ion implantation layer 320b are formed on a second substrate (see FIG. 2) 300, which is an active silicon substrate, to detect an image. Make Wealth

The second substrate 300 is bonded to the first interlayer insulating layer 200 to form a shape as shown in FIG. 1.

Hereinafter, the first ion implantation layer 320a, the second ion implantation layer 310a, and the third ion implantation layer 320b may be referred to as an "image sensing unit" in some cases.

The image sensing unit may be a photodiode, but is not limited thereto, and may be a photogate, a combination of a photodiode and a photogate, and the like.

In addition, the embodiment, but the image sensing unit is formed on the crystalline semiconductor substrate, but is not limited to this includes those formed on the amorphous semiconductor substrate.

Hereinafter, a method of manufacturing the image sensor according to the first embodiment will be described with reference to FIGS. 1 to 4.

First, referring to FIG. 1, a first device isolation layer 140 is formed on a first conductive type first substrate 100 to define an active region, and a readout circuit is formed on the active region.

A p-type silicon substrate may be used as the first conductive type first substrate 100.

For example, the readout circuit may include a transfer (Tx) transistor, a reset (Rx) transistor, a drive (Dx) transistor, and a select (Sx) transistor.

In the embodiment, only the transfer transistor region in the readout circuit is described as an example.

A gate insulating layer 124 and a gate electrode 122 for a transfer transistor are sequentially formed in a lead-out circuit area of the first substrate 100, and a gate electrode (not shown) and a gate electrode 122 of a reset transistor are sequentially formed. Floating Diffusion (FD) layer 110 is formed in the region of the first substrate 100 between the layers.

In this step, a source / drain region (not shown) of each transistor may be formed, and a noise removing circuit (not shown) may be added to improve the sensitivity of the image sensor.

Subsequently, the electrical junction region 130 is formed in the region of the first substrate 100 between the gate electrode 122 and the first device isolation layer 140.

The electrical junction region 130 generates a potential difference between the source and the drain of the gate electrode 122 and enables dumping of the photo charge to increase the sensitivity of the output image. Increase

For example, the electrical junction region 130 may be formed by doping with an intermediate concentration of n-type impurity ions n0.

When the electrical bonding region 130 is formed, a first interlayer insulating layer 200 is formed on the first substrate 100, and a via hole process and a metal filling process are performed to form the electrical bonding region 130 and the first substrate. A first contact plug 210 for electrically connecting the upper structure of the interlayer insulating film 200 is formed.

In FIG. 1, only the first interlayer insulating layer 200 and the first contact plug 210 of a single layer structure are illustrated, but it may have a plurality of stacked structures.

Next, the image sensing unit is formed using a first conductive type second substrate.

2 is a side sectional view showing the structure of the second substrate 300 according to the first embodiment.

The second substrate 300 may be an active silicon substrate in a wafer state, and injects first impurity ions into the second substrate 300 to form a first ion implantation layer 320. The second substrate 300 may be a p-type substrate, and the first impurity ions may be implanted with high energy as a low concentration of p-type impurity ions (p--).

Subsequently, second impurity ions are implanted into the second substrate 300 to form a second ion implantation layer 310. The second impurity ions may be implanted with low energy as a high concentration of n-type impurity ions (n +).

Since the ion implantation energy is differentiated, the first ion implantation layer 320 may have a depth deeper than that of the second ion implantation layer 310.

The first ion implantation layer 320 and the second ion implantation layer 310 form an image sensing unit.

Thereafter, a heat treatment process such as rapid thermal processing (RTP) is performed to electrically activate the first ion implantation layer 320 and the second ion implantation layer 310.

After the heat treatment process is performed, a third impurity ion is implanted into an upper region of the second substrate 300 under the first ion implantation layer 320 to form a PD cleavage 332 of the image sensing unit. The remaining portion 330 of the second substrate 300 under the first ion implantation layer 320 is separated using a blade or the like based on the divided region 332.

Hydrogen ions may be used as the third impurity ions.

In addition, the first impurity ions, the second impurity ions, and the third impurity ions may be ion implanted onto the entire surface of the second substrate 300 in a blanket manner without a mask.

Subsequently, the second substrate 300 having the bottom portion removed is inverted to be coupled to the first interlayer insulating layer 200 on the first substrate 100.

As a result, the image sensing unit may form an image sensor having a vertical three-dimensional structure positioned above the readout circuit. Therefore, according to the embodiment, it is possible to increase the fill factor of the image sensing unit and to prevent a phenomenon in which the light opening ratio is lowered by the structure formed by the back end process of the photodiode.

3 is a side cross-sectional view illustrating a form in which the first substrate 100 and the second substrate 300 are coupled according to the first embodiment.

The second ion implanted layer 310 is in contact with the first contact plug 210, and is activated by plasma activation before the first substrate 100 and the second substrate 300 are bonded to each other, thereby bonding the surface. By increasing the surface energy of the bonding of the two substrates (100, 300) can proceed. In addition, in order to improve bonding strength of the two substrates 100 and 300, bonding may be performed by interposing an insulating layer and a metal layer at a bonding interface.

After the first substrate 100 and the second substrate 300 are combined, an oxide film and a nitride film (not shown) are sequentially deposited on the first ion implantation layer 320 to define a second device isolation film. A photoresist pattern is formed.

Subsequently, the oxide layer and the nitride layer are etched to expose a region where the second device isolation layer is to be formed by performing a first etching process using the photoresist pattern as an etching mask.

4 is a side cross-sectional view illustrating a form after the third ion implantation layer 320b is formed on the second substrate 300 according to the first embodiment.

Subsequently, a trench in which the second device isolation layer is to be formed by processing a second etching process of the first ion implantation layer 320 and the second ion implantation layer 310 using the etched oxide and nitride layers as an etching mask. To form 400.

As a result, as illustrated in FIG. 4, the first ion implantation layer 320a and the second ion implantation layer 310a having the shape of a rhombic image sensing unit are formed.

When the trench 400 is formed, the photoresist pattern, the oxide layer, and the nitride layer are removed.

Thereafter, a fourth impurity ion and a fifth impurity ion are doped together on the side surface of the first ion implantation layer 320a and the upper surface of the first ion implantation layer 320a exposed through the sidewalls of the trench 400.

As the fourth impurity ion and the fifth impurity ion are doped, a third ion implantation layer 320b having a predetermined thickness may be formed on a portion of the upper surface and the side surface of the first ion implantation layer 320a.

In example embodiments, the fourth impurity ion and the fifth impurity ion may be implanted into a p-type impurity ion p0 having a concentration between the first impurity ion and the second impurity ion.

In addition, the fourth impurity ion may be boron ion, and the fifth impurity ion may be hydrogen ion.

Referring to FIG. 1, an inner region of a dotted display region is a depletion region, and a depletion region is expanded, and an interface with a second device isolation layer to be formed in the trench is separated by the third ion implantation layer 320b. As a result, the capacitance for increasing the electron generation rate may be increased, and parasitic currents generated on the interface may be removed.

In this way, the generation of the parasitic current is suppressed, thereby preventing the occurrence of the dark noise phenomenon.

In addition, since the boron ions and the hydrogen ions are injected together, the electrical activation of the boron ions is naturally performed by the hydrogen ions. Therefore, a separate high temperature heat treatment process for the activation of the boron ions is not required, and a phenomenon in which an influence on the semiconductor structure formed in the front-end process can be prevented.

For reference, the third ion implantation layer 320b may be formed at a low temperature of 450 ° C. or less.

In addition, the hydrogen ions cause diffusion of boron ions, so that the third ion implantation layer 320b may have an optimal concentration and thickness between the depletion region of the image sensing unit and the second device isolation layer. Make sure

Referring to FIG. 1, the trench 400 is buried to form an insulating layer on the first interlayer insulating film 200 including the third ion implantation layer 320b, and the surface of the insulating layer is formed. Planarization is performed through a polishing process such as chemical mechanical polishing (CMP).

The insulating layer embedded in the trench functions as a second device isolation layer, and the insulating layer formed on the third ion implantation layer functions as a second interlayer insulating film 400a.

In addition, the insulating layer may be made of a transparent material such as oxide so as not to block light incident to the third ion implantation layer.

Finally, a via hole process and a metal filling process are performed to form a second contact plug 500 connected to the third ion implantation layer 320b on the second interlayer insulating film 400a.

Hereinafter, the image sensor according to the second embodiment will be described.

5 is a side cross-sectional view showing the structure of a second substrate 800 according to the second embodiment, and FIG. 6 is a side cross-sectional view showing the structure of an image sensor according to the second embodiment.

Referring to FIG. 6, the image sensor according to the second exemplary embodiment may include a gate electrode 622, a gate insulating layer 624, a floating diffusion layer 610, an electrical junction region 630, and a first device isolation layer 640. A first interlayer insulating film 700 having a first substrate 600, a first contact plug 710, a second ion implantation layer 810a and a second ion implantation layer 810a formed on the first interlayer insulating film 700. ) A first ion implantation layer 820a formed on the substrate, a third ion implantation layer 820b formed on the first ion implantation layer 820a, a second interlayer insulating film 900, and a second contact plug 910. It is done by

The first ion implantation layer 820a, the second ion implantation layer 810a, and the third ion implantation layer 820b are formed on the second substrate 800, which is an active silicon substrate, and form an image sensing unit.

Since the structure from the first substrate 600 to the first interlayer insulating film 700 according to the second embodiment is similar to that of the first embodiment described above, repeated description thereof will be omitted.

Referring to FIG. 5, a first ion implantation layer 820 is formed by implanting first impurity ions into the second substrate 800. The second substrate 800 is a P-type substrate, and the first impurity ions may be implanted with high energy as a low concentration of n-type impurity ions (n--).

Subsequently, a second ion implantation layer 810 is formed by implanting second impurity ions into the second substrate 300. The second impurity ions may be implanted with low energy as a high concentration of n-type impurity ions (n +).

Since the ion implantation energy is differentiated, the first ion implantation layer 820 may have a depth deeper than that of the second ion implantation layer 810.

The first ion implantation layer 820 and the second ion implantation layer 810 form an image sensing unit.

Thereafter, a heat treatment process such as rapid thermal processing (RTP) is performed to electrically activate the first ion implantation layer 320 and the second ion implantation layer 310.

After the heat treatment process is performed, a third impurity ion is implanted into an upper region of the second substrate 800 under the first ion implantation layer 820 to form a PD cleavage 832 of the image sensing unit. The remaining portion of the second substrate 800 under the first ion implantation layer 820 is separated using a blade or the like based on the divided region 332.

Hydrogen ions may be used as the third impurity ions.

In addition, the first impurity ions, the second impurity ions, and the third impurity ions may be ion implanted onto the entire surface of the second substrate 800 in a blanket manner without a mask.

Next, the second substrate 800, from which the bottom portion is removed, is turned over and bonded to the first interlayer insulating film 700 on the first substrate 600.

Subsequently, forming a trench for the second device isolation layer is performed in the same manner as in the first embodiment, and when the first ion implantation layer 820a and the second ion implantation layer 810a are formed in a rhombus shape, the trench is formed. The third ion implantation layer 820b is formed.

The process of forming the third ion implantation layer 820b, the process of forming the second interlayer insulating film 900, and the process of forming the second contact plug 910 according to the second embodiment are the same as those of the first embodiment. Similar descriptions will be omitted.

The present invention has been described above with reference to the preferred embodiments, which are merely examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains do not depart from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not possible that are not illustrated above. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 is a side sectional view showing the structure of an image sensor according to a first embodiment;

Fig. 2 is a side sectional view showing the structure of a second substrate according to the first embodiment.

3 is a side cross-sectional view illustrating a form in which a first substrate and a second substrate are coupled according to the first embodiment.

4 is a side cross-sectional view showing a form after a third ion implantation layer is formed on the second substrate according to the first embodiment;

Fig. 5 is a side sectional view showing the structure of a second substrate according to the second embodiment.

6 is a side sectional view showing the structure of an image sensor according to a second embodiment;

Claims (19)

Forming a first device isolation layer and a readout circuit on the first substrate; Forming an electrical junction region connected to the lead-out circuit on the first substrate; Forming a first interlayer insulating film on the first substrate, the first interlayer insulating film including a first contact plug connected to the electrical bonding region; And A second ion implantation layer connected to the first contact plug and a first ion implantation layer formed on the second ion implantation layer; And forming a second substrate including an image sensing unit including a third ion implantation layer formed on a portion of an upper surface and a side surface of the first ion implantation layer, on the first interlayer insulating film. The method of claim 1, wherein forming the readout circuit is performed. Forming a gate insulating film of at least one of a transfer transistor, a reset transistor, a drive transistor, and a select transistor; Forming a gate electrode on the gate insulating film; And A method of manufacturing an image sensor comprising the step of forming a source region and a drain region. The method of claim 1, wherein at least one of the first substrate and the second substrate is It is a p-type silicon substrate, The manufacturing method of the image sensor characterized by the above-mentioned. The method of claim 1, wherein the first contact plug and the first interlayer insulating film A manufacturing method of an image sensor comprising a plurality of laminated structures. The method of claim 1, wherein the forming of the second substrate is performed. Implanting first impurity ions from an upper side of the second substrate to form the first ion implantation layer; Implanting second impurity ions from an upper side of the second substrate to form a second ion implantation layer having a depth smaller than that of the first ion implantation layer; The second substrate is turned over and bonded to the first interlayer insulating film; A portion of the first ion implantation layer and the second ion implantation layer is etched to form a trench defining a second device isolation layer region; And implanting fourth impurity ions and fifth impurity ions into side and top surfaces of the first ion implantation layer to form the third ion implantation layer. The method of claim 5, wherein the second substrate is coupled to the first interlayer dielectric layer. Implanting third impurity ions into the second substrate below the first ion implantation layer to form a partition region; And And removing the second substrate of the bottom portion not implanted with impurity ions based on the partition region. The method of claim 6, wherein the third impurity ion A method of manufacturing an image sensor comprising hydrogen ions. The method of claim 5, The first impurity ion, the fourth impurity ion, and the fifth impurity ion are p-type impurity ions, the second impurity ion is n-type impurity ion, and the electrical junction region is doped with n-type impurity ion, The first impurity ion has a lower doping concentration than the electrical junction region, the second impurity ion has a higher doping concentration than the electrical junction region, and the fourth impurity ion and the fifth impurity ion are the electrical junction region. And a doping concentration of the same level as that of the manufacturing method of the image sensor. The method of claim 5, The fourth impurity ion and the fifth impurity ion are p-type impurity ions, the first impurity ion and the second impurity ion are n-type impurity ions, and the electrical junction region is doped with n-type impurity ions, The first impurity ion has a lower doping concentration than the electrical junction region, the second impurity ion has a higher doping concentration than the electrical junction region, and the fourth impurity ion and the fifth impurity ion are the electrical junction region. And a doping concentration of the same level as that of the manufacturing method of the image sensor. The method of claim 5, And the fourth impurity ion includes boron ions, and the fifth impurity ion includes hydrogen ions. The method of claim 5, Forming a second interlayer insulating film on the third ion implantation layer by filling the trench; And forming a second contact plug connected to the third ion implantation layer on the second interlayer insulating layer. A first substrate having a first device isolation layer, a lead-out circuit, and an electrical junction region connected to the lead-out circuit; A first interlayer insulating film including a first contact plug connected to the electrical bonding region and formed on the first substrate; And A second ion implantation layer connected to the first contact plug and a first ion implantation layer formed on the second ion implantation layer; And an image sensing unit including a third ion implantation layer formed on a portion of an upper surface and a side surface of the first ion implantation layer, and including a second substrate formed on the first interlayer insulating layer. The method of claim 12, wherein at least one of the first substrate and the second substrate is An image sensor, characterized in that the p-type silicon substrate. The method of claim 12, wherein the first contact plug and the first interlayer insulating film An image sensor comprising a plurality of laminated structures. The method of claim 12, P-type impurity ions are doped in the first ion implantation layer and the third ion implantation layer, and n-type impurity ions are doped in the second ion implantation layer and the electrical junction region, The first ion implantation layer has a lower doping concentration than the electrical junction region, the second ion implantation layer has a higher doping concentration than the electrical junction region, and the third ion implantation layer has the same level as the electrical junction region. Image sensor, characterized in that having a doping concentration of. The method of claim 12, The third ion implantation layer is doped with p-type impurity ions, the first ion implantation layer, the second ion implantation layer, and the electrical junction region is doped with n-type impurity ions, The first ion implantation layer has a lower doping concentration than the electrical junction region, the second ion implantation layer has a higher doping concentration than the electrical junction region, and the third ion implantation layer has the same level as the electrical junction region. Image sensor, characterized in that having a doping concentration of. The method of claim 12, wherein the third ion implantation layer And at least two p-type impurity ions are doped together. The method of claim 12, wherein the third ion implantation layer An image sensor characterized in that the boron ions and hydrogen ions are doped together. The method of claim 12, A second interlayer insulating film formed on the second substrate by filling trenches formed on both sides of the third ion implantation layer; And And a second contact plug connected to the third ion implantation layer and formed on the second interlayer insulating layer.

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