KR20100027443A - Semiconductor device, and method of fabricating thereof - Google Patents

Semiconductor device, and method of fabricating thereof Download PDF

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Publication number
KR20100027443A
KR20100027443A KR1020080086369A KR20080086369A KR20100027443A KR 20100027443 A KR20100027443 A KR 20100027443A KR 1020080086369 A KR1020080086369 A KR 1020080086369A KR 20080086369 A KR20080086369 A KR 20080086369A KR 20100027443 A KR20100027443 A KR 20100027443A
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South Korea
Prior art keywords
insulating film
metal wiring
plasma
deposited
precursor
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KR1020080086369A
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Korean (ko)
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여상학
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주식회사 동부하이텍
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Priority to KR1020080086369A priority Critical patent/KR20100027443A/en
Publication of KR20100027443A publication Critical patent/KR20100027443A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for forming a low dielectric thin film having a low dielectric constant between metal wirings, and a method of manufacturing the same. The present invention relates to a lower metal wiring, a first insulating film on the lower metal wiring, A semiconductor device comprising a second density insulating film different from the first insulating film on the first insulating film, an upper metal wiring on the second insulating film, and a method of manufacturing the same.

Description

Semiconductor device and method of manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor technology, and more particularly, to a semiconductor device for forming a low dielectric film having a low dielectric constant between metal wirings, and a manufacturing method thereof.

In general, in the semiconductor device manufacturing process, the unit devices constituting the integrated circuit are manufactured as semiconductor devices by repeatedly performing processes such as photographing, diffusion, etching, and deposition on a semiconductor wafer.

Among these processes, a thin film is deposited to activate and stabilize an impurity such as boron or phosphorus in order to grow a wafer oxide film or to have electrical characteristics.

The thin film deposition process is a process of forming or depositing a thin film having a predetermined thickness on a wafer. The thin film deposition process is classified into physical vapor deposition and chemical vapor deposition (CVD) according to the thin film deposition method. In this case, chemical vapor deposition (CVD) is widely used in recent years as a method of decomposing a gaseous compound and depositing a thin film of a predetermined thickness on a wafer by a chemical reaction.

Such chemical vapor deposition (CVD) is performed by AP CVD (Atmospheric Pressure Chemical Vapor Deposition) where chemical vapor deposition is performed at atmospheric pressure according to the conditions under which chemical reactions occur in order to deposit a thin film, and LP CVD (chemical vapor deposition) is performed at low pressure. Low Pressure Chemical Vapor Deposition) and PE CVD (Plasma Enhanced Chemical Vapor Deposition) or HDP CVD (High Density Plasma Chemical Vapor Deposition) where chemical vapor deposition is performed by plasma at low pressure.

The CVD technique in which the chemical vapor deposition is performed by the above-mentioned plasma promotes excitation and / or dissociation of reactive gas by applying high frequency (RF) energy in the reaction region, thereby generating a highly reactive species plasma.

The high reactivity of the free species reduces the energy required for chemical reactions to occur, thus lowering the temperature required for such PE CVD processes. The introduction of such devices and methods has significantly reduced the size of the structure of semiconductor devices.

Also, recently, an interlayer insulating film used for metal wiring has a low dielectric constant (k ≦ 2.4) to reduce resistance-current signal delay of a multilayer metal film used in an integrated circuit of an ultra high density (ULSI) semiconductor device. Research to form is actively performed.

1 illustrates a metal wiring and an interlayer insulating film structure as a conventional general semiconductor device structure.

As shown in FIG. 1, an interlayer insulating film is formed of a material having a low dielectric constant between the lower metal wiring and the upper metal wiring.

The low dielectric constant thin film may be formed of an inorganic material such as a silicon oxide film (SiO 2 ) doped with fluorine (F) and an amorphous carbon (aC: F) film doped with fluorine, or may be formed of an organic material. A polymer thin film having a relatively low dielectric constant and excellent thermal stability is mainly used as an organic material.

Silicon dioxide (SiO 2 ) or silicon oxyfluoride (SiOF), which has been mainly used as an interlayer insulating film, has high capacitance or long resistance-current delay time (RC) when fabricating ultra-high density circuits of 0.5 μm or less. problems such as delay time). For this reason, researches are being actively conducted to replace it with a low dielectric material having a new low dielectric constant. However, no specific solution has yet been proposed.

Low dielectric materials that are currently considered as alternatives to silicon oxide (SiO 2 ) include organic polymers such as benzocyclobutene (BCB), SiLK, FLARE, and polyimide, which are mainly used for spin coating. Black diamond, coral, SiOF, alkyl-silane and parylene and xerogel or aerogel used for chemical vapor deposition (CVD); There is the same porous thin film material. Here, most polymer thin films are formed by a method of spin casting in which a polymer is chemically synthesized, spin coated on a substrate, and then cured.

The low-dielectric material formed by the spin casting is formed of a dielectric having a low dielectric constant because the thin film density is reduced because pores of several nanometers (nm) size are formed in the film.

In general, organic polymers deposited by spin coating generally have advantages of low dielectric constant and excellent planarization, but they are not suitable in terms of application due to poor thermal stability due to a lower heat limit temperature of less than 450 ° C. In addition, since the pores formed in the film are large in size and are not uniformly distributed in the film, there are various difficulties in manufacturing the device. In addition, the adhesion to the upper and lower metal wiring material is poor, high stress due to thermal curing peculiar to the organic polymer thin film, the dielectric constant is changed due to the adsorption of the ambient moisture, such as the reliability of the device is poor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device for depositing a low dielectric thin film having a lower dielectric constant and a method of manufacturing the same.

It is still another object of the present invention to provide a semiconductor device suitable for improving the dielectric constant of an insulating thin film deposited using plasma and a method of manufacturing the same.

Features of the semiconductor device according to the present invention for achieving the above object, the lower metal wiring; A first insulating film on the lower metal wiring; A second insulating film having a different density from the first insulating film on the first insulating film; And an upper metal wiring on the second insulating film.

Preferably, the first insulating film and the second insulating film may be formed of the same precursor using plasma, and the second insulating film may have a higher density than the first insulating film.

Features of the semiconductor device manufacturing method according to the present invention for achieving the above object, forming a lower metal wiring; Depositing a first insulating film on the lower metal wiring using plasma; Depositing a second insulating film on the first insulating film at a density different from that of the first insulating film using plasma; And forming an upper metal wiring on the second insulating film.

Preferably, the first insulating film and the second insulating film may be deposited using the same precursor, and in particular, a TEOS precursor (Tetra Etchyl Ortro Silicate Precursor).

Preferably, the first insulating film and the second insulating film may be deposited by plasma treatment at a pressure equal to room temperature, and the second insulating film may be deposited by plasma treatment at a higher power than when the first insulating film is formed. .

Preferably, the first insulating film and the second insulating film may be deposited in the same chamber.

Preferably, the second insulating film may be deposited at a higher density than the first insulating film.

According to the present invention, since an insulating film, which is a dielectric thin film between metal lines, is formed by a two-step deposition process using different plasma powers, the dielectric constant value of the dielectric thin film can be significantly lowered. In addition, while using the same precursor (precursor) in the deposition process it is possible to simply control the pressure and power for plasma deposition to lower the dielectric constant value of the dielectric thin film.

In addition, the present invention does not require a coating or baking process as compared to the method of forming a low dielectric thin film by spin casting, and because the same precursor is used to deposit a dielectric thin film in the same chamber by using one bubbler. It is advantageous in terms of cost, time or process simplification. In addition, since the dielectric thin film is formed by a deposition method using plasma, it is possible to improve the thermal stability of the low dielectric material used.

Other objects, features and advantages of the present invention will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

Hereinafter, with reference to the accompanying drawings illustrating the configuration and operation of the embodiment of the present invention, the configuration and operation of the present invention shown in the drawings and described by it will be described by at least one embodiment, By the technical spirit of the present invention described above and its core configuration and operation is not limited.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of a semiconductor device and a method for manufacturing the same in detail.

2A to 2C are cross-sectional views illustrating a semiconductor device fabrication process in accordance with the present invention, and illustrate a fabrication process of an insulating film structure having a metal wiring and a dual structure. Meanwhile, the first and second insulating films 20 and 30 to be described below may be understood as interlayer insulating films provided between the lower metal wiring 10 and the upper metal wiring 40, but the structure of the first and second insulating films 20 and 30 may be a general interlayer insulating film. Will be different. This will be described in detail below.

Referring to FIG. 2A, first, a lower metal wiring 10 is formed on a substrate. Thereafter, the first insulating film 20 is deposited on the lower metal wiring 10 using plasma.

Referring to FIG. 2B, after the deposition of the first insulating film 20, the second insulating film 30 is deposited on the first insulating film 20 using plasma.

In order to deposit the first insulating film 20, a liquid precursor is once provided in a bubbler, the bubbler is heated, and the precursor is evaporated and injected into the chamber. Accordingly, the first insulating film 20 is deposited on the lower metal wiring 10.

Subsequently, the precursor provided in the bubbler is used in the same manner, but the plasma power is increased to be higher than that of the deposition of the first insulating layer 20 and then injected into the same chamber. As a result, a second insulating film 30 having a higher density than the first insulating film 20 is deposited on the first insulating film 20.

Referring to FIG. 2C, an upper metal wiring 40 is formed on the second insulating film 30.

As described above, the interlayer insulating film between the metal wires 10 and 40 is formed as the first insulating film 20 and the second insulating film 30 through two processes, and thus the dielectric constant value between the metal wires 10 and 40 is formed. Further lowering, the first insulating film 20 and the second insulating film 30 is deposited using the same precursor. In particular, the precursor uses a TEOS precursor (Tetra Etchyl Ortro Silicate Precursor), and the same conditions apply to all plasma treatments except for plasma power. In addition, in the present invention, deposition of the first insulating film 20 and the second insulating film 30 proceeds in the same chamber, and only one bubbler is required despite the deposition in the dual layer.

On the other hand, in the present invention, the two plasma treatments both proceed at room temperature and use the same high pressure. However, higher plasma power is used when depositing the second insulating film 30 than when depositing the first insulating film 20. By way of example, the high pressure may be about 20 mTorr.

That is, the first insulating film 20 and the second insulating film 30 are deposited by plasma treatment at the same pressure as room temperature while the second insulating film 30 is deposited by plasma treatment at a higher power. As a result, the second insulating film 30 is formed at a higher density than the first insulating film 20.

In the present invention, the first insulating film 20 is deposited by plasma using low power and has a soft characteristic in density, and the second insulating film 30 uses high power. It is deposited by plasma has a hard (hard) property in density. The low power may be 100 watts or less, and the high power may be 100 watts or more.

As a result, in the present invention, the insulating thin film between the metal lines 10 and 40 is formed using two plasma structures having different densities using plasma. In particular, the two films 20 and 30 are deposited using the same precursor, but by controlling the power during plasma deposition, the dielectric constant values of the insulating thin films 20 and 30 between the metal lines 10 and 40 are lowered. .

As described above, by forming the insulating thin film between the metal lines 10 and 40 using two plasma structures having different densities, the capacitance of the insulating thin film is connected in series, and the capacitance value thereof is expressed by the following equation. It becomes 1

Figure 112008062496818-PAT00001

The reason why the dielectric constant value is lowered as described above is because there is a difference in density between the first insulating film 20 and the second insulating film 30. For example, bonding of silicon-oxy-hydrocarbon (Si-O-CH 3 (Hydrocarbon)) during the decomposition and deposition of the TEOS precursor (Tetra Etchyl Ortro Silicate Precursor) by using a constant high pressure but controlling the plasma power There are many structures with less and less density.

The structure formed as the above process is as follows.

First, the lower metal wiring 10 is provided on the substrate.

Subsequently, the first insulating film 20 and the second insulating film 30 having a higher density than the first insulating film 20 are sequentially provided on the lower metal wiring 10. Here, the first insulating film 20 and the second insulating film 30 are deposited using the same TEOS precursor (Tetra Etchyl Ortro Silicate Precursor) using plasma, and the plasma power used for the deposition of the second insulating film 30 is higher. use. However, the temperature is kept at room temperature and the pressure is used equally when the first insulating film 20 and the second insulating film 30 are deposited.

While the preferred embodiments of the present invention have been described so far, those skilled in the art may implement the present invention in a modified form without departing from the essential characteristics of the present invention.

Therefore, the embodiments of the present invention described herein are to be considered in descriptive sense only and not for purposes of limitation, and the scope of the present invention is shown in the appended claims rather than the foregoing description, and all differences within the scope are equivalent to the present invention. Should be interpreted as being included in the

1 is a cross-sectional view showing a conventional general metal wiring and interlayer insulating film structure.

2A to 2B are cross-sectional views illustrating a process for manufacturing a metal wiring and an insulating film according to the present invention.

* Description of the symbols for the main parts of the drawings *

10: lower metal wiring 20: first insulating film

30: second insulating film 40: upper metal wiring

Claims (10)

Lower metallization; A first insulating film on the lower metal wiring; A second insulating film having a different density from the first insulating film on the first insulating film; And And an upper metal wiring on the second insulating film. The method of claim 1, wherein the first insulating film and the second insulating film, A semiconductor device, characterized in that formed using the same precursor (precursor) using a plasma. The semiconductor device of claim 1, wherein the second insulating film is denser than the first insulating film. Forming a lower metal wiring; Depositing a first insulating film on the lower metal wiring using plasma; Depositing a second insulating film on the first insulating film at a density different from that of the first insulating film using plasma; And forming an upper metal wiring on the second insulating film. The method of claim 4, wherein the first insulating film and the second insulating film are deposited by the same precursor. The method of claim 4, wherein the first insulating film and the second insulating film are deposited using a TEOS precursor (Tetra Etchyl Ortro Silicate Precursor). 5. The method of claim 4, wherein the first insulating film and the second insulating film are deposited by plasma treatment at a pressure equal to room temperature. The method of claim 4, wherein the second insulating film is deposited by plasma treatment at a higher power than when the first insulating film is formed. The method of claim 4, wherein the first insulating film and the second insulating film are deposited in the same chamber. The method of claim 4, wherein the second insulating film is deposited at a higher density than the first insulating film.
KR1020080086369A 2008-09-02 2008-09-02 Semiconductor device, and method of fabricating thereof KR20100027443A (en)

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