KR20100012671A - Method for manufacturing image sensor - Google Patents
Method for manufacturing image sensor Download PDFInfo
- Publication number
- KR20100012671A KR20100012671A KR1020080074186A KR20080074186A KR20100012671A KR 20100012671 A KR20100012671 A KR 20100012671A KR 1020080074186 A KR1020080074186 A KR 1020080074186A KR 20080074186 A KR20080074186 A KR 20080074186A KR 20100012671 A KR20100012671 A KR 20100012671A
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- South Korea
- Prior art keywords
- forming
- region
- amorphous silicon
- substrate
- image sensor
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims abstract description 24
- 239000011229 interlayer Substances 0.000 claims abstract description 10
- 238000005468 ion implantation Methods 0.000 claims description 11
- 238000005224 laser annealing Methods 0.000 claims description 10
- 238000005475 siliconizing Methods 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 5
- 238000000137 annealing Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 13
- 229910021419 crystalline silicon Inorganic materials 0.000 description 7
- 230000035945 sensitivity Effects 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 4
- 238000006731 degradation reaction Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14607—Geometry of the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14692—Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14698—Post-treatment for the devices, e.g. annealing, impurity-gettering, shor-circuit elimination, recrystallisation
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Nanotechnology (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
An embodiment relates to a method of manufacturing an image sensor.
An image sensor is a semiconductor device that converts an optical image into an electrical signal, and is divided into a charge coupled device (CCD) image sensor and a CMOS image sensor (CMOS). .
In the prior art, a photodiode is formed on a substrate by ion implantation. However, as the size of the photodiode gradually decreases for the purpose of increasing the number of pixels without increasing the chip size, the image quality decreases due to the reduction of the area of the light receiver.
In addition, since the stack height is not reduced as much as the area of the light receiving unit is reduced, the number of photons incident on the light receiving unit is also decreased due to diffraction of light called an airy disk.
One alternative to overcome this is to deposit photodiodes with amorphous Si, or read-out circuitry using wafer-to-wafer bonding such as silicon substrates. And photodiodes are formed on the lead-out circuit (hereinafter referred to as "three-dimensional image sensor"). The photodiode and lead-out circuit are connected via a metal line.
On the other hand, according to the prior art, there is a method of depositing amorphous silicon (a-Si) and then using it as a photodiode after metal wiring. The problem is that since Si is an amorphous structure, leakage occurs frequently, resulting in dark. The property is bad . For reference, in order to directly deposit polysilicon (Poly Si), a high temperature condition of 1000 ° C. or higher is required, which causes a problem in the underlying metal, and the transistor also has a problem in that Vt / Id is misaligned, thus depositing a-Si. .
In addition, according to the related art, since both the source and the drain of the both ends of the transfer transistor are doped with a high concentration of N-type, charge sharing occurs. When charge sharing occurs, the sensitivity of the output image is lowered and image errors may occur.
In addition, according to the related art, a dark current is generated between the photodiode and the lead-out circuit and the photocharge is not smoothly moved, and saturation and sensitivity are decreased.
Embodiments provide a method of manufacturing an image sensor capable of making an image sensing unit of amorphous silicon formed on a readout circuit by using laser annealing with polysilicon or crystalline silicon.
In addition, the embodiment is to provide a method of manufacturing an image sensor that can increase the charge factor (Charge Sharing) does not occur.
In addition, the embodiment of the present invention manufactures an image sensor capable of minimizing dark current sources and preventing saturation and degradation of sensitivity by making a smooth movement path of photo charge between the photodiode and the lead-out circuit. To provide a method.
In another embodiment, a method of manufacturing an image sensor includes forming a readout circuitry on a substrate; Forming an interlayer insulating layer on the substrate; Forming a wire on the interlayer insulating layer, the wiring being electrically connected to the lead-out circuit; Forming an amorphous silicon image sensing device on the wiring; And crystalline siliconizing the amorphous silicon image sensing unit.
According to the method of manufacturing an image sensor according to the embodiment, leakage current, which was a problem of amorphous silicon (a-Si), may be improved by polycrystalline silicon or crystalline siliconized amorphous silicon by laser annealing.
In addition, according to the embodiment, by increasing the number of laser annealing to three times, a more uniform Si lattice structure (Crystalline Si) may be formed to improve dark current.
In addition, according to the embodiment, the device may be designed such that there is a potential difference between the source and the drain across the transfer transistor Tx, thereby enabling full dumping of the photo charge.
In addition, according to the embodiment, the charge connection region is formed between the photodiode and the lead-out circuit to create a smooth movement path of the photo charge, thereby minimizing the dark current source, and reducing saturation and sensitivity. It can prevent.
Hereinafter, a method of manufacturing an image sensor according to an embodiment will be described in detail with reference to the accompanying drawings.
In the description of the embodiments, where it is described as being formed "on / under" of each layer, it is understood that the phase is formed directly or indirectly through another layer. It includes everything.
The present invention is not limited to the CMOS image sensor, and may be applied to an image sensor requiring a photodiode.
In an exemplary embodiment, the image sensing unit 210 may be a photodiode, but is not limited thereto. The image sensing unit 210 may be a photogate, a combination of a photodiode and a photogate, and the like.
(First embodiment)
Hereinafter, a method of manufacturing the image sensor according to the first embodiment will be described with reference to FIGS. 1 to 4.
1 is a schematic diagram of a substrate on which an
First, as shown in FIG. 2, the
The forming of the lead-out
For example, the
According to the embodiment, the device can be designed such that there is a voltage difference between the source / drain across the transfer transistor Tx, thereby enabling full dumping of the photo charge. Accordingly, as the photo charge generated in the photodiode is dumped into the floating diffusion region, the output image sensitivity may be increased.
That is, the embodiment forms the
Hereinafter, the dumping structure of the photocharge of the embodiment will be described in detail.
Unlike the floating diffusion (FD) 131 node, which is an N + function in the embodiment, the P / N /
In detail, the electrons generated by the photodiode 210 are moved to the
Since the maximum voltage value of the P0 / N- / P-
That is, in the embodiment, the reason why the P0 / N- / P-well junction is formed instead of the N + / P-well junction in the silicon sub, which is the
Therefore, unlike the case where the photodiode is simply connected by N + junction as in the prior art, the embodiment can avoid problems such as degradation of saturation and degradation of sensitivity.
Next, according to the embodiment, the first
To this end, the first embodiment may form an n + doped region as the first
Meanwhile, in order to minimize the first
That is, as in the first embodiment, the reason for locally N + doping only to the contact forming part is to facilitate the formation of ohmic contact while minimizing the dark signal. As in the prior art, when N + Doping the entire Tx Source part, the dark signal may increase due to the substrate surface dangling bond.
Next, the
Next, as shown in FIG. 3, a
For example, a metal layer (not shown) may be formed on the
Thereafter, the photolithography process may be performed, and the
Next, an
Next, as shown in FIG. 4, the amorphous silicon
For example, laser annealing may be performed for several tens of ms to make the amorphous silicon (a-Si)
At this time, since the laser annealing is irradiated for several tens of ms, heat is not transferred to the
The first embodiment of the laser annealing in the example is not advance to about 600mJ / cm 2 ~ 1200mJ / cm 2 of energy, but is not limited thereto.
When the amorphous silicon (a-Si)
In addition, the first embodiment may repeat the laser annealing a plurality of times to further improve the image characteristics. For example, laser annealing may be repeated three times, but is not limited thereto.
Thereafter, an upper electrode (not shown) may be formed on the crystalline silicon
Meanwhile, in the first exemplary embodiment, an etching process of separating the image sensing unit for each pixel may be performed to fill an etched portion between pixels with an inter-pixel insulating layer (not shown) to separate the pixels for each pixel.
(2nd Example)
5 is a cross-sectional view of the image sensor according to the second embodiment, which is a detailed view of a substrate on which the lead-
The second embodiment can employ the technical features of the first embodiment.
Meanwhile, unlike the first embodiment, the second embodiment is an example in which the first
According to an embodiment, an N +
In addition, when the N +
Accordingly, in the second embodiment, the
According to the second embodiment, the E-Field of the Si surface does not occur, which may contribute to the reduction of dark current of the 3-D integrated CIS.
The present invention is not limited to the described embodiments and drawings, and various other embodiments are possible within the scope of the claims.
1 to 4 are process cross-sectional views of a method of manufacturing the image sensor according to the first embodiment.
5 is a sectional view of an image sensor according to a second embodiment;
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080074186A KR20100012671A (en) | 2008-07-29 | 2008-07-29 | Method for manufacturing image sensor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080074186A KR20100012671A (en) | 2008-07-29 | 2008-07-29 | Method for manufacturing image sensor |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20100012671A true KR20100012671A (en) | 2010-02-08 |
Family
ID=42086865
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020080074186A KR20100012671A (en) | 2008-07-29 | 2008-07-29 | Method for manufacturing image sensor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20100012671A (en) |
-
2008
- 2008-07-29 KR KR1020080074186A patent/KR20100012671A/en not_active Application Discontinuation
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