KR20090131425A - Display device including process key and the photo align method - Google Patents

Abstract

PURPOSE: A display device including a process key and a photo align method thereof are provided to prevent process defects due to misalign, thereby improving production yield. CONSTITUTION: A buffer layer(212) is formed on a substrate. The buffer layer is made of resin absorbing light. A plurality of process keys(260) is configured corresponding to a check region of the buffer layer. The insulating layer covers the top of process keys. A semiconductor material layer(242a) is formed on the insulating layer. An interlayer insulating film(214) made of inorganic or organic insulating materials are formed between the buffer layer and the process keys.

Description

Display device including process key and the photo alignment method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device including a process key capable of improving process defects caused by misalignment during a photo alignment process, and a photo alignment method thereof.

In general, liquid crystal displays, plasma displays, and organic field displays have become mainstream display devices. However, recently, various types of display devices have been introduced to satisfy rapidly changing consumer demands.

In particular, with the advancement and portability of the information usage environment, the company is accelerating to realize light weight, thin film, high efficiency and color video. As a part of this, research on electrophoretic display devices combining only the advantages of paper and existing display devices is being actively conducted.

The electrophoretic display has been spotlighted as the next generation display device with paper texture due to its excellent contrast ratio, visibility, fast response speed, natural color display, low cost and easy portability.

Hereinafter, an electrophoretic display device according to the related art will be described with reference to the accompanying drawings.

1 is a view for explaining the driving principle of the electrophoretic display, it will be described with reference to this.

As shown in the drawing, the conventional electrophoretic display device 1 includes an ink layer 15 interposed between the first and second substrates 5 and 10 and the first and second substrates 5 and 10. Include. The ink layer 15 includes a plurality of capsules 80 filled with a plurality of black pigments 82 and white pigments 84 charged through a condensation polymerization reaction.

Although not shown in detail in the drawings, a plurality of pixel electrodes 70 connected to a plurality of thin film transistors (not shown) are patterned for each pixel region (not shown) on the second substrate 10. That is, the plurality of pixel electrodes 70 are selectively applied with (+) polarity or (-) polarity, respectively.

When the size of the capsule 80 including the black pigment 82 and the white pigment 84 is not constant, it is possible to selectively select only the capsule 80 of a predetermined size. Applying a voltage of positive or negative polarity to the ink layer 15 described above, the charged black pigments and white pigments 82 and 84 inside the capsule 80 are attracted toward opposite polarities. .

That is, when the black pigment 82 moves upward, black is displayed, and when the white pigment 84 moves upward, white is displayed.

Hereinafter, an electrophoretic display device according to the related art will be described in detail with reference to the accompanying drawings.

2 is a schematic cross-sectional view of a conventional electrophoretic display device.

As shown, the conventional electrophoretic display device 100 is opposed to each other, and the first and second substrates 105 and 110 are respectively divided into a display area for realizing an image and a non-display area except for the same. An ink layer 115 is interposed between the first and second substrates 105 and 110. The ink layer 115 performs a condensation polymerization reaction between the first and second plastic sheets 175 and 176 made of a transparent material and the first and second plastic sheets 175 and 176 corresponding to the opposite surfaces. And a plurality of capsules 180 filled with a plurality of black pigments 182 and white pigments 184 charged through. Generally, the black pigment 182 is charged with a positive polarity and the white pigment 84 is charged with a negative polarity, respectively.

In this case, a transparent plastic material may be used for the first substrate 105, and the first substrate 105 may be omitted. The second substrate 110 may be made of a transparent material such as glass or plastic, or an opaque conductive material such as stainless or chromium.

The second substrate 110 is divided into a pixel region P and a switching region T. FIG. The thin film transistor T is configured to correspond to the switching region S on the second substrate 110. The thin film transistor T may include a gate electrode 125 extending from a gate line configured in one direction, a gate insulating layer 145 covering the gate electrode 125, and a gate insulating layer 145 on the gate insulating layer 145. A semiconductor layer 142 overlapping the gate electrode 125, a data line 130 disposed on the semiconductor layer 142 and vertically crossing the gate line to define a pixel region P, and the data line A source electrode 132 extending from 130 and a drain electrode 134 spaced apart from the source electrode 132 are included.

The gate electrode 125, the source electrode 132, and the drain electrode 134 use an opaque conductive metal material including copper (Cu), aluminum (Al), and aluminum alloy (AlNd) having excellent electrical conductivity. have. The semiconductor layer 142 includes an active layer 140 made of pure amorphous silicon (a-si: H) and an ohmic contact layer 141 made of amorphous silicon (n + a-si: H) containing impurities. do. Although not shown in the drawings, the semiconductor layer 142 may be formed using crystalline silicon.

The upper surface of the thin film transistor T includes a drain contact hole CH1 exposing the drain electrode 134, and the protective layer 155 is formed of one selected from the group of organic insulating materials including benzocyclobutene and photoacryl. do. The pixel electrode 170 in contact with the drain electrode 134 through the drain contact hole CH1 is formed on the passivation layer 155 in a plate-like pattern.

The common electrode 190 is formed on the lower front surface of the first substrate 105 as one selected from a group of transparent conductive materials including indium tin oxide (ITO) and indium zinc oxide (IZO).

The electrophoretic display device 150 having the above-described configuration uses external light including natural light or room light as a light source, and has a positive polarity or a negative polarity by a thin film transistor T serving as a switching function. The selectively applied pixel electrode 170 induces a positional change of the plurality of black pigments 182 and white pigments 184 filled in the capsule 180 to implement an image.

That is, when the thin film transistor T is selectively controlled to make the pixel electrode 170 have (+) polarity or (−) polarity, the external light EL incident on the first substrate 110 is After passing through the first substrate 105, the reflected light RL reflected by the black pigment 182 or the white pigment 184 drawn upward or downward by the pixel electrode 170 is again reflected by the first substrate 105. You can realize the image by exiting).

The gate wiring and the gate electrode 125, the semiconductor layer 142, the source and drain electrodes 132 and 134 on the second substrate (hereinafter, abbreviated as substrate) of the electrophoretic display device 100 having the above-described configuration. ) And each process of forming the pixel electrode 170, one side of the non-display area NAA that does not implement an image for the purpose of preventing mis-alignment prior to the exposure process. Design the inspection area on the dummy part, form a plurality of process keys (not shown) to enable precise control between process progresses, and use a photo align to irradiate light from the exposure machine. After aligning the position, the exposure process is performed.

A photo align using the plurality of process keys will be described in more detail with reference to the accompanying drawings.

3 is a view for explaining a photo align using a process key according to a first example of the related art, and the same reference numerals are assigned to the same names as in FIG. 2.

As illustrated, a second substrate 110 (hereinafter, referred to as a substrate) in which an inspection area DA is defined is positioned at one dummy portion of the non-display area that does not implement an image on the exposure chuck 175. The substrate 110 is made of transparent glass or plastic material.

In the inspection area DA on the substrate 110, a plurality of process keys configured to be spaced apart at regular intervals from the same layer on the same layer as the gate line or data line (not shown) corresponding to the display area (not shown) for implementing an image. A gate insulating layer 145 formed of at least one of a group of inorganic insulating materials including silicon oxide (SiO ₂ ) and silicon nitride (SiNx) on the plurality of process keys 160, and the gate insulating film ( The semiconductor material layer 142a is sequentially stacked on the upper front surface of the 145.

The semiconductor material layer 142a is a single layer made of poly si or a double layer in which pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si :) containing impurities are sequentially stacked. Can be configured. Although not shown in detail in the drawings, a photoresist layer (not shown) coated with a photoresist is further configured on the upper front surface of the semiconductor material layer 142a.

A mask (not shown) including a transmissive part and a blocking part is positioned above the substrate 110 on which the photosensitive layer is formed. The blocking part blocks the light completely, and the transmitting part transmits light so that the photosensitive layer exposed to the light can be completely exposed by chemical change.

An exposure device (not shown) is positioned above the mask, and the plurality of process keys 160 irradiate the plurality of process keys 160 with light emitted from the exposure device in response to the inspection area DA spaced apart from the exposure device. Inspection equipment (not shown) for detecting the reflected light is located.

In general, the exposure chuck 175 is an anti-reflective ceramic-based material capable of absorbing all of the light emitted from the exposure machine. The irradiated light is all absorbed by the exposure chuck 175.

Therefore, the photo alignment process of aligning the substrate 110 and the mask in the correct position is performed by recognizing the light reflected back by the plurality of process keys 160 as the inspection equipment. That is, the photo alignment process accurately aligns the substrate 110 with the mask through the plurality of process keys 160 by recognizing and detecting only the light reflected back by the plurality of process keys 160 with the inspection equipment. Say fair.

When the substrate 110 and the mask are aligned through the photo alignment process, a plurality of gate electrodes corresponding to the display area may be formed through an exposure process using an exposure machine, a developing process using a developer, and an etching process using an etchant. A plurality of semiconductor layers (142 of FIG. 2) and a plurality of semiconductor patterns (not shown) are respectively formed on an upper portion overlapped with 125 of 2 and a plurality of process keys 160 respectively. That is, the photo-alignment process using the plurality of process keys 160 described above is repeatedly performed for each step of sequentially stacking the wirings and the electrodes on the substrate 110.

However, in the case of the substrate 110 having the bending characteristics, such as the above-described electrophoretic display 150 and the flexible display device, the substrate 110 is made of one of a group of opaque conductive materials including stainless steel or chromium. However, in the case of the substrate 110 made of such a metal material, when scratches or foreign substances existing on the substrate 110 itself undergo a photo alignment process, an interference effect may occur, causing a misalignment. have.

This will be described in more detail with reference to the accompanying drawings.

4A is a view illustrating a photo alignment using a process key according to a second example of the related art. FIG. 4B is an enlarged plan view of a portion corresponding to the inspection area of FIG. 4A. The same reference numerals are used, and redundant description will be omitted.

As shown in FIGS. 4A and 4B, the substrate 110 composed of one selected from the group of opaque conductive materials including SUS (stainless) or chromium (Cr) is used for the purpose of planarization because its exposed surface is irregular. The buffer layer 112 is formed on the upper front surface of the substrate 110. The buffer layer 112 is one selected from the group of photo-acrylic organic insulating materials and has a thickness of about 1.5 μm.

In the inspection area DA on the buffer layer 112, a plurality of process keys 160, a gate insulating layer 145 covering an upper portion of the plurality of process keys 160, and an upper front surface of the gate insulating layer 145 are formed. The semiconductor material layer 142a positioned and the photosensitive layer (not shown) covering the upper portion of the semiconductor material layer 142a are sequentially stacked.

In this case, a mask including a transmissive part and a blocking part is positioned above the substrate 110 on which the photosensitive layer is formed. The exposure apparatus is positioned above the mask and spaced apart from the mask, and the inspection equipment is positioned at one side spaced apart from the exposure apparatus.

However, in the case of the substrate 110 made of an opaque conductive metal material, the scratch 162 or the foreign material 164 existing on the substrate 110 itself acts as a noise causing an interference effect when the photo alignment process is performed. Therefore, the process yield is significantly reduced due to the occurrence of a misalignment in which the inspection equipment performs the exposure process in a state in which the inspection equipment does not correctly recognize the positions of the plurality of process keys 160.

In addition, a light source irradiated from the exposure machine is not absorbed by the exposure chuck 175 positioned below the substrate 110, but part of the light is absorbed or scattered by the substrate 110 made of an opaque conductive material. The remaining light results in the re-reflection, which leads to a limitation in performing the photo alignment process using the plurality of process keys 160.

In addition, in the above-described configuration, the buffer layer 112 made of a photoacrylic material has a dielectric constant of about 10 ⁸ , and the buffer layer 112 corresponds to a display area (not shown). The parasitic capacitance is generated by acting as a dielectric layer between the gate wiring or the data wiring and the substrate 110 made of the same material in the same layer as that of the same material. The parasitic capacitance adversely affects the driving characteristics of the thin film transistor. Act as a factor.

Disclosure of Invention The present invention has been made to solve the above-described problem, and an object thereof is to improve production yield by preventing process defects caused by misalignment between photo alignment processes in a display device using a substrate made of an opaque conductive material. do.

A display device including a process key according to the present invention for achieving the above object is divided into a display area for implementing an image on an exposure chuck and a non-display area except this, and inspects one dummy portion of the non-display area. A photo-alignment process for aligning a substrate made of an opaque conductive material defining an area with a mask, comprising: a buffer layer formed of a resin-based material on the substrate; A plurality of process keys each spaced corresponding to the inspection area on the buffer layer; An insulating film covering an upper portion of the plurality of process keys; And a semiconductor material layer on the insulating film.

An interlayer insulating layer is formed in the space between the buffer layer and the plurality of process keys with one selected from a group of inorganic insulating materials and organic insulating materials. The buffer layer is formed of one selected from the group of resin-based materials including red, green, blue, and black.

In addition, the buffer layer is formed to a thickness of 1.5 ~ 2.5μm, the dielectric constant is characterized in that 10 ¹² ~ 10 ²⁰ .

The plurality of process keys are formed of the same material as the gate wiring or the data wiring. The substrate may be formed of one selected from the group of conductive materials including SUS and chromium.

A photo-alignment method of a display device including a process key according to the present invention for achieving the above object comprises the steps of forming a photosensitive layer covering the upper portion of the semiconductor material layer; Arranging a mask to the top spaced apart from the photosensitive layer and inspection equipment to one side spaced apart from the mask; Irradiating a substrate corresponding to the inspection area with a light source from an exposure apparatus located above the mask; The light irradiated to the portion except for the plurality of process keys corresponding to the inspection area is absorbed by the buffer layer, and only the light reflected by the plurality of process keys is detected by the inspection equipment to align the substrate and the mask. Characterized in that it comprises a step.

In the present invention, first, by forming a buffer layer made of a resin-based material capable of absorbing light on a substrate made of an opaque conductive material, it is possible to eliminate the interference effect caused by scratches or foreign substances on the substrate itself, so that accurate photo freezing is achieved. Phosphorus process can be performed.

Second, by forming a buffer layer made of a resin-based material having a dielectric constant of 10 ¹² to 10 ²⁰ on a substrate made of an opaque conductive material, it is possible to minimize the influence of parasitic capacitance between the substrate and the array device.

--- Example ---

According to an aspect of the present invention, a display device including a substrate made of an opaque conductive material may absorb light on the substrate so as to prevent noise defects due to scratching or foreign matter caused by foreign matter during the alignment process using the process key. Characterized in that a buffer layer made of a resin that can be formed.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

5A and 5B are plan views schematically illustrating array mother substrates for a display device including a plurality of process keys, and a mother substrate for manufacturing two display devices will be described as an example.

As shown in FIGS. 5A and 5B, an array mother substrate 210a for a display device including a plurality of process keys according to the present invention may include a display area AA that implements an image and a non-display area NAA except for the same. Separated by. A plurality of inspection areas DA are positioned in the dummy part of one side of the non-display area NAA.

In this case, a plurality of process keys 260 are formed in the plurality of inspection areas DA, and the photo alignment process is performed using the plurality of process keys 260.

In such a photo align process, the number and design positions of the process keys 260 may vary according to the type of exposure machine. That is, as shown in FIG. 5A, a plurality of process keys 260 are used for each part of the display device, that is, in the case of the mother substrate 210a capable of manufacturing two display devices. Each part may be formed in 12 portions, and as shown in FIG. 5B, a plurality of process keys 260 may be formed in two portions per display unit, that is, four portions corresponding to four corners. . Accordingly, these process keys 260 may vary in number and design position depending on process conditions.

6 is a view for explaining an alignment method using a process key according to the present invention, and FIG. 7 is an enlarged plan view of a portion corresponding to the inspection area of FIG. 6.

First, as shown in FIG. 6, the substrate 210 including one selected from the group of opaque conductive materials including SUS (Stainless) and chromium (Cr) on the exposure chuck 275, and the substrate 210. For the purpose of planarization, a buffer layer 212 covering the upper entire surface of the substrate 210, an interlayer insulating layer 214 covering the upper portion of the buffer layer 212, and a non-display area that does not implement an image on the interlayer insulating layer 214. 5A and 5B, a plurality of process keys 260 corresponding to the inspection area DA positioned at one dummy part of the NAA of FIGS. 5A and 5B, and a gate insulating layer 245 covering an upper portion of the plurality of process keys 260. And the semiconductor material layer 242a on the gate insulating layer 245 are sequentially stacked.

The exposure chuck 275 may be selected from an anti-reflect treated ceramic-based material capable of absorbing all light emitted from an exposure machine (not shown).

In particular, the present invention is characterized in that the buffer layer 212 is formed of a material capable of absorbing light on the substrate 210 made of a group of opaque conductive materials, such as red, green, blue, and black. For example, the resin (resin) series containing a.

The buffer layer 212 may be formed to have a thickness of 1.5 μm to 2.5 μm, preferably 2.0 μm, and to have a dielectric constant of 10 ¹² to 10 ²⁰ so as to secure an insulation characteristic with a gate line or a data line to be formed in the display area. It is preferable to use a resin-based material.

The interlayer insulating layer 214 is formed for the reliability of the array element and the planarization of the buffer layer 212, and may be omitted as necessary. The interlayer insulating layer 214 is formed of one selected from an inorganic insulating material including silicon oxide (SiO ₂ ) and silicon nitride (SiNx), or a group of organic insulating materials including benzocyclobutene or photo acryl. do.

In this case, the semiconductor material layer 242a may be formed by stacking a single layer made of poly si or pure silicon (a-Si: H) and amorphous silicon (n + a-Si :) including impurities in this order. It may consist of a double layer. Although not shown in detail in the drawings, a photoresist layer (not shown) coated with a photoresist is further formed on the upper front surface of the semiconductor material layer 242a.

A mask including a transmissive part and a blocking part is positioned above the substrate 210 on which the photosensitive layer is formed. The blocking part blocks the light completely, and the transmitting part transmits light so that the photosensitive layer exposed to the light can be completely exposed by chemical change.

An exposure device (not shown) is positioned above the mask, and the light source from the exposure device is irradiated to the plurality of process keys 160 in response to the inspection area DA spaced apart from the exposure device. Inspection equipment (not shown) for detecting the light is located.

The photo alignment process of aligning the substrate 210 and the mask in the correct position is performed by recognizing the light re-reflected by the plurality of process keys 260 as inspection equipment.

In this case, when the light source from the exposure machine is irradiated to the plurality of process keys 260, the light irradiated to the portion F except for the plurality of process keys 260 may be absorbed by the buffer layer 212. Since the light G irradiated to the plurality of process keys 260 is reflected back, only by detecting and detecting the light H reflected by the plurality of process keys 260 as inspection equipment. It is possible to precisely control the photo alignment process.

That is, when the buffer layer 212 is formed of a resin-based material capable of absorbing light as in the present invention, since the light is not reflected at the portion except for the plurality of process keys 260 during the photo alignment process, the substrate Even if scratches or foreign substances are present on the substrate 210, all of them may be absorbed through the buffer layer 212 covering the upper portion of the substrate 210, so that noise may not be generated due to an interference effect, and thus an accurate alignment process may be performed.

When the substrate 210 and the mask are aligned through the photo alignment process, each of the plurality of gate electrodes corresponding to the display area may be exposed through an exposure process using an exposure machine, a developing process using a developer, and an etching process using an etchant. A plurality of semiconductor layers (not shown) and a plurality of semiconductor patterns (not shown) are respectively formed on the overlapped upper portion and the overlapped upper portion with the plurality of process keys 260, respectively. That is, the photo-alignment process using the plurality of process keys 260 described above is repeatedly performed for each step of sequentially forming each wiring and electrode on the substrate 210.

In addition, when the buffer layer 212 is formed of a resin-based material having a dielectric constant of 10 ¹² to 10 ²⁰ as in the present invention, the influence of parasitic capacitance between the gate wiring or the data wiring and the substrate 210 may be minimized. Will be.

Therefore, in the present invention, even if the substrate 210 made of an opaque conductive material is applied, since the buffer layer 212 is formed of a resin-based material capable of absorbing light on the substrate 210, an accurate photo alignment process is performed. As a result, production yield can be improved by minimizing process defects caused by misalignment.

Up to now, the present invention has been described consistently with respect to the electrophoretic display, but this is merely illustrative and can be applied to most display devices employing a substrate made of an opaque conductive material.

Therefore, it will be apparent that the present invention is not limited to the above embodiments, and various modifications and changes can be made without departing from the spirit and spirit of the present invention.

1 is a view for explaining a driving principle of an electrophoretic display.

2 is a schematic cross-sectional view of a conventional electrophoretic display.

3 is a view for explaining photo alignment using a process key according to a first example of the related art.

4A is a view for explaining photo alignment using a process key according to a second conventional example.

4B is an enlarged plan view of a portion corresponding to the inspection area of FIG. 4A;

5A and 5B are respective plan views schematically illustrating an array mother substrate for a display device including a plurality of process keys.

6 is a view for explaining an alignment method using a process key according to the present invention;

7 is an enlarged plan view of a portion corresponding to the inspection area of FIG. 6;

* Explanation of symbols for the main parts of the drawings *

210: substrate 212: buffer layer

214: interlayer insulating film 242a: semiconductor material layer

245: gate insulating film 260: process key

275: exposure chuck

Claims (8)

A photo-alignment for aligning a substrate with a mask, a display area for realizing an image on an exposure chuck and a non-display area except this, wherein an opaque conductive material is defined on one dummy portion of the non-display area and an inspection area is defined. In proceeding with the phosphorus process, A buffer layer formed of a resin-based material on the substrate; A plurality of process keys each spaced corresponding to the inspection area on the buffer layer; An insulating film covering an upper portion of the plurality of process keys; A semiconductor material layer on the insulating film Display device comprising a. The method of claim 1, And an interlayer insulating film is formed in the space between the buffer layer and the plurality of process keys with one selected from a group of inorganic insulating materials and organic insulating materials. The method of claim 1, And the buffer layer is formed of one selected from a group of resin-based materials including red, green, blue, and black. The method of claim 1, And the buffer layer is formed to a thickness of 1.5 to 2.5μm. The method of claim 1, And the buffer layer has a permittivity of 10 ¹² to 10 ²⁰ . The method of claim 1, And the plurality of process keys are formed of the same material as a gate line or a data line. The method of claim 1, And the substrate is formed of one selected from the group of conductive materials including SUS and chromium. In the display device according to claim 1, Forming a photosensitive layer covering an upper portion of the semiconductor material layer; Arranging a mask to the top spaced apart from the photosensitive layer and inspection equipment to one side spaced apart from the mask; Irradiating a substrate corresponding to the inspection area with a light source from an exposure apparatus located above the mask; The light irradiated to the portion except for the plurality of process keys corresponding to the inspection area is absorbed by the buffer layer, and only the light reflected by the plurality of process keys is detected by the inspection equipment to align the substrate and the mask. step Photo alignment method comprising a.

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