KR20090129565A - X-ray imaging detector simulator for time to digital converter - Google Patents

Abstract

PURPOSE: A simulator for an X-ray image detector is provided to perform the performance test and correction of a time-to-digital converter automatically by generating a signal similar to the X-ray image detector. CONSTITUTION: An electromagnetic delay line(40) has the same combination as an X-ray image detector. An electric charge generator(31-33) is connected to each terminal of the electromagnetic delay line. An FPGA(Field Programmable Gate Array)(20) provides an electric pulse to an electric charge generator. A digital switch(25) interfaces between the FPGA and the electric charge generator. A communication unit(60) receives a remote command from a user through a PC. A microprocessor(50) performs the whole control and transmits the remote command signal received from the communication unit to the FPGA as an electrical control signal.

Description

X-ray image detector simulator applied to time-to-digital converter {X-RAY IMAGING DETECTOR SIMULATOR FOR TIME TO DIGITAL CONVERTER}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an X-ray image detector simulator applied to a time-to-digital converter, and more particularly, to an apparatus capable of efficiently performing performance inspection and calibration of a time-to-digital converter in a short time. will be.

One-dimensional or two-dimensional X-ray image detector is widely used in neutron diffraction test, plasma diagnostic apparatus using X-ray, and the operation principle thereof is briefly described as follows.

An anode plane and a cathode plane are planar in the image detector, and the anode and cathode plates are arranged in multi-wires, and a high voltage is formed between the anode and cathode plates to set an electric field. Is applied, and a neutral gas is filled in the detector. In addition, multiple lines constituting the positive electrode plate and the negative electrode plate are connected to an electronic delay line (delay line) is configured to read the position of the incident X-rays.

Briefly explaining the principle, electrons and cations are generated by X-rays incident to the image detector and ionizing neutral gas charged inside the image detector, and electrons and cations are electrons as the anode under the influence of the applied high voltage. The cations migrate to the cathode, causing an avalanche, which creates an electrical signal in the form of a charge cloud, which is then connected to the positive and negative wires. The line will flow to both ends. Therefore, by calculating the difference in the arrival time of the electrical signal detected at both ends of the electronic delay line and converting this value to a digital value, the position of the incident X-ray can be read. In this case, when the plane of the X-ray image detector is defined as the X-axis and Y-axis directions, when the position is read only in one direction of the X-axis, the position of both the one-dimensional image detector, the X-axis, and the Y-axis Is called a two-dimensional image detector.

The time-to-digital converter is combined with a one-dimensional or two-dimensional X-ray image detector to find the time difference between the signals arriving at both ends of the electronic delay line when the signal generated from the image detector passes through the electronic delay line. A device capable of obtaining positional information (X, Y) incident on the. Therefore, in order to develop the device or test the performance of several units, it is necessary to have a charge generator similar to the one flowing from the pulse generator and the image detector that generates the correct time difference. Due to its dead time, the time-to-digital converter has different count rate response according to its own time resolution (typically having 110ps, 120ps, 130ps, 140ps, and 150ps resolution), so the count rate for each time resolution ranges from 1Hz to 2MHz. It is necessary to investigate the characteristics, and by inputting the known input time difference to obtain the position information and obtaining the histogram, the conversion linearity of the time-to-digital converter can be obtained. From this linearity, the position where the actual X-ray is incident It is used to calibrate the position measured by the image detector.

The conventional method for such a test has a problem that it is very inconvenient and takes more than a day to test a device by examining its response while changing manually using a frequency generator. In addition, it was impossible to test the image as if it was connected to the two-dimensional image detector without connecting the actual image detector.

Accordingly, the present invention has been made to solve the above-mentioned problems of the prior art, and automated testing and correcting the count rate response characteristics and image measurement characteristics of the time-digital converter by generating an electrical signal as if the actual image detector device was connected. It is an object of the present invention.

As a technical means for achieving the above object, the present invention relates to an X-ray image detector simulator for automatically generating a signal similar to the X-ray image detector to automatically perform the performance and calibration of the time-to-digital converter, The X-ray image detector simulator includes: an electronic delay line having a combination such as an X-ray image detector; A charge generator connected to each of said electronic delay line terminals; An FPGA for providing an electrical pulse to the charge generator side; A digital switch which interfaces between the FPGA and the charge generator and saves the output stage; A communication unit for receiving a remote command transmitted through a PC (measurement device) from a user; And a microprocessor (MPU) for performing an overall control function and transmitting an electrical control signal to the FPGA from a remote command signal received from the communication unit.

Preferably, the charge generator includes an X-axis charge generator, a Y-axis charge generator, and an anode charge generator, wherein the charge generator provides an electrical signal similar to the charge (Q) generated in the image detector. However, the generated charge is characterized in that the range of 0.01pC ~ 0.1pC is applied.

Preferably, the value of the above-described electronic delay line is to be formed 300ns, respectively, the output terminal is formed in a position having a value of 100ns, 150ns, 250ns electronic delay line, respectively, the electronic delay line by connecting the two terminals at each output end position This value can be varied to 100ns, 150ns, 250ns, 300ns length.

Preferably, the FPGA includes: a command decoder for specifying a pulse generation period, a pulse output position, and the like by decoding a control signal transmitted from a microprocessor (MPU); A frequency generator for periodically generating electrical pulses to be transferred to the positive charge generator, the X-axis charge generator, and the Y-axis charge generator; A shift resist having a function of shifting a pulse generated by the frequency generator by a specified output position and waiting at a pulse output position; And a position controller having a function of controlling a pulse waiting in the shift resist to alternately send output to an X-axis charge generator and a Y-axis charge generator.

Preferably, the frequency generator of the FPGA is characterized in that further generates a trigger (TRIGGER) pulse signal in a separate cycle.

According to the simulator for X-ray image detector applied to the time-to-digital converter according to the present invention has the following effects.

First, the performance test of the time-to-digital converter can be performed automatically, and its critical performance test linearity test is automatically processed for the count rate test from 1Hz to 2MHz for resolutions of 110ps, 120ps, 130ps, 140ps and 150ps of the time-to-digital converter. It can work.

Secondly, by adjusting the total electronic delay line values of the image detector, it is possible to conveniently perform various one-dimensional and two-dimensional image detector measurement tests instead of the actual X-ray image detector.

Third, the frequency generator of the FPGA can generate a trigger pulse signal in a separate cycle, which can also be conveniently tested without an external trigger signal when applied to the system for plasma diagnostics, one of the applications.

Fourth, it is equipped with a serial interface so that it can be interoperated with the time-digital conversion device in software. This enables remote control and simultaneous data measurement so that the time-digital conversion module can be efficiently tested and calibrated in a short time. There are also effects that can be performed.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall configuration diagram schematically showing a simulator for an X-ray image detector applied to a time-digital converter according to an embodiment of the present invention.

As shown in FIG. 1, the simulator for the X-ray image detector according to the present invention has been proposed to automatically evaluate the performance of the time-digital converter 300, and the X-ray image detector simulator 10 is actually used. A timing preamplifier (100) that has an output signal (ANODE, X1, X2, Y1, Y2) such as an image detector, each of which amplifies an initial signal from an electronic delay line connected to the image detector; The input signals are input to the time-digital converter 300 via a constant fraction discriminator (CFD, 200) which functions to accurately compare the position signals X1, X2, Y1, and Y2. The time-to-digital converter 300 determines whether the signal is a normal signal or an electrical noise signal based on the ANODE signal, and receives the signal outputs X1, X2, Y1, and Y2, which are position signals, and the signal difference between the two inputs (ΔX = X2-). X1, ΔY = Y2-Y1) is calculated and then converted to the corresponding digital value.

FIG. 2 is a detailed configuration diagram illustrating only an image detector simulator according to an embodiment of the present invention, and the X-ray image detector simulator will be described in more detail.

As shown in FIG. 2, when the configuration of the X-ray image detector simulator 10 is large, the electronic delay line 40 is positioned at the output terminal, and the entire length of the electronic delay line 40 connects two contacts from the outside. It is adjusted to be variable depending on the short state (80; 81). An X-axis charge generator 32 and a Y-axis charge generator 33 are connected to each electronic delay line 40 terminal, and a positive charge generator 31 connected to the ANODE output is connected. These charge generators are provided with electric pulses generated by the Filed Programmable Gate Array (FPGA) 20 to generate a signal similar to the charge Q generated inside the X-ray image detector. Preferably, the size of the charge generated in the charge generator is characterized in that the range of about 0.01 pC ~ 0.1 pC is applied.

Meanwhile, a microprocessor (MPU) 50 is provided to remotely transmit a control command to the FPGA 20, and a communication unit (RS-232) 60 is further provided as a communication means for transferring a remote command from a user. do. That is, when the remote command of the user is transmitted to the communication unit (RS-232) 60, the microprocessor (MPU) 50 determines the corresponding command signal and converts it into an electrical control signal to the FPGA 20 side for transmission. .

In addition, when the time-digital converter is actually connected to the plasma diagnostic equipment to which the X-ray image detector is applied, a trigger signal is used to synchronize the measurement time. In order to create a similar signal, the frequency generator 21 of the FPGA 20 further generates a trigger pulse signal, which can be adjusted by the user, using a separate period.

The trigger output signal provided by the frequency generator 21 should be provided when starting a plurality of time-to-digital converters simultaneously or when starting measurement by an external signal in a time-to-digital converter operation mode. As a specification, the TTL logic specification is satisfied, and the time-to-digital converter automatically performs the measurement start function whenever this signal is periodically generated.

The delay line 40 is the same as that used in the position detector using the delay line, and the basic unit D of each delay line 40 shown in FIG. 2 is shown in FIG. Likewise, it consists of an inductor (L) and a capacitor (C). The total delay time and impedance of the electronic delay line 40 including the inductor L and the capacitor C are the total inductor value L _t formed by the N individual components constituting the electronic delay line 40 as shown in Equation 1 below. ) And the total capacitor value (C _t ).

) Td = Total Delay (ns) L _t = Total Line Inductance (

)

Z _o = Impedance (Ohms) C _t = Total Line Capacitance (pF)

The typical total delay line length of the X-ray image detector has 100 ns, 150 ns, 250 ns, and 300 ns, and it is necessary to vary the length of the total delay line in a convenient and simple manner to serve as a simulator.

To implement this, by applying Equation 1, N delay-line element numbers (1 L and 1 L) are 300 ns, which is the longest value among the representative total delay line values typically applied to the X-ray image detector. And the delay line value is 0 by properly connecting the delay element terminals through the external connector as shown in 80 and 81 of FIG. 2 and setting the delay line value to 0, as if the X-ray image detector had The effect of varying the length of the total delay line can be obtained, and by using this principle, the length of the total delay line 100ns, 150ns, 250ns, 300ns, which is widely used by the X-ray image detector, can be adjusted.

On the other hand, a charge generator similar to the charge (Q) generated inside the X-ray image detector, when a square wave is input to the RC circuit as shown in Fig. 4, the equation (Q) = C · V (where V is the input square wave voltage). Electric charge can be generated by this. At this time, the rising and falling time of the input square wave should be shorter than 20ns. In Fig. 4, R2 is a resistor that matches the impedance of the pulse generating circuit side and usually has a 50 ohm resistor. Since the input size is usually fixed at 3.3 volts or 5 volts (because the pulse from the FPGA is input as described below), the pulses are passed through the R1 resistor to adjust the amount of charge output. The voltage across C is determined by the R1 / R2 ratio, so changing the value of R1 adjusts the amount of Q, the output of this circuit, to an appropriate magnitude.

By applying this principle, as shown in FIG. 5, a charge generation circuit output terminal is connected between the delay element terminals of the electronic delay line 40, and then a pulse input to the charge generation circuit input terminal is generated. An electrical signal can be generated similarly to the signal from an image detector. Through this method, a signal having an accurate time difference determined by the delay element terminal (L-C tap) can be obtained at both terminals of the delay line, and the time-digital converter can be calibrated accurately using this method.

Meanwhile, as described above, an FPGA is used to input a square wave input to a charge generation circuit or to implement a digital switch, and when used, a circuit for configuring a digital switch circuit required by a delay-line element number. In addition to greatly reducing the size and cost, it is possible to easily implement the user-determined pulse period, pulse output position, etc. when a pulse is generated.

In the FPGA 20 shown in FIG. 2, the instruction decoder 22, the frequency generator 21, the shift resist 24, the position controller 23, and the like are configured to implement the functions described above. do.

The instruction decoder 22 decodes a control signal transmitted from the microprocessor (MPU) 50 to designate a pulse generation period, a pulse output position, and the like. The frequency generator 21 is a positive charge generator 31. ), Periodically generate electrical pulses to be transferred to the X-axis charge generator 32 and the Y-axis charge generator 33, and also generate trigger pulses at separate periods.

In the above, the shift resister 24 functions to shift the pulse generated by the frequency generator 21 by the designated output position and to wait at the pulse output position, and the position controller 23 waits at the shift resist 24. It performs a function of controlling the pulse to be sent to the X-axis charge generator 32 and the Y-axis charge generator 33 to alternately send the output.

Detailed description of the internal functions and operations of the FPGA 20 includes remote commands (frequency generation start and end, frequency setting range, pulse output position X and Y, etc.) sent by the user. It is delivered to the instruction decoder 22 inside the FPGA 20 via a processor (MPU) 50. The command decoder 22 periodically transmits a corresponding frequency through the frequency generator 21, and uses the shift resist 24 and the digital switch 25 to charge the X-axis charge generator 32 and the Y-axis charge. The pulse signal is transmitted to a specially designated position (X, Y) of the generator 33. In fact, since X and Y axes each have 110 terminals of electronic delay element, a total of 220 terminals are required, but the same function can be realized by using 110 FPGA terminals by alternately outputting by installing digital switch 25. It was. That is, the manufacturing cost can be reduced by saving the output stage of the FPGA 20.

Since the present invention aims to automate time-consuming time-to-digital converter testing and calibration, the user must be able to send remote commands and pass them to the FPGA 20 circuitry, as shown in FIG. 2. The communication unit 60 adopting the RS232 method corresponding to the general-purpose serial communication method is applied, and this function is implemented by using a low-cost microprocessor (MPU) 50.

By applying the configuration and method as described above, in synchronization with the operation program of the time-to-digital converter, control functions such as operation start and stop commands, measurement time setting, frequency setting, and electronic switch control connected to the electronic delay line are enabled. Automatic test and calibration are possible.

As described above, the embodiment according to the operation of the simulator for the X-ray image detector applied to the time-to-digital converter according to the present invention is as follows.

The user specifies the position of the X-axis and Y-axis charge generators 32, 33, and issues a microprocessor (MPU) 50 via a communication unit (RS-232) 60 to generate a remote command to generate a pulse at a specified frequency. ), The microprocessor (MPU) 50 passes this command to the FPGA 20.

Inside the FPGA 20, a pulse having a predetermined period is generated through the command decoder 22 and the frequency generator 21, and the X-axis is passed through the position controller 23, the shift register 24, and the digital switch 25. A single pulse is delivered to the X, Y positions designated by the charge generator 32 and the Y-axis charge generator 33, and the signal is transmitted to the X1 and X2 terminals located at the ends of the electron delay line 40, By transmitting signals with time differences to the Y1 and Y2 terminals, the same operation can be realized as an X-ray image detector.

As described above, although the technical idea of the present invention has been described with reference to the preferred embodiments, those skilled in the art will be able to vary the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. Can be modified and changed.

1 is an overall configuration diagram schematically showing a simulator for an X-ray image detector applied to a time-to-digital converter according to an embodiment of the present invention.

2 is a detailed configuration diagram showing only the simulator for X-ray image detectors according to the embodiment of the present invention;

3 is a circuit diagram illustrating an electronic delay line.

4 is a basic circuit diagram for explaining charge generation;

5 is an operation circuit diagram connecting the electronic delay line circuit and the charge generation circuit.

<Description of Symbols for Main Parts of Drawings>

10: simulator for X-ray image detector

20: FPGA 21: Frequency Generator

22: command decoder 23: position controller

24: shift resist 25: digital switch

31: anode charge generator 32: X-axis charge generator

33: Y-axis charge generator 40: Electronic delay line element (D) block

50: microprocessor (MPU) 60: communication unit

70: output connector 80: jumper for X-axis total delay line variable

81: Y-axis total delay line variable jumper

Claims (5)

The X-ray image detector simulator 10 for automatically generating a signal similar to the X-ray image detector to perform the performance and calibration of the time-to-digital converter 300, the X-ray image detector simulator 10, An electronic delay line 40 having a combination such as an X-ray image detector; A charge generator (31, 32, 33) connected to each terminal of the electronic delay line (40); An FPGA (20) for providing an electrical pulse to the charge generator (31, 32, 33) side; A digital switch 25 for interfacing between the FPGA 20 and the charge generators 31, 32, 33 and saving the output stage; A communication unit 60 for receiving a remote command transmitted from a user via a PC (measuring device); A microprocessor (MPU) 50 for performing an overall control function and transferring the remote command signal received from the communication unit 60 as an electrical control signal to the FPGA 20 side; -Simulator for X-ray image detector applied to digital converter. The method of claim 1, The charge generators 31, 32, and 33 include an X-axis charge generator 32, a Y-axis charge generator 33, and a positive charge generator 31. The charge generator 31 , 32 and 33) provide an electrical signal similar to the charge (Q) generated by the image detector, but the magnitude of the generated charge is applied to the time-digital converter, characterized in that the range of 0.01pC ~ 0.1pC is applied. -Simulator for the line image detector. The method of claim 1, The value of the above-described electronic delay line 40 is to be formed 300ns, but the output terminal is formed in a position having a value of 100ns, 150ns, 250ns electronic delay line, respectively, and the electronic delay line by connecting the two terminals in each position A simulator for an X-ray image detector applied to a time-to-digital converter, characterized in that the value of 40 can be varied in lengths of 100 ns, 150 ns, 250 ns, and 300 ns. The method of claim 1, wherein the FPGA 20, A command decoder 22 for decoding a control signal transmitted from the microprocessor (MPU) 50 and specifying a pulse generation period, a pulse output position, and the like; A frequency generator 21 for periodically generating electrical pulses to be transferred to the positive charge generator 31, the X-axis charge generator 32, and the Y-axis charge generator 33; A shift resist 24 having a function of shifting the pulse generated by the frequency generator 21 by the designated output position and waiting at the pulse output position; And a position controller 23 having a function of controlling a pulse waiting in the shift resist 24 to alternately send output to the X-axis charge generator 32 and the Y-axis charge generator 33. Simulator for X-ray image detector applied to time-digital converter characterized in that. The method of claim 4, wherein The frequency generator (21) of the FPGA (20) is an X-ray image detector simulator applied to the time-to-digital converter, characterized in that further generating a trigger (TRIGGER) pulse signal in a separate cycle.

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