KR20090099352A - Liquid crystal display device and driving method thereof - Google Patents

Abstract

A liquid crystal display device and a driving method thereof are provided to increase the reliability of a product by adjusting the performance of a device according to a result of internet traffic and removing a noise. In a liquid crystal display device and a driving method thereof, an interface(100) receives a wire and red, green, blue data based on wire, vertical and horizontal synchronous signal. A system resource volume check unit(105) checks out R, G, and B data of the usage amount of CPU and wireless traffic. A timing controller(110) receives R, G, B data, and vertical/horizontal synchronization signal and re-arranges them. A gate driver(121) generates a high pulse successively in response to a control signal from the timing controller.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY DEVICE AND DRIVING METHOD THEREOF}

The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly, in order to improve noise, that is, a communication failure problem that occurs during wireless communication as miniaturization and slimming of a notebook model or the like proceeds. The present invention relates to a liquid crystal display device and a method of driving the same, which measure the amount of Internet resources without using components for noise blocking and allow the user to operate in a performance mode of a main body system preset by a user according to the measured value.

In general, a liquid crystal display (LCD) is a representative flat panel display that displays an image by adjusting the amount of light beam transmitted to correspond to an image signal. This is starting with a small display such as a laptop in the early days, and in recent years, due to the features such as light weight, thinness, and low power consumption, the application range is gradually increasing, especially as the technology of large panel is accelerated and applied. The range has ranged from LCD monitors to LCD TVs.

First of all, notebook computers are small and have the same functions as desktop computers, and they also have a liquid crystal display device that displays high quality images compared to CRT monitors. For this reason, as notebook computers become smaller and thinner, research into the thinning of accessories and liquid crystal display devices embedded in notebook computers is being actively conducted.

1 is a front perspective view of a general notebook computer, Figure 2 is a rear perspective view of FIG.

As shown in FIG. 1 and FIG. 2, a general notebook computer is composed of a computer system module 10 and a liquid crystal display module 20. The computer system module 10 includes a data input device such as a keyboard, a mouse pad, a disk drive, and a data communication device such as a central processing unit (CPU), an infrared communication port, and a wireless LAN.

In addition, the liquid crystal display module 20 includes a liquid crystal panel 22 on which an image is displayed, a driving circuit board including an IC chip 24a such as a plurality of timing controllers required for driving the liquid crystal panel 22 and other driving circuits. (24). At this time, the IC chip 24a is generally formed in the form of an application specific IC (ASIC).

In addition, as shown in FIG. 2, the liquid crystal display module 20 has an antenna 30 used in a data communication device such as a wireless LAN mounted in a case opposite to a display screen, and the antenna 30 is a printed circuit. The substrate PCB may be formed or the flexible printed circuit FPC may be formed.

In general, in the notebook model using the wireless antenna as in the prior art, components constituting the main body and the wireless antenna to reduce the communication disturbance caused by the noise that affects the wireless communication, that is, the noiseless electronic pulses generated from the IC chip, etc. Designed to attach as far as possible.

However, in recent years, as the size and slimness of liquid crystal display devices have progressed, limitations have been placed on arranging antennas used for wireless communication as far as possible. As a result, communication errors caused by electronic pulses during wireless communication have been issued, thereby making it reliable. This is falling.

On the other hand, the alternative was proposed to arrange and design additional components, such as electromagnetic shielding (EMI) shielding means or filters for noise blocking.

However, in such a case, the additional components are a major factor in the unit price increase, thereby increasing the manufacturing cost of the liquid crystal display.

Accordingly, an object of the present invention is to solve the above problems, and an object thereof is to provide a liquid crystal display device and a method of driving the same, which can reduce noise without additional components for blocking noise during wireless communication of the liquid crystal display device. In providing.

According to an embodiment of the present invention, an LCD device includes: an interface to which wired and wireless based red (R), green (G), blue (B) data and vertical / horizontal synchronization signals are applied; A system resource amount checker configured to check CPU (Central Processing Unit) usage and wireless traffic of wired / wireless R, G, and B data provided from the interface to adjust performance of components constituting the system; A timing controller which receives the R, G, B data and vertical / horizontal synchronization signals provided from the interface to rearrange the data and generate a new control signal; A gate driver for sequentially generating high pulses in response to a control signal supplied from the timing controller; A data driver that samples and stores data supplied from the timing controller and selects and outputs a gray voltage suitable for the data in response to a control signal; And a liquid crystal panel configured to receive data from a data driver when a high pulse is supplied from the gate driver to implement an image.

In addition, the driving method of the liquid crystal display according to the present invention comprises the steps of providing a wired and wireless based R, G, B data and vertical / horizontal synchronization signal to the interface; Adjusting the performance of components constituting the system by checking CPU usage and wireless traffic by receiving R, G, and B data from the interface; Receiving R, G, B data and vertical / horizontal synchronization signals from the interface to rearrange the data and generate a new control signal; Generating a high pulse sequentially by receiving a voltage from the outside; Receiving, sampling, and storing the rearranged data, and selecting and outputting a gray voltage suitable for the data in response to a control signal; And applying the gray level voltage selected and output when the high-pulse is applied to implement an image.

As a result of the above configuration and driving method, the present invention adjusts the performance of the components constituting the system main body according to the result of the CPU usage and the amount of wireless Internet traffic in the wireless communication Internet environment, thereby eliminating the noise that interferes with the communication, thereby reducing the size and thickness. It is possible to increase the reliability of the product of the liquid crystal display device to achieve this, and incidentally the use time of the battery can be extended.

In addition, if the use of a separate electromagnetic interference shield (EMI) shielding means or a filter (filter), etc. to reduce the noise compared to the prior art can reduce the manufacturing costs associated with it reduces the overall cost of the liquid crystal display device Can lead to.

Hereinafter, the configuration and driving method of the liquid crystal display device will be described in more detail with reference to the accompanying drawings.

First, although not shown in a separate drawing, the LCD according to the present invention, as in the prior art, may be composed of a display unit for implementing an image and a system main body unit interworking with the display unit. And a driving circuit unit for outputting R, G, and B data to the liquid crystal panel, and the system main unit includes a data input device such as a keyboard, a touch pad, a CD / disk drive, a CPU, Data communication devices such as LAN card, serial / parallel communication port, and infrared communication port are provided.

In the present invention, in addition to the above liquid crystal display device, a system resource amount checking device is further configured. Through this, it analyzes the R, G, B data provided from the outside based on wired and wireless to check the CPU usage of the main body of the system and at the same time checks the amount of wireless Internet traffic and according to the result of the CPU clock, By adjusting the performance of components such as the maximum rotation speed (RPM) of the hard disk drive (HDD) and the graphics processing unit (GPU), the noise generated from the components of the main system system in wireless communication Reduce communication errors. At this time, the performance of the components constituting the main body system is operated in a mode arbitrarily set by the user.

For example, when a user uses a laptop for the purpose of simply surfing the web, the amount of resources of the system, that is, the R, G, and B data, is less than 50% of the total CPU usage, and the wireless Internet traffic is 30%. In this case, the clock can be reduced by switching to a mode that reduces the clock of the CPU. Of course, this is determined by the user setting the initial system arbitrarily.

When this process is performed, and the user switches back to the Internet environment and uses the laptop for the purpose of accessing online games at the same time as using the Internet, the system resource check device checks the CPU usage of the system main body at the same time. By checking the amount of wireless Internet traffic, you control the performance of the components that make up your system. Of course, at this time, the system checks the system resource amount every predetermined time set by the initial user.

In this case, when the system's resource amount is close to 80% of the total CPU usage, and the wireless Internet traffic is more than 50%, not only the clock of the CPU but also the maximum rotation of the hard disk drive (HDD) The performance of additional components such as speed (RPM) can also be controlled.

As a result, in the liquid crystal display device in which wireless communication is performed in parallel, the level of noise that may affect the wireless communication may be substantially reduced by adjusting the performance of components constituting the system according to the amount of resources used. This eliminates the need for extra shielding to shield the components that make up the system.

3 is a block diagram illustrating a driving system of a liquid crystal display according to the present invention.

As shown in FIG. 3, the driving unit of the liquid crystal display according to the present invention is applied with wired and wireless based red (R), green (G), blue (B) data and vertical / horizontal synchronization signals (Vsync / Hsync). An interface unit 100; A system resource amount checking unit 105 for checking CPU usage and wireless traffic of wired / wireless substrates R, G, and B data provided from the interface unit 100 to adjust performance of the system; A timing controller 110 receiving the R, G, and B data and the vertical / horizontal synchronization signal (Vsync / Hsync) provided from the interface unit 100 to rearrange the data and generate a new control signal; And a liquid crystal panel 140 to which R, G, and B data are input according to a control signal from the timing controller 100 to implement an image.

First, the interface unit 100 receives data based on a wireless Internet environment or receives R, G, B data and an input clock under a wired environment input from a driving system such as an Asymmetric Digital Subscriber Line (ADSL) or a personal computer, Control signals such as a horizontal sync signal Hsync, a vertical sync signal Vsync, and a data enable signal are input to the timing controller 110. Mainly, LVDS (Low Voltage Differential Signal) interface and TTL interface are used for data and control signal transmission with the drive system. In this case, the interface functions are collected and integrated with the timing controller 110 into a single chip.

Here, the data receiving unit 90 interworking with the interface unit 100 is based on a wired / wireless environment, and more specifically, receives data through an ADSL line connected to a modem and the like configured inside the driving system of the main body. A network unit 91, a wireless LAN unit 93 for receiving data through wireless communication using a wireless antenna, etc., and a network unit 91 and a wireless LAN unit 93 based on the wired / wireless environment. The memory 92 may be configured to temporarily store data received from the memory and output the data to the interface unit 100.

The timing controller 110 receives the R, G, and B data and the vertical / horizontal synchronization signal (Vsync / Hsync) transmitted from the interface unit 100, rearranges the R, G, and B data, and realigns the liquid crystal panel 140. A new control signal for controlling is generated and applied to the liquid crystal panel 140. In this case, the R, G, and B data rearranged by the timing controller 110 are grayscale information of the R, G, and B data using logic voltages of 3.3 to 5 V generated and sent from the voltage generation unit 130. Will be represented.

In addition, the system resource amount checking unit 105 according to the present invention checks the resource amount of the R, G, and B data provided from the interface unit 100 to the timing controller 110. In other words, the system resource amount checking unit 105 determines whether the current CPU usage is less than 50%, or more than 80%, or more than 50% but less than 80% of the total usage or available capacity of the CPU that can process the data. Is checked using a CPU usage checker (not shown), and a wireless internet traffic checker (not shown) checks whether the traffic in the current wireless internet environment is less than 30% or more than 50% of the total usage of the wireless internet traffic. After checking through), control signals are generated and output according to the two result values. Therefore, the system resource amount checking unit 105 according to the present invention may include a CPU usage checking unit (not shown), a wireless Internet traffic checking unit (not shown), and a control signal generation unit (not shown) as a sub block.

The control signal generated from the system resource amount checking unit 105 may be controlled to convert the driving clock of the CPU. In other words, when a computer system such as a CPU is usually driven at 2 GHz, the driving clock can be reduced to 1.2 GHz according to the amount of resources. This includes, for example, a first clock generator that generates a clock of 2 GHz and a second clock generator that generates a clock of 1.2 GHz, and additionally forms a multiplexer that interoperates with the first clock generator and the second clock generator. can do. At this time, the multiplexer selects and outputs one of the first clock generator and the second clock generator according to the control signal sent from the system resource amount checker 105 so that the system operates by the corresponding driving clock.

Of course, the present invention can control not only the clock control of the CPU, but also the performance of the maximum rotational speed (RPM) of the hard disk drive (HDD) and the like, wherein the system configuration for controlling the RPM of the HDD is also described above. It can be configured in the same way as.

For this reason, for example, assuming that the CPU usage is 50% or more and the wireless Internet traffic requires the maximum performance at 50% or more, as a result of the inspection in the system resource amount checking unit 105 according to the present invention, the system resource amount checking The unit 105 outputs a control signal corresponding thereto to reduce the driving clock of the CPU and simultaneously reduce the maximum rotational speed RPM of the hard disk drive HDD.

Of course, the present invention is not limited to this manner. In other words, by designing or setting the initial design to allow sufficient control over various other components, the noise emitted from the system can be significantly reduced, which in turn extends the battery life. . Here, the various components refer to the aforementioned CPU clock and RPM of the hard disk drive, as well as the GPU and various input / output ports.

The gate driver 121 sequentially generates a scan pulse, that is, a gate high pulse, in response to the gate driving control signal GDC supplied from the timing controller 110. The gate driver 121 includes a shift register for sequentially generating scan pulses, and a level shift for shifting the swing width of the scan pulse voltage above the threshold voltage of the TFT.

The data driver 123 supplies data to the data lines DL1 to DLm in response to the data driving control signal DDC supplied from the timing controller 110. More precisely, the data driver 123 samples the digital video data RGB from the timing controller 110, latches the data, selects a gray voltage suitable for the data, and converts the gray voltage into an analog voltage. Output to 140.

First, the shift register in the data driver 123 shifts the source start pulse SSP from the timing controller 110 according to the source sampling clock signal SSC to generate a sampling signal. In addition, since the shift register has a plurality of shift registers, the source start pulse SSP of the first shift register is shifted to transfer the carry signal CAR to the next shift register.

The data register temporarily stores the data RGB from the timing controller 110 and supplies the stored data to the first latch.

The first latch latches the video data RGB from the data register line by line in response to a sampling signal sequentially input from the shift register.

After latching the video data input from the first latch, the second latch simultaneously outputs the latched video data in response to the source output enable signal SOE from the timing controller 110.

The digital to analog converter (DAC) selects and outputs the gray level voltage of the corresponding level supplied from the gray voltage generator in response to the video data from the second latch. Of course, the gray scale voltage is output as one of positive and negative polarity according to the polarity control signal from the timing controller 110, and such a voltage may be provided from a gamma voltage generator such as a programmable gamma circuit.

The output circuit supplies the voltage converted to the analog form through the above DAC to each of the data lines DL1 to DLm, and is configured with buffers to minimize the attenuation of the voltage.

The gray scale voltages output from the buffers are applied to the R, G, and B pixels through data pads formed in the edge region of the liquid crystal panel 140 and the data lines DL1 to DLm of the image region.

On the other hand, the voltage generation unit 130 receives a commercial voltage of 110V or 220V from the outside to generate a voltage of about 12V DC and DC-DC to generate various types of DC voltage using the DC voltage It is configured to include a converter. In this case, the DC-DC converter is substantially composed of a PWM IC (Pulse Width Modulation Integrated Circuit), and by combining with a peripheral circuit surrounding the PWM IC, power supply voltage (Vdd), gate on / off voltage (Vgl, Vgh), etc. Is generated and applied to the liquid crystal panel 140.

In addition, the lamp driver 135 receives a voltage of about 24 V from the voltage generator 130, converts the AC waveform into an AC waveform, and converts the AC waveform into an AC voltage having a high voltage to the backlight 137.

At this time, the plurality of lamps constituting the backlight 137 is turned on by applying the AC high voltage, and the light is sent to the liquid crystal panel 140 positioned on the front surface. Of course, the lamp here will consist of either a Cold Cathode Fluorescent Lamp (CCFL) or an External Electrode Fluorescent Lamp (EEFL).

The liquid crystal panel 140 includes a thin film transistor array substrate, a color filter substrate, and liquid crystal injected between two substrates, which are bonded to each other while maintaining a uniform cell gap. The TFTs formed at the intersections of the data lines DL1 to DLm and the gate lines GL1 to GLn of the liquid crystal panel 140 may receive data on the data lines DL1 to DLm in response to a scanning pulse from the gate driver 121. To the liquid crystal cell. The source electrode of this TFT is connected to the data lines DL1 to DLm, and the drain electrode is connected to the pixel electrode of the liquid crystal cell. The gate electrode of the TFT is connected to the gate lines GL1 to GLn.

4 is a flowchart illustrating an operation procedure of the system resource amount checking unit of FIG. 3.

As shown in FIG. 4, the system resource amount checking unit of the liquid crystal display according to the present invention starts driving of the system when power is applied (S101). At this time, the user sets the performance control level of the system in advance before the system is started. For example, a wireless communication user may determine which component of the system is better to control based on CPU usage and resource of wireless Internet traffic, and then select a performance control mode of the desired component. Of course, at this time, you can set the category of the amount of resources.

As such, according to the user's performance control level before the system is driven, the system checks the usage of the CPU and the wireless Internet traffic in real time, more preferably at a predetermined time period (S102).

For example, as before, it checks whether the CPU usage is less than 50% or more than 80%, or is greater than 50% and less than 80%, and then controls the corresponding components according to the initial set mode. Subsequently, the wireless internet traffic is checked, of course, whether the wireless internet traffic is less than 30%, or more than 50%, or greater than 30% and less than 50%, and control the corresponding components according to the initial mode. (S103).

Among these resource categories, if the user is configured to reduce the initial CPU clock when the CPU usage is less than 50%, such as simple web surfing, and the wireless Internet traffic is less than 30%, then the drive system is responsible for the system resource check. By controlling the CPU driving clock, the overall wireless wide area network (WWAN) noise is reduced as a result, and battery capacity is additionally saved (S104).

On the other hand, the CPU usage is over 80% and the wireless Internet traffic is over 50%, such as when data transfer is important, such as simple data transfer. If it is assumed that maximum performance is required, the user can control the GPU and I / O ports, etc. in addition to the CPU driving clock at the initial setting (S103), so that the performance of more components is controlled in proportion to the overall increase in system resources. WWAN noise is reduced, and additionally battery capacity will be saved (S104).

As described so far, the present invention is a liquid crystal display capable of wireless communication, and the category is classified according to the amount of resources of the system, and the conventional wireless communication is configured by controlling various components in the system corresponding to the category. It is possible to improve the problem of communication failure due to noise electromagnetic pulses generated from the elements, and as a result, increase the reliability of the product.

1 is a front perspective view of a typical notebook computer

2 is a rear perspective view of FIG.

3 is a block diagram showing a driving system of a liquid crystal display according to the present invention.

4 is a flowchart illustrating an operation sequence of the system resource amount checking unit of FIG. 3.

Claims (5)

An interface to which wired and wireless based red (R), green (G), blue (B) data and vertical / horizontal synchronization signals are applied; A system resource amount checker configured to check CPU (Central Processing Unit) usage and wireless traffic of wired / wireless R, G, and B data provided from the interface to adjust performance of components constituting the system; A timing controller receiving the R, G, and B data and the vertical / horizontal synchronization signal provided from the interface to rearrange the data and generate a new control signal; A gate driver for sequentially generating high pulses in response to a control signal supplied from the timing controller; A data driver that samples and stores data supplied from the timing controller and selects and outputs a gray voltage suitable for the data in response to a control signal; And And a liquid crystal panel configured to receive data from a data driver when the high-pulse is supplied from the gate driver to implement an image. The system resource checking unit according to claim 1, wherein the system resource checking unit checks CPU usage according to the results of the CPU usage checking unit checking the wireless Internet traffic, the wireless internet traffic checking unit checking the wireless internet traffic, and the CPU usage checking unit and the wireless internet traffic checking unit. And a control signal generator for generating a control signal. The liquid crystal display of claim 1, wherein the system resource amount checker controls at least one of a clock of a CPU constituting a system, a maximum rotational speed (RPM) of a hard disk driver, a graphics device, and an input / output port. . The system of claim 1, wherein the system resource amount checking unit comprises: a first clock generator for generating a first clock, a second clock generator for generating a second clock, and the system when the performance control means is a clock of a CPU; And a multiplexer for selecting one of the first clock generator and the second clock generator according to a control signal from the resource amount checker and outputting a corresponding clock. Providing red (R), green (G), blue (B) data and vertical / horizontal synchronization signals based on wired and wireless to the interface; Adjusting the performance of components constituting the system by receiving R, G, and B data from the interface and checking CPU (Central Processing Unit) usage and wireless traffic; Receiving R, G, and B data and vertical / horizontal synchronization signals from the interface to rearrange the data and generate a new control signal; Generating a high pulse sequentially by receiving a voltage from the outside; Receiving, sampling, and storing the rearranged data, and selecting and outputting a gray voltage suitable for the data in response to a control signal; And And applying the selected gray level voltage when the high-pulse is applied to implement an image.

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