KR20090096869A - Method for reading out of non volatile memory device - Google Patents

Abstract

A reading method of a nonvolatile memory device is provided to reduce distribution of a threshold voltage by reducing a sensing current in a reading process about a first page in case a program operation is performed in a second page. An nth page is provided as a reading object(410). A program state of n+1th page is determined(420). In the n+1th page is not programmed, Y direction interference about the nth page does not occur, and a reading operation is performed without a separate change subject(430). In case the n+1th page is programmed, Y direction interference about the nth page occurs, and a sensing current flowing in a reading operation is reduced and is supplied(440). The nth page is read according to the set sensing current(450).

Description

Method for reading out of non volatile memory device

The present invention relates to a method of reading a nonvolatile memory device.

Recently, there is an increasing demand for a nonvolatile memory device that can be electrically programmed and erased and that does not require a refresh function to rewrite data at regular intervals.

The nonvolatile memory device typically includes a memory cell array having cells in which data is stored in a matrix form, and a page buffer for writing a memory to a specific cell of the memory cell array or reading a memory stored in a specific cell. . The page buffer may include a pair of bit lines connected to a specific memory cell, a register for temporarily storing data to be written to the memory cell array, or a register for reading and temporarily storing data of a specific cell from the memory cell array, a voltage of a specific bit line or a specific register. It includes a sensing node for sensing a level, a bit line selection unit for controlling the connection of the specific bit line and the sensing node.

In the aforementioned program process of the nonvolatile memory device, the threshold voltage distribution of each cell tends to be spread by various factors.

In particular, when the Y-direction interference occurs by a method of sequentially programming each page, the entire threshold voltage increases constantly.

An object of the present invention to solve the above problems is to provide a read method of a nonvolatile memory device that can adjust the threshold voltage distribution by controlling the sensing current during the read operation.

A method of reading a nonvolatile memory device according to the present invention includes the steps of providing a first page as a read target, determining whether a program operation has been performed on a second page to be a program target after the first page is programmed; When the program operation is performed on the second page as a result of the determination, reducing and setting the difference between the first voltage and the second voltage applied as the bit line selection signal, and reading the first page according to the set voltage. Characterized in that it comprises a.

According to the above-described configuration of the present invention, when the program operation is performed on the second page, the sensing current may be reduced when the first page is read, thereby reducing the distribution of the threshold voltage. That is, when the threshold voltage is programmed high by the Y interference lamp, the threshold voltage is read out by reducing and applying the sensing current.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, only these embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you. Like numbers refer to like elements in the figures.

1 is a diagram illustrating a distribution of threshold voltages in an MLC program of a conventional nonvolatile memory device.

In the case of a single-level cell (SLC) program, there are only two states, so a wide read margin can be obtained. However, as shown, the four states of a 2-bit multi-level cell (MLC) program (Erase, P1, P2, and P3). ), There is a problem that the read margin for each state is narrowed. At this time, when the distribution of each state becomes large, a program voltage for programming each cell should increase, which causes a problem of a high incidence of fail due to disturbance. Therefore, in a nonvolatile memory device having a multi-level cell program, each state has a narrow threshold voltage distribution and a lower program voltage can be used.

On the other hand, factors affecting the threshold voltage distribution, which greatly affects the performance of the nonvolatile memory device, include threshold voltage distribution for each page, interference, or BPD (Back Pattern Dependency).

2A to 2I are diagrams for describing an interference phenomenon that occurs during a program operation of a nonvolatile memory device.

FIG. 2A illustrates a portion of a memory cell array of a nonvolatile memory device, in which each cell connected to the same word line WL constitutes the same page. In addition, cells connected to the even bit line BLe constitute an even page, and cells connected to the odd bit line BLO constitute an odd page.

In the illustrated memory cell array, an even page (page 0) of word line WL0 is programmed, followed by an odd page (page 1) of word line WL0. Next, an even page (page 2) of word line WL1 is programmed, and an odd page (page 3) of word line WL1 is programmed. The program is executed sequentially, and after programming the even page (page 2n) of word line WLn, the last word line, the odd page (page 2n + 1) of word line WLn Program. In the programming as described above, since the programs are sequentially programmed with a specific direction, the first programmed page is affected by the program operation for the next page, which is called an interference phenomenon.

Referring to FIG. 2B, only the page 0 is programmed, and the program is completed with the verification voltage Vpv or more. In the present state, there is no interference.

Referring to FIG. 2C, a page 1 is programmed, and a threshold voltage of page 0 is partially increased according to a program operation for page 1. Interference due to the program operation of the page located on the side is called X direction interference. Due to the X-direction interference, it can be seen that the threshold voltage distribution of all cells is widened as shown in FIG. 2D.

Referring to FIG. 2E, in the state where page 2 is programmed, threshold voltages of pages 0 and 1 increase partially according to a program operation for page 2. The interference on page 0 is affected by the program operation of the page located at the bottom and is called Y direction interference. In addition, the interference on page 1 is affected by the program operation of the page located in the diagonal direction and is called diagonal interference. It can be seen that the threshold voltage distribution of all cells is widened due to the Y-direction interference and the diagonal-direction interference as shown in FIG. 2F.

Also, referring to FIG. 2G, in the state where page 3 is programmed, threshold voltages of pages 0, 1, and 2 increase in accordance with a program operation for page 3. The interference on page 0 can be regarded as the diagonal direction interference, the page 1 interference is the Y direction interference, and the page 2 interference can be regarded as the X direction interference. As shown in FIG. 2H, the threshold voltage distribution of all cells is widened due to such X-direction interference, Y-direction interference, and diagonal direction interference.

When the program is completed for the entire page, it can be seen that the distribution of the threshold voltage (FIG. 2I) is much wider than that of the initial programming (FIG. 2B) due to the interferences. As such, it can be seen that the threshold voltage distribution of all cells is widened by various interference phenomena.

Considering the read operation as well as the program operation process, the actual threshold voltage distribution can be wider.

3A and 3B are diagrams for describing an expansion phenomenon of a threshold voltage distribution generated during a read process of a nonvolatile memory device.

In a conventional nonvolatile memory device, a program and a verification operation are repeatedly performed according to an incremental step pulse program (ISPP) method as shown in FIG. 3A. Each time the program is repeated, the program voltage is increased by a constant step voltage, and it is verified each time that the program is completed when programmed by the increased program voltage.

In the verification process, there may be a cell in which a program is completed earlier than other memory cells according to the characteristics of each cell. As described above, cells having a faster program rate than other cells are called fast cells.

However, in the case of the fast cell, it may be determined that verification is completed even though the fast cell is not programmed beyond the actual verification voltage. The voltage at the source terminal is increased due to noise generated from the common source line connected to the source terminal of the memory cell string, thereby increasing the body voltage of a specific cell. As a result, the sensing current flowing through each cell may be reduced during the verification operation due to the noise. Therefore, due to the decrease in the sensing current, although the threshold voltage is lower than the verification voltage, the sensing may occur in a cell programmed above the verification voltage. Such a cell is called an under program cell.

3B is a diagram illustrating a distribution of the under program cells. In other words, the cell is verified in the program state by the source line bouncing even though the cell is lower than the verify voltage Vpv. In the case of such an underprogram cell, source line bounce does not occur when an actual read is performed, and a large amount of sensing current flows to read the cell having a threshold voltage lower than the verification voltage. As a result, the sensing margin may be reduced than originally designed.

Considering such underprogram cells, the actual threshold voltage distribution may be wider than that of FIG. 2I. That is, the distribution may be formed from a point lower than the verification voltage Vpv.

As such, when all the memory cell blocks are considered, the threshold voltage distribution becomes much wider than the distribution of only one page, and thus requires the use of a higher program voltage.

In the present invention, it is intended to remove the distribution diffusion phenomenon caused by under program cell generation among the various distribution diffusion factors. For this purpose, when a specific page (n-th page) is to be read, the sensing current is applied differently according to whether or not the page (n + 1th page) causing the Y-direction interference is programmed.

4 is a flowchart illustrating a reading method according to an embodiment of the present invention.

First, the n th page is provided for reading (step 410).

Next, it is determined whether the n + 1th page has been programmed (step 420).

The n + 1 th page is a page to be programmed after the n th page is programmed, and causes interference in the Y direction with respect to the n th page during the programming.

Whether a program operation is performed on the n + 1 th page may be performed by detecting whether there is a cell programmed above a specific verification voltage among cells belonging to the page.

If the n + 1 th page is not programmed, it is determined that no interference occurs in the Y direction with respect to the n th page, and a read operation is performed without any change (step 430).

However, if the n + 1 th page is programmed, it is regarded as causing the Y direction interference with respect to the n th page, and the sensing current flowing during the read operation is reduced and applied (step 440).

In this case, a method of adjusting the sensing current will be described.

5A is a diagram illustrating a nonvolatile memory device applied to the present invention, and FIG. 5B is a waveform diagram illustrating a voltage applied during a read operation applied to the present invention.

The nonvolatile memory device includes a memory cell string 510, a bit line selector 520, and a sensing node precharge unit 530. Also, a source select transistor SST for selectively connecting the memory cell string and ground and a drain select transistor DST for selectively connecting the memory cell string and the bit line are included.

The memory cell string 510 includes a plurality of nonvolatile memory cells MC0, MC1,..., MCn connected in series.

The bit line selector 520 selectively connects the sensing node SO and the bit line BL. To this end, the NMOS transistor N520 connects the sensing node SO and the bit line BL in response to the bit line selection signal BSL.

The sensing node precharge unit 530 supplies a power voltage to the sensing node SO in response to the bit line precharge signal PRECHb. To this end, the PMOS transistor P530 is turned on in response to the bit line precharge signal PRECHb.

A read operation will be described with reference to FIG. 5B.

(1) T1 section

First, the sensing node SO is precharged to a high level by applying a low level precharge signal. In addition, the bit line selection signal BSL of the high level is precharged to the high level of the bit line BL.

In this case, the first voltage V1 is applied as the bit line selection signal BSL. As a result, the bit line BL is precharged from the first voltage V1 as the threshold voltage Vt of the NMOS transistor N520 is decreased (V1 -Vt).

(2) T2 section

Next, the bit line selection signal BSL is shifted to a low level, and the cell to be read is evaluated. Since the bit line selection signal BSL is transitioned to the low level, the bit line selection unit 520 blocks the connection between the bit line and the sensing node.

A read voltage Vrd is applied to a cell to be read (MC0 in FIG. 5A), and a pass voltage Vpass is applied to other cells. If the cell to be read is programmed, the cell is not turned on. The bit line maintains a precharged level. However, if the cell to be read is erased, the bit line is turned to the low level because the cell is turned on to form a current path through the memory cell string and flows to ground.

(3) T3 section

Next, the second voltage V2 is applied as the bit line selection signal BSL to sense whether the cell to be read is programmed.

When the level of the second voltage is smaller than the first voltage, and the bit line maintains the precharge level (V1-Vt), a value such that the NMOS transistor N520 is not turned on is applied. That is, the second voltage V2 is set such that the gate-source voltage Vgs is smaller than the threshold voltage when the precharge level V1-Vt is applied to the source.

In addition, when the low level voltage is applied to the bit line, the second voltage V2 is set to turn on the NMOS transistor N520.

Therefore, when the cell to be read is maintained at the precharged level, the NMOS transistor N520 is not turned on so that the sensing node maintains the high level voltage.

However, when the cell to be read is erased and transitioned to the low level, the NMOS transistor N520 is turned on and the sensing node transitions to the low level.

In this case, the sensing current flowing through the memory cell string may be controlled by adjusting the first voltage V1 and the second voltage V2 applied as the bit line selection signal.

That is, when the difference between the first voltage and the second voltage is reduced, the sensing current can be reduced. To this end, the first voltage may be decreased or applied, or the second voltage may be increased.

That is, in step 440 of FIG. 4, the sensing current is reduced by reducing the difference between the first voltage and the second voltage.

When the sensing current is reduced in this way, the threshold voltage is read low for cells programmed with a high threshold voltage according to the Y direction interference. That is, the sensing current flows smaller than the case where there is no Y-direction interference so that the reading is lower than the actual threshold voltage. Accordingly, the threshold voltage spreading effect due to the total Y direction interference is prevented.

In this case, in addition to the method of reducing the difference between the first voltage and the second voltage as a method of reducing the sensing current, it may be controlled by controlling the time the first voltage or the second voltage is applied.

That is, the sensing current may be reduced by reducing the time for applying the first voltage or decreasing or increasing the time for applying the second voltage.

Alternatively, the sensing current may be reduced by increasing the time for which the low level is maintained after the first voltage is applied until the second voltage is applied.

So far we have looked at how to control the sensing current.

Referring back to FIG. 4, a read operation is performed on the n th page according to the set sensing current (step 450).

That is, when the n + 1 th page is not programmed, the sensing current is not changed. When the n + 1 th page is programmed, the sensing current is decreased to perform a read operation based on the sensing current.

As a result, when reading the n th page, an appropriate sensing current flows according to whether the n + 1 th program is read, thereby reducing the distribution of the read cell.

That is, when the n + 1 th page is programmed, the sensing current is reduced so that the threshold voltages of the cells included in the n th page are read lower than the actual state.

1 is a diagram illustrating a distribution of threshold voltages in an MLC program of a conventional nonvolatile memory device.

2A to 2I are diagrams for describing an interference phenomenon that occurs during a program operation of a nonvolatile memory device.

3A and 3B are diagrams for describing an expansion phenomenon of a threshold voltage distribution generated during a read process of a nonvolatile memory device.

4 is a flowchart illustrating a reading method according to an embodiment of the present invention.

5A illustrates a nonvolatile memory device according to the present invention.

5B is a waveform diagram showing a voltage applied in a read operation applied to the present invention.

Claims (4)

Providing a first page for reading; Determining whether a program operation has been performed on a second page to be programmed after a first page; Reducing the difference between the first voltage and the second voltage applied as the bit line selection signal when the program operation is performed on the second page as a result of the determination; And reading a first page according to the set voltage. The method of claim 1, further comprising: maintaining a difference between the first voltage and the second voltage applied as the bit line selection signal when the program operation is not performed on the second page as a result of the determination. A method of reading a nonvolatile memory device. The method of claim 1, wherein reducing and setting the difference between the first voltage and the second voltage comprises reducing and setting the first voltage. The method of claim 1, wherein the step of reducing and setting the difference between the first voltage and the second voltage comprises increasing and setting the second voltage.

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