KR20090096215A - Method for manufacturing the semiconductor device - Google Patents

Abstract

A method for manufacturing a semiconductor device is provided to prevent photosensitive film residue due to a step height of a trench by forming a photosensitive film pattern on an insulating film. In a method for manufacturing a semiconductor device, a semiconductor substrate(200) is etched and a step height is formed. The nitride film(210) is deposited on the whole surface of the semiconductor substrate including the step height. A first insulating layer(220) is formed on the whole of the semiconductor substrate including the step height. The photosensitive pattern(230) is formed on the first top of an insulating layer. The first insulating layer is etched using the photosensitive pattern as a barrier.

Description

Method for manufacturing a semiconductor device {METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE}

The present invention relates to a method for manufacturing a semiconductor device. In particular, it relates to a method for forming a device isolation film of a semiconductor device.

As high speed and high integration of semiconductor devices progress, the necessity of miniaturization of a pattern becomes increasingly high, and the dimension of a pattern is also required for high precision. This also applies to the device isolation region that occupies a wide area in the semiconductor device.

Currently, a shallow trench isolation (STI) structure having a narrow width and excellent device isolation characteristics has been proposed, and a liner nitride layer (Liner Nitride) is applied to improve the refresh characteristics in device isolation of the STI structure.

In addition, in order to increase the operating current of the semiconductor device, a method of controlling the stress in the channel region by applying a mechanical stress to the device has been proposed. That is, when a constant stress is formed in the channel region, the mobility of carriers is affected. This characteristic is used to improve the operating current of the device. In particular, the mobility of the electron carriers in which the tensile stress is formed in the NMOS region is improved, and when the compressive stress is formed in the PMOS region, the mobility of the hole carriers is improved.

As described above, the semiconductor substrate is etched to form a trench, a sidewall oxide film and a liner nitride film are formed along the trench surface, and the trench in which the liner nitride film is formed is filled with the oxide film to form a device isolation film.

However, when the device isolation film is formed by the above method, there is a problem that the compressive stress applied to the semiconductor substrate from the device isolation film in the PMOS region is buffered by the liner nitride film. In addition, trap charge is formed at the interface between the sidewall oxide film and the liner nitride film, accumulating cations on the trench sidewalls, and there is a problem of deteriorating leakage current characteristics in the source / drain of the PMOS device.

In order to overcome the above problems, a method of selectively removing the liner nitride film formed in the device isolation film of the PMOS region has been proposed.

1A to 1D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

Referring to FIG. 1A, a pad oxide layer (not shown) and a pad nitride layer (not shown) are formed on the semiconductor substrate 100 on which the PMOS region and the NMOS region are defined, and the pad nitride layer (not shown) is formed. The semiconductor substrate 100 is etched using the barrier to form the trench 105. At this time, the trench 105 is etched to a depth of 2500 ~ 3500Å.

Next, a sidewall oxide film (not shown) and a liner nitride film 110 are deposited on the entire surface including the trench 105. In this case, the liner nitride layer 110 may be formed to prevent the damage of the substrate generated during the trench 105 etching process from being oxidized by a subsequent thermal process.

1B and 1C, a photoresist layer (not shown) is formed on the semiconductor substrate 100 on which the liner nitride layer 110 is deposited, and a photoresist layer pattern 120 is formed to open the PMOS region by performing an exposure and development process. ).

Next, the liner nitride film 110 of the PMOS region is selectively removed using the photoresist pattern 120 as a barrier.

At this time, the photoresist (not shown) is not completely exposed and developed due to the step by the trench 105, so that a photoresist residue is generated on the PMOS region, which is a liner with the photoresist pattern 120 as a barrier. In the process of removing the nitride film 110, the liner nitride film 110 may not be completely removed.

Referring to FIG. 1D, the trench 105 is filled with an oxide film to form an isolation layer 125.

In the above-described method for manufacturing a semiconductor device according to the related art, a photoresist film residue is generated on the PMOS region due to the step difference of the trench, which prevents the nitride film to be removed completely from the process of removing the liner nitride film. There is a problem of deteriorating characteristics.

The present invention forms a planarized insulating film by filling a trench, and forms a photosensitive film pattern on the insulating film, thereby preventing photoresist residue from occurring due to a step difference in the trench during exposure and development processes for forming the photosensitive film pattern. An object of the present invention is to provide a method for manufacturing a semiconductor device that prevents the photoresist film residue to completely remove the liner nitride film of the PMOS region in a subsequent process.

Method for manufacturing a semiconductor device according to the present invention

Etching the semiconductor substrate to form a step;

Depositing a nitride film on the entire surface of the semiconductor substrate including the step;

Forming a first insulating film over the entire semiconductor substrate including the step;

Forming a photoresist pattern on the first insulating layer;

Etching the first insulating layer using the photoresist pattern as a barrier;

Removing the nitride layer using the photoresist pattern and the etched first insulating layer as a barrier;

Removing the photoresist pattern;

And forming a second insulating film that is the same as the first insulating film over the entire surface including the etched first insulating film, and then planarizing the same.

The first insulating film is an oxide film,

The process of etching the first insulating film is performed by a wet process,

The process of removing the nitride film is characterized in that it proceeds dry.

In addition, a method of manufacturing a semiconductor device according to another embodiment of the present invention

Etching the semiconductor substrate defined by the NMOS region and the PMOS region to form a trench for device isolation;

Depositing a liner nitride film over the entire surface including the trench;

Forming a first oxide film over the entire semiconductor substrate on which the liner nitride film is deposited;

Forming a photoresist pattern on the first oxide layer to open a PMOS region;

Etching the first oxide film using the photoresist pattern as a barrier;

Removing the liner nitride layer using the photoresist pattern and the etched first oxide layer as a barrier;

Removing the photoresist pattern;

And depositing a second oxide film filling the trench to form an isolation layer.

The step of etching the first oxide film is to proceed in the wet,

The process of removing the liner nitride film is characterized in that it proceeds dry.

The method of manufacturing a semiconductor device according to the present invention includes forming a planarized insulating film by filling a trench, and forming a photosensitive film pattern on the insulating film, so that the photoresist film residue may be formed due to a step difference in the exposure and development process for forming the photosensitive film pattern. Can be prevented from occurring, and the photoresist resist can be prevented to completely remove the liner nitride film of the PMOS region in a subsequent process, thereby improving the characteristics of the device.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.

2A to 2F illustrate a method of manufacturing a semiconductor device according to the present invention.

Referring to FIG. 2A, a pad oxide layer (not shown) and a pad nitride layer (not shown) are formed on the semiconductor substrate 200 where the PMOS region and the NMOS region are defined.

Next, the semiconductor substrate 200 is etched using the pad nitride film (not shown) and the pad oxide film (not shown) to form a trench 205. At this time, the trench 205 is for forming a shallow trench isolation (STI) structure.

Next, a sidewall oxide film (not shown) and a liner nitride film 210 are deposited on the entire surface of the semiconductor substrate 200 including the trench 205.

Referring to FIG. 2B, the first insulating layer 220 is formed on the entire semiconductor substrate 200 on which the liner nitride layer 210 is deposited. In this case, the trench 205 may be completely filled in the first insulating layer 220 to remove the step due to the trench 205, and the first insulating layer 220 may be formed to planarize the region where the photoresist pattern is to be formed.

In addition, the first insulating layer 220 is preferably an oxide-based material used as an insulating material between the active regions.

Referring to FIG. 2C, a photosensitive film (not shown) is formed on the planarized first insulating film 220.

Next, an exposure and development process is performed on the photoresist (not shown) to form a photoresist pattern 230 that opens the PMOS region.

In this case, since the exposure and development processes are performed in a state where the photoresist film (not shown) is formed on the first insulating layer 220 in which the steps due to the trench 205 are buried, the exposure and development processes are not uniform due to the steps. In this case, the photoresist resist may be prevented from occurring on the PMOS region.

Referring to FIG. 2D, the first insulating layer 220 is etched using the photoresist pattern 230 as a barrier to expose the liner nitride layer 210 of the PMOS region.

In this case, the etching of the first insulating layer 220 proceeds to wet etching using an HF solution, which does not affect the photoresist pattern 230 and may remove only the first insulating layer 220.

Next, the liner nitride film 210 exposing the photoresist pattern 230 and the etched first insulating film 220 as a barrier is removed.

The liner nitride layer 210 to be removed is preferably a liner nitride layer 210 formed in the PMOS region, and the removal of the liner nitride layer 210 may be performed by dry etching.

Next, the photoresist pattern 230 is removed.

2E and 2F, a second insulating layer 225 having the same material as the etched first insulating layer 220 is further deposited on the entire portion including the etched first insulating layer 220.

Next, a CMP (Chemical Mechanical Polishing) process is performed until the pad nitride film (not shown) is exposed.

The pad nitride layer (not shown) and the pad oxide layer (not shown) are then removed to form the device isolation layer 235 having the trench 205 embedded therein.

After the trench 205 is formed as described above, the planarized insulating film 220 is formed on the entire upper portion of the trench 205 so that the step difference due to the trench 205 is removed, and the photoresist pattern 230 is formed on the planarized insulating film 220. As a result, generation of the photoresist resist due to the step may be prevented, and thus, the liner nitride film 210 of the PMOS region may be completely removed in a subsequent process.

1A to 1D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the prior art.

2A to 2F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with the present invention.

<Explanation of Signs of Major Parts of Drawings>

200 semiconductor substrate 205 trench

210: liner nitride film 220: first insulating film

230 photosensitive film pattern 225 second insulating film

235 device isolation layer

Claims (7)

Etching the semiconductor substrate to form a step; Depositing a nitride film on the entire surface of the semiconductor substrate including the step; Forming a first insulating film over the entire semiconductor substrate including the step; Forming a photoresist pattern on the first insulating layer; Etching the first insulating layer using the photoresist pattern as a barrier; Removing the nitride layer using the photoresist pattern and the etched first insulating layer as a barrier; Removing the photoresist pattern; And Forming a second insulating film that is the same as the first insulating film on the entire surface including the etched first insulating film, and then planarizing the same Method of manufacturing a semiconductor device comprising a. The method of claim 1, And the first insulating film is an oxide film. The method of claim 1, The process of etching the first insulating film is a manufacturing method of a semiconductor device, characterized in that to proceed in the wet (Wet) using HF solution. The method of claim 1, The process of removing the nitride film is a manufacturing method of a semiconductor device, characterized in that to proceed to dry (Dry). Etching the semiconductor substrate defined by the NMOS region and the PMOS region to form an isolation trench; Depositing a liner nitride film over the entire surface including the trench; Forming a first oxide film over the entire semiconductor substrate on which the liner nitride film is deposited; Forming a photoresist pattern on the first oxide layer to open a PMOS region; Etching the first oxide film using the photoresist pattern as a barrier; Removing the liner nitride layer using the photoresist pattern and the etched first oxide layer as a barrier; Removing the photoresist pattern; And Further depositing a second oxide film filling the trench to form an isolation layer; Method of manufacturing a semiconductor device comprising a. The method of claim 5, wherein And etching the first oxide film in a wet manner. The method of claim 5, wherein The process of removing the liner nitride film is a manufacturing method of a semiconductor device, characterized in that to proceed dry.

Images