KR20090090181A - Semiconductor device having contact plug and fabrication method thereof - Google Patents

Abstract

A semiconductor device having a contact plug and fabrication method thereof are provided to reduce the contact resistance between a contact plug and a support layer by reducing the inflow of oxygen into a support layer at the bottom of the contact hole. An insulating layer(103) comprises a contact hole(105) formed on a support layer(101), and a first contact plug(CP1) is formed in the inner wall and the bottom of the contact hole. A second contact plug is formed on the first contact plug, and the conductive layer is connected to the first contact plug and the second contact plug(110a). The first contact plug is made of an internal plug(109a) formed on the inner wall of the contact hole and the bottom plug(107a) formed at the bottom of the first contact plug.

Description

Semiconductor device having a contact plug and a method of manufacturing the same

The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device having a contact plug and a method for manufacturing the same.

In general, as the degree of integration of semiconductor devices increases, a conventional dielectric-insulator-silicon (MIS) capacitor has a low dielectric film formed between a dielectric film and a polysilicon film, thereby failing to obtain desired capacitance. Accordingly, there is a growing need for a metal-insulator-metal (MIM) capacitor that can replace the MIS capacitor.

In general, a MIM capacitor has a structure in which upper and lower electrodes are made of a metal film, and a dielectric film (insulating film) is positioned between the upper and lower electrodes. The MIM capacitor is formed on the contact plug on the silicon substrate. The contact plug is made of a TiN film. The contact plug serves to connect the MIM capacitor with the driving transistor in order to accumulate or discharge charge in the MIM capacitor.

However, the contact plug used to contact the MIM capacitor with the silicon substrate is oxidized when forming the lower electrode of the MIM capacitor, when forming a dielectric film or during heat treatment after the dielectric film is formed. If the contact plug is oxidized, the contact resistance between the MIM capacitor and the silicon substrate may increase, or even the MIM capacitor may not be electrically connected to the silicon substrate.

In particular, as the degree of integration of semiconductor devices increases, the size of the contact plug becomes smaller. Accordingly, the possibility of oxidation of the contact plug is very high, and the problem of the contact resistance described above has been greatly raised.

An object of the present invention is to provide a semiconductor device having a contact plug that can reduce the contact resistance.

In addition, another object of the present invention is to provide a method for manufacturing a semiconductor device that can obtain a contact plug that can reduce the contact resistance.

In order to solve the above problems, a semiconductor device according to an embodiment of the present invention is an insulating layer having a contact hole formed on a support layer, a first contact plug formed on the inner wall and the bottom of the contact hole, and filling the contact hole And a second contact plug formed on the first contact plug, and a conductive layer connected to the first contact plug and the second contact plug.

In the semiconductor device of the present invention, the bottom thickness of the first contact plug formed on the bottom of the contact hole is configured to be thicker than the inner wall thickness of the first contact plug formed on the inner wall of the contact hole. The first contact plug may include a bottom plug formed on the bottom of the contact hole and an inner plug formed on the inner wall of the bottom plug and the contact hole. The sum of the thickness of the bottom plug and the thickness of the inner plug formed on the bottom plug constitutes the bottom thickness of the first contact plug.

The thickness of the inner plug formed on the bottom plug and the thickness of the inner plug formed on the inner wall of the contact hole may be the same. The thickness of the inner plug formed on the bottom plug and the thickness of the inner plug formed on the inner wall of the contact hole may be different.

The first contact plug may be made of a high melting point metal film, and the second contact plug may be made of a precious metal film. The support layer may be a semiconductor substrate or a polysilicon layer.

In addition, the semiconductor device according to another embodiment of the present invention is formed on the first insulating layer having a first contact hole formed on the support layer, the inner wall and the bottom of the first contact hole, the thickness of the bottom is thicker than the inner wall of the first contact hole And a first contact plug formed and a second contact plug formed on the first contact plug while filling the first contact hole. On the first contact plug and the second contact plug, a second insulating layer having a second contact hole exposing the first contact plug and the second contact plug is formed. A lower electrode of the MIM capacitor formed of a metal layer thicker (higher) than the thickness of the second insulating layer is formed on the first contact plug and the second contact plug in the second contact hole. A dielectric layer of the MIM capacitor is formed on the lower electrode, and an upper electrode of the MIM capacitor composed of a metal layer is formed on the dielectric layer.

The first contact plug may include a bottom plug formed on the bottom of the first contact hole, and an inner plug formed on the bottom plug and an inner wall of the first contact hole. The thickness of the inner plug formed on the bottom plug and the thickness of the inner plug formed on the inner wall of the first contact hole may be the same or different. The thickness of the first contact plug formed at the bottom of the contact hole may be 100 to 500 kPa.

The lower electrode and the upper electrode may be composed of a noble metal film, a noble metal conductive oxide film, or a conductive oxide film having a perovskite structure, and the dielectric layer may be formed of a unique electrode film having a perovskite structure.

In order to achieve the above technical problem, a method of manufacturing a semiconductor device of the present invention includes forming an insulating layer having a contact hole on a support layer, and forming a bottom plug at the bottom of the contact hole. An inner wall plug is formed on the inner wall of the bottom plug and the contact hole to form a first contact plug including a bottom plug and an inner wall plug having a thicker thickness than the inner wall of the contact hole. A second contact plug is formed on the first contact plug while filling the contact hole.

The bottom plug may be formed by forming a high melting point metal film embedded in the contact hole and then partially etching the high melting point metal film embedded in the contact hole. The inner wall plug may be formed to have a uniform thickness or a non-uniform thickness on the inner wall of the contact hole. At the bottom of the contact hole, the thickness of the first contact plug may be 100 to 500 mm.

After forming the second contact plug, a second insulating layer having a second contact hole exposing the first contact plug and the second contact plug on the first contact plug and the second contact plug is formed, and the second contact hole is formed. Forming a lower electrode of the MIM capacitor consisting of a metal layer thicker than the thickness of the second insulating layer on the first contact plug and the second contact plug therein, forming a dielectric layer of the MIM capacitor on the lower electrode, and consisting of a metal layer on the dielectric layer The method may further include forming an upper electrode of the MIM capacitor.

The semiconductor device of the present invention configures the bottom thickness of the first contact plug formed on the bottom of the contact hole to be larger than the inner wall thickness of the first contact plug formed on the inner wall of the contact hole. In this case, since the semiconductor device of the present invention can reduce the inflow of oxygen contained in the conductive layer, for example, the electrode of the MIM capacitor, or oxygen used during the deposition or annealing of the dielectric layer to the support layer under the first contact hole, 1 The contact resistance between the contact plug and the support layer can be significantly lowered.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention illustrated in the following may be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below, but may be implemented in various different forms. The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. In the following figures, like reference numerals refer to like elements.

In the semiconductor device of the present invention, a thin first contact plug is formed in a contact hole exposing a support layer, for example, a semiconductor substrate or a polysilicon layer, and a thin first contact plug is formed, and the precious metal film is formed on the first contact plug while the contact hole is buried. 2 Contact plugs are formed to form contact plugs. In particular, the semiconductor device of the present invention comprises a second contact plug embedded in the contact hole with a noble metal film such as Pt, Ru or Ir. Such a contact plug can reduce the inflow of oxygen from the electrode of the MIM capacitor composed of a conductive layer such as a noble metal film, a noble metal conductive oxide film, or a conductive oxide film having a perovskite structure to the first contact plug, thereby oxidizing the first contact plug. Can be reduced.

In addition, the semiconductor device of the present invention thickens the thickness of the first contact plug formed at the bottom of the contact hole and composed of a high melting point metal film, and inserts the second contact plug into the noble metal film on the first contact plug while the contact hole is buried. To form a contact plug. Such a contact plug can reduce the oxygen inflow from the electrode of the conductive layer, such as the MIM capacitor, into the first contact plug, further reducing the oxidation of the first contact plug.

As a result, the semiconductor device of the present invention can reduce the contact resistance between the first contact plug and the support layer. Embodiments of the semiconductor device of the present invention having such a concept will be described in more detail below.

1 is a cross-sectional view of a semiconductor device having a contact plug according to a first embodiment of the present invention.

In detail, an insulating layer 103 having a first contact hole 105 exposing a portion of the supporting layer 101 is formed on the supporting layer 101. The support layer 101 may be a semiconductor substrate, such as a silicon substrate, or may be a polysilicon layer. When the support layer 101 is a semiconductor substrate, an impurity region (not shown) may be formed under the first contact hole 103. The first insulating layer 103 is composed of a silicon oxide film.

First contact plugs CP1 are formed on inner walls and bottoms of the first contact holes 105. The first contact plug CP1 is an embedded contact plug embedded in the first contact hole 105. A portion of the first contact hole 105 is filled with the first contact plug CP1. The reason for forming the first contact plug CP1 on the inner wall and the bottom of the first contact hole 105 is to improve the contact with the second contact plug 110a formed later and to improve the contact resistance. To lower it.

The first contact plug CP1 includes a bottom plug 107a formed at the bottom of the first contact hole 105 and an inner plug 109a formed on the inner wall of the bottom plug 107a and the first contact hole 105. Is done. The thickness d4 of the inner plug 109a formed on the bottom plug 107a and the thickness d2 of the inner plug 109a formed on the inner wall of the first contact hole 105 may be the same as illustrated in FIG. 1. have. Of course, the thickness d4 of the inner plug 109a formed on the bottom plug 107a and the thickness d2 of the inner plug 109a formed on the inner wall of the first contact hole 105 may be different from each other.

The first contact plug CP1, that is, the bottom plug 107a and the inner plug 109a is formed of a high melting point metal film. The high melting point metal film constituting the first contact plug CP1 is composed of a W film, a WN film, a Ti film, a TiN film, a TiAlN film, a TiSiN film, a Ta film, a TaN film, a TaAlN film, or a TaSiN film.

The sum of the thickness d3 of the bottom plug 107a and the thickness d4 of the inner plug 109a formed on the bottom plug 107a is the bottom thickness d1 of the first contact plug CP1. Accordingly, the bottom thickness d1 of the first contact plug CP1 formed on the bottom of the first contact hole 105 is the inner wall thickness d2 of the first contact plug CP1 formed on the inner wall of the contact hole 105. Configure larger than). In other words, the bottom thickness d1 of the first contact plug CP1 is larger than the inner wall thickness d2 of the first contact plug CP1.

Thus, the bottom thickness d1 of the first contact plug CP1 formed on the bottom of the first contact hole 105 is greater than the inner wall thickness d2 of the first contact plug CP1 formed on the inner wall of the contact hole 105. In the case of the large configuration, it is possible to greatly reduce the inflow of oxygen included in the conductive layer, that is, the metal layer, or the oxygen used during the deposition or annealing of the dielectric layer into the support layer 101 under the first contact hole 105, thereby increasing the amount of the first contact. The contact resistance between the plug CP1 and the support layer 101 can be significantly lowered.

In particular, the bottom thickness d1 of the first contact plug CP1 is formed to a thickness of 100 kPa or more, preferably 100 to 500 kPa. For example, the bottom plug 107a is formed to a thickness of 50 to 400 kPa, and the inner wall plug 109a is formed to be 50 to 100 kPa. In this case, as mentioned above, the inflow of oxygen into the support layer 101 under the first contact hole 105 may be greatly reduced, thereby greatly reducing the contact resistance between the first contact plug CP1 and the support layer 101. Can be.

Of course, even when the bottom thickness of the first contact plug CP1 and the inner wall thickness of the first contact plug CP1 are configured to be the same, oxygen inflow into the first contact plug CP1 can be prevented, but in a highly integrated semiconductor device, When the diameter of the hole 105 is small, when the bottom thickness d1 of the first contact plug CP1 is lower than an appropriate thickness, for example, 100 kPa, the possibility of oxidation of the first contact plug CP1 may increase.

The second contact plugs 110a and CP2 are formed on the first contact plug CP1, that is, the internal plug 109a while filling the first contact hole 105. The second contact plugs 110a and CP2 are buried contact plugs embedded in the first contact hole 105. The second contact plugs 110a and CP2 are made of a precious metal film. The precious metal film constituting the second contact plugs 110a and CP2 is Pt, Ru or Ir.

A second having a second contact hole 116 exposing the first contact plug CP1 and the second contact plug 110a, CP2 on the first contact plug CP1 and the second contact plug 110a, CP2. The insulating layer 114 is formed. The second insulating layer 111a is formed of an etch stop pattern. The second insulating layer 111a protects the first insulating layer 103 in the capacitor manufacturing process.

The lower electrode 117a of the MIM capacitor formed on the first contact plug CP1 and the second contact plugs 110a and CP2 in the second contact hole 116 to be thicker than the thickness of the second insulating layer 114 and formed of a metal layer. ) Is formed. The lower electrode 117a is configured in a stack type. The lower electrode 117a is composed of a noble metal film, a noble metal conductive oxide film, or a conductive oxide film having a perovskite structure. Film noble metal constituting the lower electrode (117a) Pt, Ru or Ir, and the noble metal conductive oxide is PtO, and RuO ₂ or IrO _2, Fe conductive oxide of perovskite structure, _{SrRuO 3, BaRuO 3, CaRuO 3} , (Ba , Sr) RuO ₃ or La (Sr, Co) O ₃ .

The dielectric layer 121 of the MIM capacitor is formed on the lower electrode 117a. That is, the dielectric layer 121 is formed to cover the lower electrode 117a as a whole. The dielectric layer 121 is composed of a high dielectric film having a perovskite structure. The dielectric layer 121 may include (Ba, Sr) TiO ₃ , SrTiO ₃ , BaTiO ₃ , Ba (Zr, Ti) O ₃ , Sr (Zr, Ti) O ₃ , Pb (Zr, Ti) O ₃ or (Pb, La ) (Zr, Ti) O ₃ .

The upper electrode 123 of the MIM capacitor including the metal layer is formed on the dielectric layer 121. The upper electrode 123 is made of the same material as the lower electrode 117a. As a result, the MIM capacitor is composed of the lower electrode 117a, the dielectric film 121, and the upper electrode 123. The first contact plug CP1 and the second contact plugs 110a and CP2 connect the MIM capacitor with a driving transistor (not shown) in order to accumulate or discharge charges in the MIM capacitor.

2 is a cross-sectional view of a semiconductor device having a contact plug according to a second embodiment of the present invention.

Specifically, in Fig. 2, the same reference numerals as in Fig. 1 denote the same members. The semiconductor device according to the second embodiment of the present invention of FIG. 2 is the same as the semiconductor device according to the first embodiment of FIG. 1 except that the lower electrode 117b of the capacitor is formed in a cylindrical shape. In this way, when the lower electrode 117b of the capacitor is cylindrical, the capacitance can be improved.

3 to 11 are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention shown in FIG. 1.

Referring to FIG. 3, a first insulating layer 103 is formed on a support layer 101, for example, a semiconductor substrate or a polysilicon layer. The first insulating layer 103 is formed using a silicon oxide film. Subsequently, the first insulating layer 103 is patterned using a photolithography process to form a first contact hole 105 exposing a part of the support layer 101.

Referring to FIG. 4, a first metal layer 107 for contact plugs is formed to fill the first contact hole 105. The first metal layer 107 may be formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD). The first metal layer 107 is preferably formed by an ALD method or a CVD method having good step coverage. The first metal layer 107 for the contact plug forms a high melting point metal layer on the entire surface of the support layer 101 to fill the first contact hole 105, and then the first contact hole 105 through a chemical mechanical polishing process or an etching process. Form only).

As described above, the first metal layer 107 is formed of a high melting point metal film such as a W film, a WN film, a Ti film, a TiN film, a TiAlN film, a TiSiN film, a Ta film, a TaN film, a TaAlN film, or a TaSiN film. The first metal layer 107 may be formed of a single film of the above-described film quality, or may be formed of a composite film of the above-described film quality.

Referring to FIG. 5, the first metal layer 107 for the contact plug is etched by dry or wet etching to form a bottom plug 107a at a predetermined thickness d3 on the bottom of the first contact hole 105. The bottom plug 107a also constitutes the first contact plugs CP1 and 110a as described above. The thickness d3 of the bottom plug 107a is formed between 50 kPa and 400 kPa, preferably 150 kPa.

Referring to FIG. 6, a second metal layer 109 for contact plugs is formed on the inner wall of the first contact hole 105 and the first insulating layer 103 on the bottom plug 107a. The second metal layer 109 is formed to a thickness of 50 kPa to 100 kPa. The second metal layer 109 may be formed by the ALD method, the CVD method, or the PVD method. The second metal layer 109 is preferably formed by an ALD method or a CVD method with good step coverage.

In the case where the second metal layer 109 is formed in a method having good step coverage, the second metal layer 109 formed on the inner wall and the bottom plug 107a of the first contact hole 105 as shown in FIG. 6. The thickness of the same is configured. However, when the step coverage is not good, the thickness of the second metal layer 109 formed on the inner wall of the first contact hole 105 and the bottom plug 107a may not be the same. In any case, a thick first contact plug CP1 is formed on the bottom plug 107a due to the formation of the second metal layer 109.

As described above, the second metal layer 109 is formed of a high melting point metal layer, for example, a W film, a WN film, a Ti film, a TiN film, a TiAlN film, a TiSiN film, a Ta film, a TaN film, a TaAlN film, or a TaSiN film. The second metal layer 109 may be formed of a single film of the above-described film quality, or may be formed of the composite film of the above-described film quality.

Subsequently, the third metal layer 110 for the second contact plug is formed on the second metal layer 109 for the contact plug to fill the first contact hole 105. Since the bottom plug 107a and the second metal layer 109 are formed in the first contact hole 105, the third metal layer 110 may easily fill the second contact hole 105. The third metal layer 110 is formed to a thickness of 50 kPa to 500 kPa. The third metal layer 110 may be formed by an ALD method, a CVD method, or a PVD method. As described above, the third metal layer 110 for the second contact plug is formed of a noble metal film such as Pt, Ru, or Ir. The third metal layer 110 may be formed of a single layer of the above-described film quality, or may be formed of the composite film of the above-described film quality.

Referring to FIG. 7, the third metal layer 110 and the second metal layer 109 are etched to expose the surface of the first insulating layer 103. That is, the third metal layer 110 and the second metal layer 109 on the first insulating layer 103 are etched. Accordingly, the inner wall plug 109a formed of the second metal layer 109 is formed on the inner wall of the bottom plug 107a and the first contact hole 105. The bottom plug 107a and the inner wall plug 109a constitute the first contact plug CP1. The second contact plug CP2 formed of the third metal layer 110a is formed while filling the first contact hole 105 on the inner wall plug 109a.

Referring to FIG. 8, an etch stop layer 111 is formed on the first contact plug CP1, the second contact plug CP2, and the first insulating layer 103. The etch stop layer 111 is formed to protect the first insulating layer 103. The etch stop layer 111 is formed using a silicon nitride film, a tantalum oxide film, or a combination thereof.

The mold layer 115 is formed on the etch stop layer 111. The mold layer 115 is formed using a silicon oxide film. The mold layer 115 is formed to help the bottom electrode of the subsequent MIM capacitor be formed stably.

Referring to FIG. 9, the mold layer 115 and the etch stop layer 111 are patterned to form second contact holes 116 on tops of the first contact plugs CP1 and the second contact plugs CP2 and 110a. . When the second contact hole 116 is formed, the mold layer 115 is etched using the etch stop layer 111 as an etch stop layer, and then the etch stop layer 111 is etched again. In this case, the second insulating layer 111a and the mold layer pattern 115a are formed on the first insulating layer 103.

Referring to FIG. 10, the lower electrode 117a of the MIM capacitor is formed on the first contact plug CP1 and the second contact plug 110a in the second contact hole 116. The lower electrode 117a sufficiently fills the lower electrode metal layer in the second contact hole 116 on the first contact plug CP1 and the second contact plug 110a, and then performs a chemical mechanical polishing method or a dry etching method. . Accordingly, the lower electrode 117a is formed only in the second contact hole 116, and the lower electrode 117a is formed thicker than the thickness of the second insulating layer 111a.

As described above, the lower electrode 117a includes a noble metal film, a noble metal conductive oxide film, or a conductive oxide film having a perovskite structure. Film noble metal constituting the lower electrode (117a) Pt, Ru or Ir, and the noble metal conductive oxide is PtO, and RuO ₂ or IrO _2, Fe conductive oxide of perovskite structure, _{SrRuO 3, BaRuO 3, CaRuO 3} , (Ba , Sr) RuO ₃ or La (Sr, Co) O ₃ .

Referring to FIG. 11, the mold layer pattern 115a is removed by wet etching using the second insulating layer 111a as an etch stop layer. The wet etching of the mold layer pattern 115a is performed for several tens to hundreds of seconds using an oxide etching solution, for example, a buffered oxide etchant (BOE).

Subsequently, as shown in FIG. 1, the dielectric layer 121 is formed on the entire surface of the support layer 101 on which the stacked bottom electrode 117a is formed. The dielectric layer 121 may include (Ba, Sr) TiO ₃ , SrTiO ₃ , BaTiO ₃ , Ba (Zr, Ti) O ₃ , Sr (Zr, Ti) O ₃ , Pb (Zr, Ti) O ₃ or (Pb, La (Zr, Ti) O ₃ .

Next, the upper electrode 123 is formed of a metal film on the dielectric layer 121 to complete a semiconductor device having a MIM capacitor. The upper electrode is formed of the same film quality as the lower electrode.

12 is a cross-sectional view of a semiconductor device of a comparative example for comparison with the present invention of FIG. 1.

Specifically, in FIG. 12, the same reference numerals as used in FIG. 1 denote the same members. The semiconductor device of the comparative example of FIG. 12 is configured almost the same as that of FIG. 1, except that the contact plug 15 is formed of a titanium nitride film TiN or a tungsten film W, and the lower electrode 117a and the upper electrode 123 are formed. Was composed of a ruthenium film.

13 and 14 are diagrams for comparing the contact resistance of the semiconductor device of the present invention shown in Figure 1 and the semiconductor device of the comparative example of FIG.

Specifically, in FIGS. 13 and 14, the X axis represents contact resistance and the Y axis represents distribution of contact resistance on one wafer. 13 and 14, in the semiconductor device of the present invention, the first contact plug CP1 is formed of a titanium nitride film TiN, and the second contact plugs 110a and CP2 are formed of a ruthenium film Ru. .

The contact resistance of the semiconductor device of the comparative example, that is, the contact resistance between the semiconductor substrate, which is the support layer 101, and the contact plug 15, is about 10 ⁶ ohms in the case of tungsten plug-in (e) as shown in FIGS. 13 and 14, and the titanium nitride film In the case of the plug-in (d) 10 ⁹ ohms is formed very high. This may be interpreted as that the contact plug 15 is oxidized by oxygen introduced during lower electrode deposition or subsequent heat treatment of the dielectric layer, for example, during high temperature heat treatment of 500 to 600 ° C. As such, when the contact resistance is large, the operation of the semiconductor device may be adversely affected or even the semiconductor device may not operate.

On the contrary, it can be seen that the contact resistance of the semiconductor device of the present invention shown in FIG. 1, that is, the contact resistance f between the support layer and the contact plug, is as low as several tens of ohms as shown in FIG. According to the present invention, the first contact plug CP1 is thinly formed on the inner wall and the bottom of the contact hole 105, and the first contact plug CP1 and the first contact plug CP2 are filled by filling the inside of the contact hole 105 with the second contact plug CP2. It is interpreted that this is because the oxygen introduced from the electrode is effectively dispersed by widening the contact area between the two contact plugs VP2. In addition, the reason why the contact resistance of the semiconductor device of the present invention is low may be interpreted as preventing the inflow of oxygen from the electrode to the first contact plug CP1 due to the above structural factors.

In addition, when employing the semiconductor device of the present invention, as shown in FIG. 14, it can be seen that the contact resistance also varies depending on the bottom thickness d1 of the first contact plug CP1. That is, reference numeral b of FIG. 14 indicates that the contact resistance increases when the bottom thickness d1 of the first contact plug CP1 is lower than 100 μs, and the first contact is indicated by reference numeral c. It can be seen that the contact resistance is low when the bottom thickness d1 of the plug CP1 is 350 kPa, which is larger than 100 kPa.

1 is a cross-sectional view of a semiconductor device having a contact plug according to a first embodiment of the present invention.

2 is a cross-sectional view of a semiconductor device having a contact plug according to a second embodiment of the present invention.

3 to 11 are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with a first embodiment of the present invention shown in FIG. 1.

12 is a cross-sectional view of a semiconductor device of a comparative example for comparison with the present invention of FIG. 1.

13 and 14 are diagrams for comparing the contact resistance of the semiconductor device of the present invention shown in Figure 1 and the semiconductor device of the comparative example of FIG.

Claims (20)

An insulating layer having a contact hole formed on the support layer; First contact plugs formed on inner walls and bottoms of the contact holes; A second contact plug formed on the first contact plug while filling the contact hole; And It comprises a conductive layer connected to the first contact plug and the second contact plug, And a bottom thickness of the first contact plug formed at the bottom of the contact hole is thicker than an inner wall thickness of the first contact plug formed on the inner wall of the contact hole. The semiconductor device of claim 1, wherein the first contact plug comprises a bottom plug formed on a bottom of the contact hole, and an inner plug formed on an inner wall of the bottom plug and the contact hole. The semiconductor device of claim 2, wherein the sum of the thickness of the bottom plug and the thickness of the inner plug formed on the bottom plug is the bottom thickness of the first contact plug. The semiconductor device of claim 2, wherein the thickness of the inner plug formed on the bottom plug and the thickness of the inner plug formed on the inner wall of the contact hole are the same or different. The semiconductor device of claim 2, wherein a thickness of the bottom plug formed at the bottom of the contact hole is 50 to 400 kPa, and a thickness of the internal plug formed at the bottom of the contact hole is 50 to 100 kPa. The semiconductor device of claim 1, wherein a thickness of the first contact plug formed at the bottom of the contact hole is in a range of 100 to 500 kPa. The semiconductor device according to claim 1, wherein the first contact plug is made of a high melting point metal film, and the second contact plug is made of a noble metal film. The high melting point metal film constituting the first contact plug is a W film, a WN film, a Ti film, a TiN film, a TiAlN film, a TiSiN film, a Ta film, a TaN film, a TaAlN film, or a TaSiN film. The precious metal film constituting the second contact plug is Pt, Ru, or Ir. The semiconductor device according to claim 1, wherein the support layer is a semiconductor substrate or a polysilicon layer. A first insulating layer having a first contact hole formed on the support layer; A first contact plug formed on an inner wall and a bottom of the first contact hole and having a bottom thickness thicker than an inner wall of the first contact hole; A second contact plug formed on the first contact plug while filling the first contact hole; A second insulating layer having a second contact hole exposing the first contact plug and the second contact plug on the first contact plug and the second contact plug; A lower electrode of the MIM capacitor formed on the first contact plug and the second contact plug in the second contact hole thicker than the thickness of the second insulating layer and formed of a metal layer; A dielectric layer of the MIM capacitor formed on the lower electrode; And And an upper electrode of the MIM capacitor composed of a metal layer on the dielectric layer. The semiconductor device of claim 10, wherein the first contact plug comprises a bottom plug formed on a bottom of the first contact hole, and an inner plug formed on an inner wall of the bottom plug and the first contact hole. The semiconductor device of claim 11, wherein a thickness of the inner plug formed on the bottom plug and a thickness of the inner plug formed on an inner wall of the first contact hole are the same or different. The method of claim 10, wherein the first contact plug is a high melting point metal film made of a W film, a WN film, a Ti film, a TiN film, a TiAlN film, a TiSiN film, a Ta film, a TaN film, a TaAlN film, or a TaSiN film. And the second contact plug is a noble metal film made of Pt, Ru, or Ir. The method of claim 10, wherein the lower electrode and the upper electrode is composed of a noble metal film, a noble metal conductive oxide film, or a conductive oxide film having a perovskite structure, and the dielectric layer is composed of a high dielectric film having a perovskite structure Semiconductor device. 15. The method of claim 14, wherein a noble metal film is Pt, Ru or Ir, and said noble metal conductive oxide is PtO, RuO ₂ or IrO _2, the conductive oxide of the perovskite structure is _{SrRuO 3, BaRuO 3, CaRuO 3} , ( Ba, Sr) RuO ₃ or La (Sr, Co) O ₃ , and the dielectric layer is (Ba, Sr) TiO ₃ , SrTiO ₃ , BaTiO ₃ , Ba (Zr, Ti) O ₃ , Sr (Zr, Ti) O ₃ And Pb (Zr, Ti) O ₃ or (Pb, La) (Zr, Ti) O ₃ . Forming an insulating layer having a contact hole on the support layer; Forming a bottom plug on a bottom of the contact hole; Forming an inner wall plug on the inner wall of the bottom plug and the contact hole to form a first contact plug including the bottom plug and the inner wall plug having a thickness greater than that of the inner wall of the contact hole; And And forming a second contact plug on the first contact plug while filling the contact hole. The method of claim 16, wherein the bottom plug is formed by forming a high melting point metal film embedded in the contact hole and partially etching the high melting point metal film embedded in the contact hole. The method of claim 16, wherein the inner wall plug is formed on the inner wall of the contact hole to have a uniform thickness or a non-uniform thickness. The method of claim 16, wherein a thickness of the first contact plug is formed at a bottom of the contact hole in a range of 100 to 500 μm. 17. The method of claim 16, After forming the second contact plug, the second insulation having a second contact hole exposing the first contact plug and the second contact plug on the first contact plug and the second contact plug. Forming a layer, Forming a lower electrode of the MIM capacitor formed of a metal layer on the first contact plug and the second contact plug in the second contact hole, the metal layer being thicker than the thickness of the second insulating layer; Forming a dielectric layer of a MIM capacitor on the lower electrode; And forming an upper electrode of a MIM capacitor composed of a metal layer on the dielectric layer.

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