KR20090083793A - Plasma display apparatus - Google Patents

Abstract

A plasma display apparatus is provided to stabilize the address discharge by removing the drive noise. The plasma display apparatus comprises the plasma display panel and the scan driver. The plasma display panel has 2n-1 and 2n number scan electrodes. The scan driver supplies the first and second drive pulses to the plasma display panel. The scan driver has the first switch(211), the second switch(212) and a standard dividing control part(500). The first switch supplies the first drive pulse to the 2n-1 number scan electrode. The second switch supplies the second driver pulse to the 2n number scan electrode. The standard dividing control part connects and separates the first and second voltage reference sources. The first voltage reference source electrically connects with the first switch. The second voltage reference source electrically connects with the second switch.

Description

Plasma Display Apparatus {Plasma Display Apparatus}

The present invention relates to a plasma display device.

In general, a plasma display panel is a partition wall formed between a front panel and a rear panel to form a unit discharge cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He). An inert gas containing a main discharge gas such as and a small amount of xenon is filled. A plurality of unit discharge cells described above are gathered to form one pixel. For example, a red (R) cell, a green (G) cell, and a blue (B) cell may form one pixel. When a high frequency voltage is supplied to such a unit discharge cell to discharge, an inert gas generates vacuum ultra violet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

A plurality of electrodes, for example, a scan electrode (Y), a sustain electrode (Z), an address electrode (X), and a driver for driving the electrodes are attached to the plasma display panel to form a plasma display apparatus.

It is an object of the present invention to provide a plasma display device capable of stabilizing address discharge by preventing address margins from decreasing.

The technical problem of the present invention is not limited to the above-mentioned thing, and another technical problem to be achieved by the present invention will be clearly understood by those skilled in the art by the effect of the configuration of the present invention.

In accordance with an aspect of the present invention, a plasma display device includes a plasma display panel and a plasma display panel including a 2n-1 th scan electrode and a 2n th scan electrode. A scan driver configured to supply the scan driver, wherein the scan driver is configured to control the first driving pulse to be supplied to the 2n-th scan electrode, and a second to control the second driving pulse to be supplied to the 2n-th scan electrode And a reference separation controller configured to control the switch unit and the first reference voltage source electrically connected to the first switch unit and the second reference voltage source electrically connected to the second switch unit to be separated or connected.

As described above in detail, the plasma display apparatus according to the exemplary embodiment of the present invention has an effect of stabilizing address discharge by removing driving noise.

In addition, the plasma display device according to an embodiment of the present invention has an effect of increasing brightness and efficiency.

Hereinafter, a plasma display device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates a plasma display device according to an embodiment of the present invention.

1, a plasma display device according to an embodiment of the present invention includes a plasma display panel 100 including an electrode and a driving unit. In addition, the driver includes a scan driver 200, a sustain driver 300, and a data driver 400.

First, the plasma display panel 100 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and scan electrodes Y1 to Yn, sustain electrodes Z1 to Zn, and address electrodes X1. To Xm).

The scan driver 200 supplies the first driving pulse and the second driving pulse to the plasma display panel 100. Although not shown in FIG. 1, the scan driver 200 may include a first switch unit and a 2nth scan electrode Y2 to Y2n to control the first driving pulse to be supplied to the 2n−1th scan electrodes Y1 to Y2n−1. A reference separation controller for controlling a second switch unit controlling the second driving pulse to be supplied; and a first reference voltage source electrically connected to the first switch unit and a second reference voltage source electrically connected to the second switch unit It includes.

The first driving pulse and the second driving pulse include a reset pulse, a scan pulse, a sustain pulse, and the like.

Accordingly, the scan driver 200 supplies a reset pulse to the scan electrodes Y1 to Yn to uniformly form wall charges in the discharge cells in the reset period, and selects the discharge cells in which the discharge will occur in the address period. The scan pulse is supplied. Thereafter, a sustain pulse for generating sustain discharge in the selected discharge cell in the sustain period is supplied to the scan electrodes Y1 to Yn.

The sustain driver 300 supplies the sustain bias voltages to the sustain electrodes Z1 through Zn during the set down period and the address period, and supplies the sustain pulses to the sustain electrodes Z1 through Zn during the sustain period.

In the data driver 400, inverse gamma correction and error diffusion are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield is supplied by a subfield mapping circuit.

In addition, the data driver 400 supplies data pulses to the address electrodes X1 to Xm during the address period in correspondence with the scan electrodes Y1 to Yn in response to a data timing control signal from a timing controller (not shown).

The structure of the plasma display panel included in the plasma display apparatus is as follows.

2 illustrates a structure of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 2, a plasma display panel according to an embodiment of the present invention includes a front panel 110 including a front substrate 111 on which a scan electrode 112 and a sustain electrode 113 are formed, and the scan electrode described above. The rear panel 120 including the rear substrate 121 on which the address electrode 123 intersects the 112 and the sustain electrode 113 is formed is bonded to each other at a predetermined interval.

Here, the scan electrode 112 and the sustain electrode 113 formed on the front substrate 111 are formed in parallel with each other to generate a discharge in the discharge cell and maintain the discharge of the discharge cell.

The scan electrode 112 and the sustain electrode 113 formed on the front substrate 111 emit light generated in the discharge cell to the outside, and it is necessary to consider light transmittance and electrical conductivity in order to secure driving efficiency. Accordingly, each of the scan electrode 112 and the sustain electrode 113 may include bus electrodes 112b and 113b made of metal such as silver and transparent electrodes 112a and indium tin oxide (ITO). 113a).

An upper dielectric layer 114 may be formed on the front substrate 111 on which the scan electrode 112 and the sustain electrode 113 are formed to cover the scan electrode 112 and the sustain electrode 113.

The upper dielectric layer 114 limits the discharge current of the scan electrode 112 and the sustain electrode 113 and insulates the scan electrode 112 and the sustain electrode 113.

A protective layer 115 may be formed on the upper dielectric layer 114 to facilitate discharge conditions. The protective layer 115 may be made of magnesium oxide (MgO) having a high secondary electron emission coefficient.

On the other hand, the address electrode 123 formed on the rear substrate 121 is an electrode for supplying a data pulse to the discharge cell.

The lower dielectric layer 125 may be formed on the rear substrate 121 on which the address electrode 123 is formed to cover the address electrode 123.

A partition wall 122 is formed on the lower dielectric layer 125 to partition a discharge cell which is a discharge space. In the discharge cells partitioned by the partition wall 122, a phosphor layer 124 is formed that emits visible light for image display during address discharge. For example, red (R), green (G), and blue (B) phosphor layers may be formed.

In the plasma display panel according to the exemplary embodiment described above, when a driving pulse is supplied to the scan electrode 112, the sustain electrode 113, and the address electrode 123, the plasma display panel may be disposed in the discharge cell partitioned by the partition wall 122. Discharge occurs in the image to realize the image.

In FIG. 2, only the plasma display panel according to the exemplary embodiment is illustrated and described, but it is not limited thereto.

The operation of the plasma display apparatus according to the exemplary embodiment of the present invention including the plasma display panel will be described with reference to FIGS. 3 to 4.

3 is a view for explaining a frame for implementing a gradation level in a method of driving a plasma display panel according to an embodiment of the present invention.

4 is a view for explaining the operation of the plasma display panel driving method according to an embodiment of the present invention.

First, referring to FIG. 3, a frame for implementing gray levels in a plasma display driving apparatus according to an exemplary embodiment of the present invention is divided into several subfields having different emission counts.

Although not shown, each subfield may further include a reset period for initializing all discharge cells, an address period for selecting discharge cells to be discharged, and a sustain period for implementing gray levels according to the number of discharges. Sustain Period).

For example, when displaying an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8, for example, as shown in FIG. Each of the subfields SF1 to SF8 is divided into a reset period, an address period, and a sustain period.

Meanwhile, the gray scale weight of the corresponding subfield may be set by adjusting the number of sustain pulses supplied in the sustain period. In other words, a predetermined gray scale weight can be given to each subfield using the sustain period. For example, the gray scale weight of each subfield is 2 ⁿ by setting the gray scale weight of the first subfield to 2 ⁰ and the gray scale weight of the second subfield to 2 ¹ (where n = 0, 1). , Gray scale weight of each subfield may be determined to increase at a ratio of 2, 3, 4, 5, 6, and 7). As such, by adjusting the number of sustain pulses supplied in the sustain period of each subfield according to the gray scale weight in each subfield, various gray levels are implemented.

The plasma display device according to an embodiment of the present invention uses a plurality of frames to display an image of 1 second. For example, 60 frames are used to display an image of 1 second.

In FIG. 3, only one frame is composed of eight subfields. However, the number of subfields forming one frame may be variously changed. For example, one frame may be configured with 12 subfields from the first subfield to the twelfth subfield, or one frame may be configured with 10 subfields.

The image quality of the image implemented by the plasma display apparatus implementing the gray level may be determined according to the number of subfields included in the frame.

That is, when 12 subfields are included in a frame, 2 to ¹² gradation levels can be expressed. When 10 subfields are included in a frame, 2 to ¹⁰ gradation levels can be realized.

In addition, in FIG. 3, the subfields are arranged in the order of increasing magnitude of the gray scale weight in one frame. Alternatively, the subfields may be arranged in the order of decreasing gray scale weight in one frame. The subfields may be arranged irrespective of the gray scale weight to prevent the occurrence of contour noise that appears when displaying.

Next, referring to FIG. 4, the operation of the plasma display apparatus according to an exemplary embodiment of the present invention shown in any one sub-field of a plurality of subfields included in the same frame as in FIG. 3 is described. Each of the scan driver 200, the sustain driver 300, and the data driver 400 described above with reference to FIG. 1 includes the scan electrode Y and the sustain electrode Z in at least one of a reset period, an address period, and a sustain period. And a first driving pulse or a second driving pulse to the address electrode X.

The scan driver 200 may supply a reset rising pulse Ramp-up to the scan electrode Y in the setup period of the reset period.

Due to the reset rising pulse, a weak dark discharge occurs in the discharge cells of the entire screen. Due to the set-up discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y.

In addition, after the scan driver 200 supplies the reset rising pulse to the scan electrode Y in the set down period, the scan driver 200 starts to fall from the positive voltage lower than the maximum voltage of the reset rising pulse to be equal to or lower than the ground voltage level GND. It can supply a reset ramp-down that drops to a specific voltage level.

By causing a weak erase discharge in the discharge cell by the reset falling pulse, the wall charges excessively formed in the discharge cell are sufficiently erased. By this set down discharge, wall charges such that the address discharge can stably occur remain uniformly in the discharge cell.

The sustain driver 300 supplies the sustain bias voltage Vzb to the sustain electrode Z during the set down period and the address period. The sustain bias voltage Vzb may reduce the voltage difference between the scan electrode Y and the sustain electrode Z to prevent mis-discharge.

In addition, the scan driver 200 may supply the scan electrode Y with a negative scan pulse -Vsc that is lowered from the scan reference voltage Vsc in the address period. The scan reference voltage Vsc is a voltage higher than the lowest voltage (-Vy) of the reset falling pulse and lower than the highest voltage (Vs) of the sustain pulse.

In addition, the data driver 400 supplies a positive data pulse to the address electrode X in response to the negative scan pulse.

As the voltage difference between the negative scan pulse -Vsc and the positive data pulse Va and the wall voltage generated in the reset period are added, an address discharge occurs in the discharge cell to which the data pulse Va is supplied. In the discharge cells selected by the address discharge, wall charges are formed to the extent that a discharge can occur when a sustain pulse is supplied.

In the sustain period after the address period, the scan driver 200 and the sustain driver 300 supply the sustain pulse SUS to the scan electrode Y and the sustain electrode Z. FIG. Accordingly, the discharge cell selected by the address discharge is sustained between the scan electrode Y and the sustain electrode Z every time the sustain pulse SUS is supplied while the wall voltage and the sustain pulse SUS are added to the discharge cell. Discharge occurs.

Such a driving method has been described according to an embodiment, and an erase period for removing the wall charge remaining after the sustain discharge may be further added after the sustain period, and the wall charges may be stably formed on the electrodes before the reset period. A pre reset period may be further added.

1 to 4, the scan driver 200 and the sustain driver 300 operate independently, but the scan driver 200 and the sustain driver 300 may operate in an integrated manner.

5 is a diagram for describing a part of a circuit of a scan driver according to an exemplary embodiment of the present invention.

Referring to FIG. 5, a scan driver according to an embodiment of the present invention includes a plurality of scan integrated circuits. The first switch unit and the second switch unit may be integrated in the plurality of scan integrated circuits 210 and 220.

The scan driver 200 and the scan electrodes of the plasma display panel are electrically connected to each other. In this case, the scan driver 200 and the scan electrodes of the plasma display panel are sequentially connected to each other. As such, as the scan driver 200 and the scan electrodes ①, ②, ③, ④, ⑤, ⑥, ⑦, ⑧ of the plasma display panel are sequentially connected to each other, the scan driver 200 and the plasma display panel are scanned. It is possible to remove the connection pattern formed while the electrodes overlap each other. Accordingly, not only malfunctions occurring while overlapping each other can be prevented, but also the connection patterns can be simplified.

In addition, the scan driver 200 separates the reference voltage source into a first reference voltage source GND E and a second reference voltage source GND O different from the first reference voltage source GND E. In this case, the power sources VH1 and VH2 supplied to the scan driver 200 may also be separated.

In addition, the scan driver 200 may include a reference separation controller 500 that may connect or disconnect the first reference voltage source GND E and the second reference voltage source GND O. When the reference separation control unit 500 connects the first reference voltage source GND E and the second reference voltage source GND O to sequentially drive the first reference voltage source GND E and the second reference voltage source GND O. ) Can be used to drive blocks.

The reference separation controller 500 may include a switch and a parasitic capacitor (not shown) virtually generated by the switch.

As such, when the first reference voltage source GND E and the second reference voltage source GND O are separated by arranging the reference separation control unit 500, the first reference voltage source GND E and the second reference voltage source GND O may be separated from each other. The voltage difference is generated at the address electrode, and accordingly, the floating voltage according to the change of the sustain pulse can be formed at the address electrode. The floating voltage of the address electrode is suppressed and the opposite discharge is prevented through the floating voltage of the address electrode. There is an effect of preventing damage to the phosphor by.

Therefore, by preventing such phosphor damage, the discharge efficiency can be increased, and the driving efficiency can also be improved. In addition, there is an effect of extending the driving life of the plasma display device.

In addition, the first reference voltage source GND E functions to form the first reference voltage and may be formed of a predetermined area of an electrically conductive material. For example, it may be a frame, may be formed in the form of a copper foil having a predetermined area while being spatially and electrically separated from the frame, or may be formed by attaching an electrically conductive material to the case of the plasma display apparatus. In addition, it may be variously formed.

Here, the second reference voltage source GND O may be electrically connected to an area other than a predetermined area to which the first reference voltage source GND E is connected.

As formed in this way, the scan driver 200 may change an application according to the plasma display panel, thereby enabling sequential driving or block driving.

Although not shown in FIG. 5, the reference separation controller 500 may be included in the scan integrated circuits 210 and 220 or may be included outside the scan integrated circuit.

6 is a diagram for describing a part of a circuit of a scan driver according to an exemplary embodiment of the present invention in detail.

Referring to FIG. 6, a scan driver according to an embodiment of the present invention includes a first switch unit, a second switch unit, and a reference separation controller.

The first switch unit 211 controls the first driving pulse to be supplied to the 2n-th scan electrode, and the second switch unit 212 controls the second driving pulse to be supplied to the 2n-th scan electrode.

Each of the first switch unit 211 and the second switch unit 212 includes a top switch 211t and 212t and a bottom switch 211b and 212b.

One end of the top switch 211t of the first switch unit 211 is electrically connected to the power supply unit, and the other end of the top switch 211t of the first switch unit 211 is the bottom of the first switch unit 211. One end of the switch 211b is electrically connected, and the other end of the bottom switch part 211b of the first switch part 211 is electrically connected to the first reference voltage source GND E. In this case, the 2n−1 th scan electrode ① is commonly connected to the other end of the top switch 211t of the first switch unit 211 and one end of the bottom switch 211b of the first switch unit 211.

One end of the top switch 212t of the second switch unit 212 is electrically connected to the power supply unit, and the other end of the top switch 212t of the second switch unit 212 is a bottom switch of the second switch unit 212. The other end of the bottom switch unit 212b of the second switch unit 212 is electrically connected to one end of the second switch unit 212, and is electrically connected to the second reference voltage source GND O. In this case, the 2n th scan electrode ② is commonly connected to the other end of the top switch 212t of the second switch unit 212 and one end of the bottom switch 212b of the second switch unit 212.

The reference separation controller 500 may separate or connect the first reference voltage source GND E electrically connected to the first switch unit 211 and the second reference voltage source GND O electrically connected to the second switch unit 212. Control as possible.

One end of the reference separation control unit 500 is electrically connected to the other end of the bottom switch unit 211b of the first switch unit 211 and the first reference voltage source GND E in common, and the other end of the reference separation control unit 500 is The other end of the bottom switch unit 212b of the second switch unit 212 is electrically connected to the second reference voltage source GND O in common.

Accordingly, when the reference separation controller 500 connects the first reference voltage source GND E and the second reference voltage source GND O to use the reference voltage in common, the scan electrodes ①, ②, ③, ④, ⑤, ⑥, ⑦, ⑧) can be sequentially scanned, and if the reference separation control unit 500 separates the first reference voltage source GND E and the second reference voltage source GND O to separate the reference voltage, the scan electrode ( ①, ②, ③, ④, ⑤, ⑥, ⑦, ⑧) can be scanned by block drive. For example, after the first driving pulses are sequentially supplied to the 2n-1 th scan electrodes ①, ③, ⑤, ⑦, the second n th scan electrodes ②, ④, ⑥, ⑧ sequentially. It can supply the driving pulse. In this case, the first reference voltage source GND E and the second reference voltage source GND O should be separated.

In addition, the scan electrodes may be driven by separating them into four blocks. As such, when a plurality of blocks are driven, the reference voltage source must be separated by the number of blocks. In other words, if the scan electrode is driven n blocks, the reference voltage source may have at least n reference voltage sources. Accordingly, not only the connection pattern formed while the scan driver and the scan electrode of the plasma display panel overlap each other can be removed, but also a malfunction thereof can be prevented.

FIG. 7 illustrates driving pulses differently supplied for each block according to a scan driver according to an exemplary embodiment of the present invention.

Referring to FIG. 7, a driving pulse supplied differently to a scan electrode for each block according to an embodiment of the present invention is illustrated.

The scan driver 200 supplies a first driving pulse to the 2n−1 th scan electrode Y Even and a second driving pulse to the 2n th scan electrode Y odd. In this case, when the scan driver 200 sequentially supplies the scan electrode Y, the first driving pulse and the second driving pulse are substantially the same pulse. Since a detailed description of the driving pulse has been described with reference to FIG. 4, it will be omitted here.

When the scan driver 200 performs block driving, the first driving pulse and the second driving pulse may be different. In this case, the first driving pulse includes a first reset falling pulse rdp1, a first scan reference voltage sb11 and sb12, a first scan pulse sp1, and a first sustain pulse sus1. Includes a second reset falling pulse rdp2, second scan reference voltages sb21 and sb22, a second scan pulse sp2, and a second sustain pulse sus2.

Referring to a illustrated in FIG. 7, the slope of the first reset falling pulse rdp1 may be different from the slope of the second reset falling pulse rdp2. This is because the first reset falling pulse rdp1 is sequentially supplied to all the 2n-1 th scan electrodes Y Even, and then the second reset falling pulse rdp2 is sequentially supplied to all the 2n th scan electrodes Y Odd. As supplied, the amount of wall charges formed in the discharge cells can vary. That is, the amount of wall charges formed in the discharge cells disposed on the 2n-th scan electrode Y Odd gradually decreases while the 2n−1 th scan electrode Y Even is supplied with the first reset falling pulse rdp1.

Accordingly, the inclination of the second reset falling pulse rdp2 is supplied differently from the inclination of the first reset falling pulse rdp1 to cause a weaker discharge discharge than the first reset falling pulse rdp1, thereby causing stable address discharge. The degree of wall charge can remain uniformly in the discharge cell.

Referring to b illustrated in FIG. 7, the lowest voltage of the first scan pulse sp1 may be a different voltage from the lowest voltage of the second scan pulse sp2. This is because the first scan pulse sp1 is sequentially supplied to all of the 2n-1 th scan electrodes Y Even, and then the second scan pulse sp2 is sequentially supplied to all the 2n th scan electrodes Y Odd. As such, the amount of wall charges formed in the discharge cell may vary. That is, the amount of wall charges formed in the discharge cells disposed on the 2n-th scan electrode Y Odd gradually decreases while the 2n−1 th scan electrode Y Even is supplied with the first scan pulse sp1.

Accordingly, the lowest voltage of the second scan pulse sp2 is supplied differently from the lowest voltage of the first scan pulse sp1 to generate a stronger address discharge than the first scan pulse sp1, thereby generating stable address discharge. will be.

Referring to c, d, and e illustrated in FIG. 7, the first scan reference voltages sb11 and sb12 may have a first scan reference before and after a first scan pulse falling from the first scan reference voltage sb11 is supplied. The voltage sb12 is the same, and the second scan reference voltages sb21 and sb22 have the second scan reference voltage sb12 before and after the second scan pulse falling from the second scan reference voltage sb21 is supplied. It is different.

This is because the first scan pulse sp1 is sequentially supplied to all the 2n-1 th scan electrodes Y Even, and then the second scan pulse sp1 is sequentially supplied to all the 2n th scan electrodes Y Odd. Accordingly, the amount of wall charges formed in the discharge cells can vary.

That is, before and after the first scan pulse sp1 falling from the first scan reference voltage sb11 is supplied, the first scan reference voltage sb12 is substantially the same. This is because it is supplied in the first half of the period. This is because the amount of wall charges formed in the discharge cells hardly changes in the first half of the address period.

However, the reason why the second scan reference voltage sb22 changes differently before and after the second scan pulse falling from the second scan reference voltage sb21 is supplied is that the second scan pulse sp2 is the first half of the address period. This is because it is supplied later. This is because the amount of wall charges formed in the discharge cells decreases irregularly in the latter half of the address period. As such, the second scan reference voltages sb21 and sb22 change differently before and after the second scan pulse sp2 is supplied to prevent the wall charge from being irregularly reduced.

In this case, the second scan reference voltage sb21 before the second scan pulse sp2 is supplied may be higher than the second scan reference voltage sb22 after the second scan pulse sp2 is supplied. Accordingly, the wall charge can be prevented from being reduced more efficiently.

In addition, the first driving pulse and the second driving pulse described above may be changed according to the temperature of the plasma display panel.

In addition, the first sustain pulse sus1 and the second sustain pulse sus2 may be the same pulse. Since the reference separation controller 500 electrically separates the first reference voltage source GND E and the second reference voltage source GND O during the address period, the reference separation control unit 500 may supply different driving pulses. Since the first reference voltage source GND E and the second reference voltage source GND O are electrically connected to each other, substantially the same driving pulses can be supplied.

8A to 8B illustrate some circuits of a scan driver according to another exemplary embodiment of the present invention in detail.

Referring to FIG. 8A, the scan driver includes a first switch unit 211a and a second switch unit 212b.

At this time, one end of the first switch unit 211a and one end of the second switch unit 212a are electrically connected in common with one positive Vst voltage source, and the other end of the first switch unit 211a is the first negative Vy voltage source. And the other end of the second switch unit 212a is electrically connected to the second negative Vy voltage source.

Here, the positive polarity Vst is arranged by disposing the Vst voltage variable switch portion Qs that can vary the Vst voltage between one end of the first switch portion 211a and one end of the second switch portion 212a and the positive Vst voltage source. The voltage may be supplied to the first switch unit 211a and the second switch unit 212a while varying the voltage.

Further, by arranging the first Vy voltage variable switch unit Qd capable of varying the -Vy voltage between the other end of the first switch unit 211a and the first negative polarity Vy voltage source, the negative polarity Vy voltage is controlled by the first switch. By arranging the second Vy voltage variable switch unit Qe which can be supplied to the unit 211a and which can vary the -Vy voltage between the other end of the second switch unit 212a and the second negative Vy voltage source, The polarity Vy voltage may be supplied to the second switch unit 212a.

8B, one end of the first switch unit 211c may be electrically connected to the first positive Vst voltage supply unit, and one end of the second switch unit 212c may be electrically connected to the second positive Vst voltage supply unit. will be.

Here, the first Vst voltage variable switch unit Qs1 capable of varying the Vst voltage is disposed between one end of the first switch unit 211c and the first positive Vst voltage supply unit, thereby varying the positive Vst voltage. It is possible to supply to the first switch unit 211c, and the positive Vst voltage is varied by disposing the second Vst voltage variable switch unit Qs2 between one end of the second switch unit 212c and the second positive Vst voltage supply unit. While supplying to the second switch unit 212c.

As such, the Vst voltage variable switch unit Qs1 and Qs2 capable of varying the Vst voltage, the Vy voltage, etc. between the positive Vst voltage voltage source, the negative Vy voltage voltage source, and the first and second switch units 211c and 212c, By arranging the Vy voltage variable switch sections Qd and Qe, not only the maximum voltage of the reset rising pulse and the minimum falling voltage of the reset falling pulse can be changed during the reset period, but also various supplying reset rising pulses and reset falling pulses can be supplied to the scan electrodes. will be.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

1 illustrates a plasma display device according to an embodiment of the present invention.

2 illustrates a structure of a plasma display panel according to an exemplary embodiment of the present invention.

3 is a view for explaining a frame for implementing a gradation level in a method of driving a plasma display panel according to an embodiment of the present invention.

4 illustrates an operation of a method of driving a plasma display panel according to an embodiment of the present invention.

5 is a diagram for describing a part of a circuit of a scan driver according to an exemplary embodiment of the present invention.

6 is a diagram for describing a part of a circuit of a scan driver according to an exemplary embodiment of the present invention in detail.

FIG. 7 illustrates driving pulses differently supplied for each block according to a scan driver according to an exemplary embodiment of the present invention.

8A to 8B illustrate some circuits of a scan driver according to another exemplary embodiment of the present invention in detail.

Claims (14)

A plasma display panel including a 2n-1th scan electrode and a 2nth scan electrode; A scan driver configured to supply a first driving pulse and a second driving pulse to the plasma display panel; The scan driver may include a first switch configured to control the first driving pulse to be supplied to the 2n−1 th scan electrode; A second switch unit controlling the second driving pulse to be supplied to the 2n-th scan electrode; And And a reference separation control unit configured to control the first reference voltage source electrically connected to the first switch unit and the second reference voltage source electrically connected to the second switch unit to be separated or connected. According to claim 1, The reference separation controller electrically disconnects the first reference voltage source and the second reference voltage source during an address period, and electrically connects the first reference voltage source and the second reference voltage source during a sustain period after the address period. Plasma display device. The method of claim 2, And the scan driver sequentially supplies the second driving pulse to the 2n-th scan electrode after the first driving pulse is sequentially supplied to the 2n-1 < th > scan electrodes. According to claim 1, And the first switch unit and the second switch unit include a top switch and a bottom switch. The method of claim 4, wherein And the other end of the bottom switch unit of the first switch unit is electrically connected to the first reference voltage source, and the other end of the bottom switch unit of the second switch unit is electrically connected to the second reference voltage source. The method of claim 5, One end of the reference separation control unit is electrically connected to the other end of the bottom switch unit of the first switch unit and the first reference voltage source. And the other end of the reference separation control unit is electrically connected to the other end of the bottom switch unit of the second switch unit and the second reference voltage source. The method according to claim 1, wherein The first driving pulse includes a first reset falling pulse, a first scan reference voltage, a first scan pulse, and a first sustain pulse; The second driving pulse includes a second reset falling pulse, a second scan reference voltage, a second scan pulse, and a second sustain pulse; And the slope of the first reset falling pulse is different from the slope of the second reset falling pulse. The method of claim 7, wherein And wherein the first scan reference voltage is the same as the first scan reference voltage before and after the first scan pulse falling from the first scan reference voltage is supplied. The method of claim 8, And wherein the second scan reference voltage is different from a second scan reference voltage before and after a second scan pulse falling from the second scan reference voltage is supplied. The method of claim 9, And a second scan reference voltage before the second scan pulse is supplied is a voltage higher than a second scan reference voltage after the second scan pulse is supplied. The method of claim 10, And the lowest voltage of the first scan pulse is a voltage different from the lowest voltage of the second scan pulse. The method of claim 7, wherein And the first sustain pulse and the second sustain pulse are the same pulse. According to claim 1, And the first switch unit and the second switch unit are integrated into a single integrated circuit. The method of claim 13, And the single integrated circuit includes the reference separation controller.

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