KR20090081247A - Method of lithographing semiconductor device - Google Patents

Abstract

An exposure method of a semiconductor device for preventing fault problem formed in the edge region of wafer is provided to block the pattern formation of the defect induction domain by using a die open mark. An exposure method of a semiconductor device is as follows The marginal edge part of the heap field which is adjacent to the edge field area(130) of the wafer(120) is processed the blind and the exposure process is performed. The blind processing uses selected one among the mask in which these are combined with the binary mask, and the PSM(Phase Shift Mask). The blind area so that it become 50 ~ 75 percent of the heap field area.

Description

Exposure method of semiconductor element {METHOD OF LITHOGRAPHING SEMICONDUCTOR DEVICE}

1 is an exposure map of a wafer according to the prior art;

2 is a result map of performing a probe test when using the exposure map according to the prior art.

3 is a plan view showing an exposure map and a blind area of a wafer according to the present invention;

FIG. 4 is a plan view illustrating that a blind process is performed on a dummy field region provided outside the wafer edge field during an exposure process. FIG.

5a to 5g are experimental results of applying the exposure method of the semiconductor device according to the present invention.

The present invention relates to an exposure method of a semiconductor device, and when the exposure process is performed on the wafer edge field region using a conventional partial exposure, the risk of misalignment and the exposure process margin are reduced, resulting in a failure in subsequent probe tests. In order to solve the problem, the exposure process is performed on a field-by-field basis in the edge field region of the wafer, but the exposure process is performed by blinding the outer edge portion of the dummy field adjacent to the edge field region of the wafer. The present invention relates to an invention capable of preventing a defect problem formed in an edge region of a wafer.

The semiconductor device fabrication process includes forming a thin film on a wafer by using a physical vapor deposition (PVD) or chemical vapor deposition (CVD) method, and a mask for patterning the thin films formed on the wafer. It is divided into a process and an etching process or an implant process.

Here, the mask process includes a process of forming a photoresist film on the wafer, a process of exposing the photoresist film using a mask in which a designed pattern is defined, and a process of developing the exposed photoresist film to form a photoresist mask pattern.

Next, the wafer is directly etched using the photoresist mask pattern or the thin films on the wafer are etched to form a semiconductor device.

Among a series of processes for manufacturing such a semiconductor device, a thin film forming process generally uses a spin coating method. When the spin coating method is used, a problem is that a thin film is unevenly formed on the outermost portion of a wafer, which is a semiconductor substrate. Occurs. If the thin film of the wafer edge portion is formed unstable, the thin film occurs and acts as a defect and increases the rate of defect occurrence in subsequent processes. Therefore, the manufacturing process yield of the semiconductor device is reduced, and thus, a bevel etch process or a CMP and cleaning process is performed to form a thin film on the wafer and to remove the thin film on the wafer edge to prevent this.

Therefore, a step occurs in the edge portion of the wafer, and defocus occurs in the edge portion of the wafer during a subsequent exposure process, thereby increasing the risk of misalignment and defects.

Here, the exposure process is performed by dividing the wafer into field units.

1 is an exposure map of a wafer according to the prior art.

Referring to FIG. 1, the field region 30 is defined such that the wafer 20 is defined on the exposure map 10 and as many chips as possible can be formed on the wafer 20. In this case, when the exposure process is performed on a field basis, a blind process is performed on a portion where the exposure process is not performed, and a blind process is performed on a dummy field region adjacent to a field region located at an edge portion of the wafer 20. Do not perform. Thus, blind unprocessed region 50 occurs. In addition, according to the equipment that performs the exposure process, a region 40 in which blind processing is impossible is generated.

As such, the exposure map 10 is defined, an exposure process is performed in units of fields, and then a probe test is performed on the formed semiconductor devices.

2 is a result map of performing a test test when the exposure map according to the related art is used.

Referring to FIG. 2, a test result performed for each field is shown on the probe test map 60, and it can be seen that an error occurs in a field portion corresponding to an edge portion of the wafer and is determined as a defective field 70.

As described above, when a bevel etch process or a CMP and a cleaning process are performed to prevent defects from occurring at the edge portion of the wafer, a step is generated at the edge portion of the wafer. Therefore, when the exposure process is performed in the unit of the edge field region, if the blind process is not performed, misalignment due to defocus occurs, the exposure process margin is reduced, and a bad pattern is formed, and the yield and reliability of the semiconductor device manufacturing process are deteriorated. Problems may arise.

In order to solve the above problems, the present invention performs the exposure process in the unit of the edge field area of the wafer in the field unit, the blind process the outer edge portion of the dummy field adjacent to the edge field area of the wafer to perform the exposure process (Blind) It is an object of the present invention to provide a method for exposing a semiconductor device that can prevent a problem of defects formed in an edge region of a wafer by performing.

The semiconductor device exposure method according to the present invention for achieving the above object is

In the exposure process for exposing the edge area of a wafer,

The outer edge portion of the dummy field adjacent to the edge field region of the wafer is blinded to perform an exposure process.

Here, the blind processing is characterized in that any one selected from a binary mask (Pinary Mask), a PSM (Phase Shift Mask) and a combination of these masks, wherein the blind area is 50 to 75% of the dummy field area It is characterized by that.

Hereinafter, an exposure method of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view illustrating an exposure map and a blind area of a wafer according to the present invention.

Referring to FIG. 3, there is an exposure map 100 in which the wafer 120 is divided into fields 130. Here, the edge field 130 portion of the wafer and the dummy field 140 portion adjacent thereto are enlarged as follows.

Each field 130 is defined by a group of dies 135 and an exposure process is performed in each field 130 unit. In this case, most of the field region 130 where the exposure process is not performed is blinded. By defining the blind region 140 in the dummy field 140 adjacent to the field 130 provided at the edge of the wafer, The exposure process efficiency of the semiconductor device can be increased.

Here, the blind area 140 may be defined using any one selected from a binary mask, a phase shift mask (PSM), and a mask in combination thereof. In this case, the binary mask is formed of no chromium (No Cr), and the PSM is formed of an open region in a phase reversal pattern. In addition, the blind area 140 is adjusted to be 50 to 75% of the area of the dummy field 140. That is, it is preferable to make the exposure area 150 which is 20 to 50% extended from the interface of the wafer edge field 130.

4 is a plan view illustrating that a blind process is performed on a dummy field area provided outside the wafer edge field during an exposure process.

Here, the accuracy of the exposure process may be measured by photographing whether the dummy fields 210, 220, 230, 240, 250, 260, and 270 that have undergone the blind process are formed.

5A to 5G are experimental results of applying an exposure method of a semiconductor device according to the present invention.

5A to 5G are enlarged photographs of the first to seventh dummy fields, respectively, and it can be seen that pattern formation was performed well.

Therefore, when the blind process is performed on the dummy field adjacent to the wafer edge field, the exposure process is normally performed.

As described above, the present invention performs the exposure process in the unit of the edge field of the wafer in the field unit, the exposure process by performing a blind process (blind) the outer edge portion of the dummy field adjacent to the edge field region of the wafer, It is an object of the present invention to provide a method for exposing a semiconductor device that can prevent a problem of defects formed in the edge region of the semiconductor device.

As described above, in order to solve the problem that the exposure process margin is reduced when the exposure process is performed on the wafer edge field area by using partial exposure, the edge field area of the wafer is field-by-field unit. Although the exposure process is performed, a defect problem formed in the edge region of the wafer can be effectively prevented by fundamentally blocking the pattern formation of the defect causing region by using the die open mark. In addition, since the exposure process is performed on a field-by-field basis, an accurate alignment process using an alignment key and an overlay vernier can be performed, thereby providing an effect of improving the accuracy of the exposure process.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (3)

In the exposure process for exposing the edge area of a wafer, An exposure method is performed by performing an exposure process by blind-processing an outer edge portion of a dummy field adjacent to an edge field region of a wafer. The method of claim 1, The blind process may be any one selected from among a binary mask, a phase shift mask (PSM), and a mask in combination thereof. The method of claim 1, And the blind area is 50 to 75% of the dummy field area.

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