KR20090077192A - Method manufacturing of semiconductor device - Google Patents

Method manufacturing of semiconductor device Download PDF

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KR20090077192A
KR20090077192A KR1020080003006A KR20080003006A KR20090077192A KR 20090077192 A KR20090077192 A KR 20090077192A KR 1020080003006 A KR1020080003006 A KR 1020080003006A KR 20080003006 A KR20080003006 A KR 20080003006A KR 20090077192 A KR20090077192 A KR 20090077192A
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South Korea
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boron
film
nitride film
metal wiring
semiconductor device
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KR1020080003006A
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Korean (ko)
Inventor
김찬배
이종민
정채오
안현주
이효석
민성규
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주식회사 하이닉스반도체
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Priority to KR1020080003006A priority Critical patent/KR20090077192A/en
Publication of KR20090077192A publication Critical patent/KR20090077192A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner

Abstract

A manufacturing method of the semiconductor device is provided, which can form the protective film on the metal wiring in the uniform thickness. The metal wiring is formed at the upper part of the semiconductor substrate(200) having device structure. By using the nitride film in which the boron is contained on the metal wiring, the protective film is formed. The nitride film in which the boron is contained is UV-processed. The low dielectric insulator layer(230) is formed on the nitride film in which the boron is contained. The nitride film in which the boron is contained is formed as the SiBN film. The nitride film in which the boron is contained is formed in a thickness of 200~500Å. The nitride film in which the boron is contained is formed at 350~400 deg.C.

Description

반도체 소자의 제조방법{Method manufacturing of semiconductor device}Method of manufacturing semiconductor device

본 발명은 반도체 소자의 제조방법에 관한 것으로, 보다 상세하게는, 금속배선 간의 층간절연막으로서 저 유전율(low-k)을 갖는 절연막을 적용하는 반도체 소자의 제조방법에 관한 것이다. The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device using an insulating film having a low dielectric constant (low-k) as an interlayer insulating film between metal wirings.

반도체 소자의 고집적 및 고속화가 진행되면서, 셀 영역의 크기 감소를 수반하고 있는데, 이처럼, 반도체 소자의 고집적화로 인한 셀 영역의 크기 감소 현상은, 이웃하는 금속배선들 간의 기생 캐패시턴스를 증가시키게 된다.As the integration and high speed of semiconductor devices are progressing, the size of the cell region is accompanied by a decrease in the size of the cell region. As such, the reduction of the size of the cell region due to the high integration of the semiconductor elements increases parasitic capacitance between neighboring metal wires.

이러한 현상은 RC(Resistance/Capacitance) 지연 현상이 증가시키고, 그 결과로, 소자의 구동 속도를 향상시키는데 걸림돌이 되고 있는 실정이다. This phenomenon increases the resistance / capacitance (RC) delay, and as a result, it is an obstacle to improving the driving speed of the device.

이에, 소자의 구동 속도 향상을 위한 방안으로 금속배선 간을 절연시키는 층간절연막으로 저유전율을 갖는 절연막(이하, "저유전 절연막"이라 칭함)을 적용하고 있다. In order to improve the driving speed of the device, an insulating film having a low dielectric constant (hereinafter referred to as a "low dielectric insulating film") is used as an interlayer insulating film that insulates metal wiring.

한편, 층간절연막으로서 상기 저유전 절연막을 적용하는 경우에 있어서, 상기 저유전 절연막의 특성에 의하여 상기 금속배선에 이상 현상 등이 발생하고 있는데, 이러한 현상들을 방지하기 위하여, 통상, 상기 금속배선 상에 산화막 계열의 보호막을 증착하고 있다.On the other hand, in the case where the low dielectric insulating film is applied as the interlayer insulating film, abnormalities or the like occur in the metal wiring due to the characteristics of the low dielectric insulating film. An oxide-based protective film is deposited.

자세하게, 상기 금속배선 상에 층간절연막으로서 저유전 절연막을 증착하는 경우에, 후속의 저유전 절연막의 큐어링(curing) 공정시, 가스의 외방 확산(out diffusion)에 의하여 금속배선에 이상 현상이 발생하기 때문에, 이러한 금속배선의 이상 현상을 억제하기 위하여 상기 금속배선 상에 보호막을 증착한 상태에서 저유전 절연막을 증착하고 있다.In detail, when a low dielectric insulating film is deposited as an interlayer insulating film on the metal wiring, an abnormal phenomenon occurs in the metal wiring due to out diffusion of gas during the subsequent curing process of the low dielectric insulating film. Therefore, in order to suppress such an abnormal phenomenon of the metal wiring, a low dielectric insulating film is deposited in a state where a protective film is deposited on the metal wiring.

이러한 상기 산화막 계열의 보호막은 3.9의 유전율을 갖고 있으며, 대략 500Å의 두께로 증착되어 진다.The oxide-based protective film has a dielectric constant of 3.9 and is deposited to a thickness of approximately 500 kHz.

그런데, 상기 보호막은 스텝 커버리지(step coverage) 특성이 약 50％ 정도 밖에 되지않아서 금속배선의 양측 부분, 더욱이 금속배선의 하부 코너 부분에 취약한 증착 프로파일(profile) 특성을 갖게 된다.However, since the passivation layer has only about 50% of step coverage characteristics, the protective film has a deposition profile characteristic that is weak at both side portions of the metal interconnection and moreover, the lower corner portion of the metal interconnection.

도 1은 종래의 기술에 따른 금속배선 상에 보호막이 증착된 모습을 보여주는 도면이다.1 is a view showing a protective film deposited on a metal wiring according to the prior art.

도시된 바와 같이, 상기 금속배선(110)의 양측 부분에 보호막(120)의 증착이 취약한 것을 볼 수 있고, 상기 금속배선(110)의 하부 코너 부분에는 더욱 취약한 보호막(120)의 증착 특성을 볼 수 있다.As shown, it can be seen that the deposition of the protective film 120 is weak on both sides of the metal wiring 110, the lower corner portion of the metal wiring 110 to see the deposition characteristics of the protective film 120 more weak. Can be.

미설명된 도면 부호 100은 반도체기판, 101은 하지층을 나타낸다. Unexplained reference numeral 100 denotes a semiconductor substrate and 101 denotes an underlayer.

이처럼, 상기 금속배선(110) 상에 스텝 커버리지 특성이 약한 보호막(120)을 증착하게 되면 금속배선(110)에 솔벤트(solvent)가 침투하게 되어 금속배선이 산화되는 현상도 발생하게 된다.As such, when the passivation layer 120 having the weak step coverage property is deposited on the metal line 110, solvent penetrates into the metal line 110, thereby oxidizing the metal line.

이러한 현상은 반도체 소자의 고집적화가 진행될수록 더욱 증가하게 되는 경향이 있게 될 것이다.This phenomenon will tend to increase as the integration of semiconductor devices increases.

본 발명은 금속배선 상에 스텝 커버리지 특성이 좋은 보호막을 형성할 수 있는 반도체 소자의 제조방법을 제공함에 그 목적이 있다.It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of forming a protective film having good step coverage characteristics on a metal wiring.

본 발명은, 금속배선을 형성하는 단계; 상기 금속배선 상에 보론이 함유된 질화막을 사용하여 보호막을 형성하는 단계; 및 상기 보론이 함유된 질화막 상에 저유전 절연막을 형성하는 단계;를 포함하는 반도체 소자의 제조방법을 제공한다.The present invention, forming a metal wiring; Forming a protective film using a nitride film containing boron on the metal wiring; And forming a low dielectric insulating film on the boron-containing nitride film.

여기서, 상기 보론이 함유된 질화막은 SiBN막으로 형성하는 것을 포함한다.Here, the boron-containing nitride film includes forming a SiBN film.

상기 SiBN막은 Si 소스에 대한 B 소스의 비율이 50∼70％인 것을 포함한다.The said SiBN film contains that the ratio of the B source with respect to a Si source is 50 to 70%.

상기 보론이 함유된 질화막은 PECVD 방식에 따라 형성하는 것을 포함한다.The boron-containing nitride film may be formed by PECVD.

상기 보론이 함유된 질화막은 200∼500Å 두께로 형성하는 것을 포함한다.The boron-containing nitride film includes a thickness of 200 to 500 kPa.

상기 보론이 함유된 질화막은 350∼400℃의 온도에서 형성하는 것을 포함한다.The boron-containing nitride film includes forming at a temperature of 350 to 400 ° C.

상기 보론이 함유된 질화막을 형성하는 단계 후, 상기 저유전 절연막을 형성하는 단계 전, 상기 보론이 함유된 질화막에 UV 처리하는 단계;를 더 포함하는 것을 포함한다.And after the forming of the boron-containing nitride film, before the forming of the low dielectric insulating film, performing UV treatment on the boron-containing nitride film.

상기 UV 처리는 300∼400℃ 온도에서 수행하는 것을 포함한다.The UV treatment includes performing at a temperature of 300 to 400 ° C.

본 발명은 금속배선 상에 저유전 절연막을 증착하기 전에 SiBN막으로 보호막을 형성함으로써, 상기 금속배선 상에 균일한 두께로 보호막을 형성할 수가 있게 된다. According to the present invention, a protective film is formed of a SiBN film before the low dielectric insulating film is deposited on the metal wiring, whereby the protective film can be formed with a uniform thickness on the metal wiring.

따라서, 본 발명은 산화막 계열의 보호막을 적용하였던 종래 기술 대비 금속배선 상에 안정적으로 보호막을 형성할 수 있게 되고, 그래서, 반도체 공정의 안정화에 따른 수율 및 신뢰성 향상을 기대할 수 있다. Therefore, the present invention can stably form a protective film on the metal wiring compared to the prior art in which the oxide film-based protective film is applied, and thus, it is expected to improve the yield and reliability according to the stabilization of the semiconductor process.

본 발명은 금속 배선 상에 저유전 절연막에 의해 발생하는 금속배선의 이상 현상을 방지하기 위하여 보호막을 형성하는 공정시, 상기 보호막은 보론이 함유된 질화막으로 형성한다. The protective film is formed of a nitride film containing boron in the process of forming a protective film to prevent abnormal phenomenon of the metal wiring caused by the low dielectric insulating film on the metal wiring.

이처럼, 본 발명은 보론이 함유된 질화막으로 보호막을 형성함으로써, 금속배선 상에 스텝 커버리지 특성이 좋은 보호막을 형성할 수 있게 된다.As described above, according to the present invention, a protective film is formed of a nitride film containing boron, thereby forming a protective film having good step coverage characteristics on the metal wiring.

따라서, 본 발명은 산화막 계열의 보호막을 적용하였던 종래 기술 대비 스텝 커버리지가 취약한 금속배선 부분에도 안정적으로 보호막을 형성할 수 있으므로, 반도체 공정의 안정화에 따른 수율 및 신뢰성 향상을 기대할 수 있다. Accordingly, the present invention can stably form a protective film even on a metal wiring portion having a weak step coverage compared to the prior art in which an oxide-based protective film is applied, and thus, yield and reliability of the semiconductor process can be expected to be improved.

이하, 첨부된 도면을 참조하여 본 발명의 바람직한 실시예를 상세하게 설명하도록 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

자세하게, 도 2a 내지 도 2c는 본 발명의 실시예에 따른 반도체 소자의 제조방법을 설명하기 위한 공정별 단면도로서, 이를 참조하여 설명하면 다음과 같다.2A to 2C are cross-sectional views illustrating processes for manufacturing a semiconductor device according to an embodiment of the present invention, which will be described below with reference to the drawings.

도 2a를 참조하면, 소자 구조로서, 트랜지스터를 포함한 하지층(201)이 형성된 반도체기판(200) 상에 다수의 금속배선(210)을 형성한다.Referring to FIG. 2A, a plurality of metal interconnections 210 are formed on a semiconductor substrate 200 on which an underlayer 201 including a transistor is formed.

그런다음, 상기 금속배선(210)을 포함한 하지층(201) 상에 후속의 저 유전절연막에 의해 발생하는 금속배선의 이상 현상을 방지하기 위한 보호막으로 보론이 함유된 질화막(220)을 증착한다. Then, a nitride film 220 containing boron is deposited on the underlayer 201 including the metal wiring 210 as a protective film to prevent an abnormal phenomenon of the metal wiring caused by the subsequent low dielectric insulating film.

상기 보론이 함유된 질화막(220)은 실리콘(Si) 소스에 보론(B) 소스의 비율이 50∼70％ 이상인 SiBN막을 사용하여 PECVD(Plasma Enhanced Chemical Vapor Deposition) 방식에 따라 350∼400℃의 온도에서 증착한다.The boron-containing nitride film 220 has a temperature of 350 to 400 ° C. according to a Plasma Enhanced Chemical Vapor Deposition (PECVD) method using a SiBN film having a boron (B) source ratio of 50 to 70% or more in a silicon (Si) source. Deposition at

상기 보론이 함유된 질화막(220)은 200∼500Å 두께로 증착한다.The boron-containing nitride film 220 is deposited to a thickness of 200 ~ 500Å.

상기 보론이 함유된 질화막(220)은 스텝 커버리지가 거의 100％ 정도인 우수한 저유전 절연막이므로, 상기 금속배선(210)의 전면 상에 균일한 두께로 증착하게 된다.Since the boron-containing nitride film 220 is an excellent low dielectric insulating film having a step coverage of about 100%, it is deposited to a uniform thickness on the entire surface of the metal wiring 210.

도 2b를 참조하면, 상기 보론이 함유된 질화막(220)에 잔류하는 수소(H)를 제거하기 위하여 상기 보론이 함유된 질화막(220)에 자외선(UV) 처리한다. 상기 자외선 처리는 350∼400℃ 온도에서 수행한다.Referring to FIG. 2B, an ultraviolet (UV) treatment is performed on the boron-containing nitride film 220 to remove hydrogen (H) remaining in the boron-containing nitride film 220. The ultraviolet treatment is carried out at a temperature of 350 ~ 400 ℃.

상기 보론이 함유된 질화막(220)은 상기 자외선 처리로 인하여 막의 치밀화가 증가하게 되고, 이로 인해, 후속 공정시 보호막, 즉, 보론이 함유된 질화막(220)의 솔벤트(solvent)로 인하여 금속배선(210)이 손실되는 것을 억제할 수 있다.The boron-containing nitride film 220 has an increase in densification of the film due to the ultraviolet light treatment, and, thus, a metallization line due to the solvent of the protective film, that is, the boron-containing nitride film 220 during the subsequent process. 210 can be suppressed from being lost.

도 2c를 참조하면, 상기 자외선 처리된 보론이 함유된 질화막(220) 상에 저 유전절연막(230)을 증착한다.Referring to FIG. 2C, a low dielectric insulating film 230 is deposited on the nitride film 220 containing the UV-treated boron.

이후, 도시하지는 않았으나 공지된 일련의 후속 공정을 차례로 진행하여 본 발명의 실시예에 따른 반도체 소자를 제조한다.Subsequently, although not shown, a series of subsequent known processes are sequentially performed to manufacture a semiconductor device according to an exemplary embodiment of the present invention.

전술한 바와 같이, 본 발명은 상기 저유전 절연막에 의해 발생하는 금속배선의 이상 현상을 방지하기 위하여 상기 금속배선 상에 보호막을 형성하는 공정시, 스텝 커버리지 특성이 좋은 보호막으로 형성한다.As described above, the present invention forms a protective film having good step coverage characteristics in the process of forming a protective film on the metal wiring in order to prevent abnormal phenomenon of the metal wiring caused by the low dielectric insulating film.

바람직하게, 상기 보호막은 보론이 함유된 질화막, 즉, 유전율이 4.5이며, 인덱스(INDEX)가 1.86인 SiBN막으로 형성한다.Preferably, the protective film is formed of a nitride film containing boron, that is, a SiBN film having a dielectric constant of 4.5 and an index INDEX of 1.86.

따라서, 본 발명은 스텝 커버리지 특성이 좋은 SiBN막을 보호막으로 형성함으로써, 상기 금속배선의 전면 상에 균일한 두께로 보호막을 형성할 수가 있게 된다. Therefore, in the present invention, by forming a SiBN film having good step coverage characteristics as a protective film, a protective film can be formed with a uniform thickness on the entire surface of the metal wiring.

그러므로, 본 발명은 산화막 계열의 보호막을 적용하였던 종래 기술 대비 금속배선 상에 안정적인 보호막을 형성할 수 있게 되고, 그래서, 반도체 공정의 안정화에 따른 수율 및 신뢰성 향상을 기대할 수 있다. Therefore, the present invention can form a stable protective film on the metal wiring compared with the prior art to which the oxide film-based protective film is applied, and thus, it is expected to improve the yield and reliability according to the stabilization of the semiconductor process.

이상, 여기에서는 본 발명을 특정 실시예에 관련하여 도시하고 설명하였지만, 본 발명이 그에 한정되는 것은 아니며, 이하의 특허청구의 범위는 본 발명의 정신과 분야를 이탈하지 않는 한도 내에서 본 발명이 다양하게 개조 및 변형될 수 있다는 것을 당업계에서 통상의 지식을 가진 자가 용이하게 알 수 있다. As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

도 1는 종래의 기술에 따른 금속배선 상에 보호막이 형성된 모습을 도시한 공정 단면도.1 is a cross-sectional view showing a state in which a protective film is formed on a metal wiring according to the related art.

도 2a 내지 도 2c는 본 발명의 실시예에 따른 반도체 소자의 제조방법을 설명하기 위한 공정별 단면도.2A to 2C are cross-sectional views of processes for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

* 도면의 주요 부분에 대한 부호의 설명 *Explanation of symbols on the main parts of the drawings

200: 반도체기판 201: 하지층200: semiconductor substrate 201: base layer

210: 금속배선 220: 보론이 함유된 질화막210: metal wiring 220: nitride film containing boron

230: 저유전 절연막230: low dielectric insulating film

Claims (8)

소자 구조를 갖는 반도체기판 상부에 금속배선을 형성하는 단계; Forming a metal wiring on the semiconductor substrate having the device structure; 상기 금속배선 상에 보론이 함유된 질화막을 사용하여 보호막을 형성하는 단계; 및 Forming a protective film using a nitride film containing boron on the metal wiring; And 상기 보론이 함유된 질화막 상에 저유전 절연막을 형성하는 단계;Forming a low dielectric insulating film on the boron-containing nitride film; 를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.Method of manufacturing a semiconductor device comprising a. 제 1 항에 있어서,The method of claim 1, 상기 보론이 함유된 질화막은 SiBN막으로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법The boron-containing nitride film is a SiBN film manufacturing method of a semiconductor device characterized in that formed 제 2 항에 있어서,The method of claim 2, 상기 SiBN막은 Si 소스에 대한 B 소스의 비율이 50∼70％인 것을 특징으로 하는 반도체 소자의 제조방법.The SiBN film is a method for manufacturing a semiconductor device, characterized in that the ratio of the B source to the Si source is 50 to 70%. 제 1 항에 있어서,The method of claim 1, 상기 보론이 함유된 질화막은 PECVD 방식에 따라 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.The boron-containing nitride film is a semiconductor device manufacturing method characterized in that formed by the PECVD method. 제 1 항에 있어서,The method of claim 1, 상기 보론이 함유된 질화막은 200∼500Å 두께로 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.The boron-containing nitride film is a manufacturing method of a semiconductor device, characterized in that formed to a thickness of 200 ~ 500Å. 제 1 항에 있어서,The method of claim 1, 상기 보론이 함유된 질화막은 350∼400℃의 온도에서 형성하는 것을 특징으로 하는 반도체 소자의 제조방법.The boron-containing nitride film is formed at a temperature of 350 ~ 400 ℃ manufacturing method of a semiconductor device. 제 1 항에 있어서,The method of claim 1, 상기 보론이 함유된 질화막을 형성하는 단계 후, 상기 저유전 절연막을 형성하는 단계 전, 상기 보론이 함유된 질화막에 UV 처리하는 단계;를 더 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.And after the forming of the boron-containing nitride film, before the forming of the low dielectric insulating film, performing UV treatment on the boron-containing nitride film. 제 7 항에 있어서,The method of claim 7, wherein 상기 UV 처리는 300∼400℃의 온도에서 수행하는 것을 특징으로 하는 반도체 소자의 제조방법.The UV treatment method of manufacturing a semiconductor device, characterized in that performed at a temperature of 300 ~ 400 ℃.
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