KR20090069830A - Printed circuit board - Google Patents

Printed circuit board Download PDF

Info

Publication number
KR20090069830A
KR20090069830A KR1020070137634A KR20070137634A KR20090069830A KR 20090069830 A KR20090069830 A KR 20090069830A KR 1020070137634 A KR1020070137634 A KR 1020070137634A KR 20070137634 A KR20070137634 A KR 20070137634A KR 20090069830 A KR20090069830 A KR 20090069830A
Authority
KR
South Korea
Prior art keywords
pads
printed circuit
circuit board
pad
width
Prior art date
Application number
KR1020070137634A
Other languages
Korean (ko)
Inventor
김성호
신영환
이태곤
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020070137634A priority Critical patent/KR20090069830A/en
Publication of KR20090069830A publication Critical patent/KR20090069830A/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/103—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding or embedding conductive wires or strips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10287—Metal wires as connectors or conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

A printed circuit board is provided to increase the number of pads formed in a limited region by reducing width of the pad from one end to the other end. A printed circuit board(200) includes an insulation layer(220), a contact point(212), and a plurality of pads(210). A plurality of pads is formed on the insulation layer. Width of the pad is reduced from one end(a) to the other end(b). The pad has a trapezoidal shape. The pad is electrically bonded in an electrode of an electronic device through a wire. One end and the other end of the pads are alternately arranged according to a width direction in order to secure a dimension for a wire bonding. Opposite side surfaces of adjacent pads are engaged each other.

Description

인쇄회로기판{printed circuit board}Printed circuit board

본 발명은 인쇄회로기판에 관한 것이다.The present invention relates to a printed circuit board.

최근, 전자 제품이 소형화, 고밀도 집적화됨에 따라, 이에 대응하기 위하여 각종 전자 소자와 와이어 본딩(wire bonding)되는 인쇄회로기판의 패드(pad)도 미세화되고 있다.In recent years, as electronic products are miniaturized and high density integrated, pads of printed circuit boards wire-bonded with various electronic devices have been miniaturized to cope with this problem.

도 1은 종래 기술에 따른 인쇄회로기판을 나타낸 평면도이다. 종래 기술에 따른 인쇄회로기판(100)의 경우, 절연층(120) 상에 사각 형상의 패드(110)가 형성되고 내부의 접점(112)에 와이어가 본딩되었다.1 is a plan view showing a printed circuit board according to the prior art. In the case of the printed circuit board 100 according to the related art, a square pad 110 is formed on the insulating layer 120, and wires are bonded to the internal contact 112.

그러나, 종래 기술에 따른 인쇄회로기판의 경우, 패드가 사각 형상으로 형성됨에 따라, 제한된 영역 내에 형성되는 패드의 개수를 증가시키기 위해서는 패드 전체의 너비를 축소시키게 되나, 와이어 본딩을 위한 면적을 확보하기 위해 패드 너비의 축소에는 한계가 있어 문제가 되고 있다.However, in the case of the printed circuit board according to the related art, as the pads are formed in a rectangular shape, in order to increase the number of pads formed in the limited area, the width of the entire pad is reduced, but to secure an area for wire bonding. For this reason, there is a limit in reducing the pad width.

이에, 와이어 본딩을 위한 면적을 충분히 확보하면서 제한된 영역 내에 형성되는 패드의 개수를 증가시킬 수 있는 인쇄회로기판이 요구되고 있다.Accordingly, there is a need for a printed circuit board capable of increasing the number of pads formed in a limited area while sufficiently securing an area for wire bonding.

본 발명은, 제한된 영역에 형성되는 패드의 개수를 증가시킬 수 있는 인쇄회로기판을 제공하는 것이다.The present invention provides a printed circuit board capable of increasing the number of pads formed in a limited area.

본 발명의 일 측면에 따르면, 절연층, 및 절연층에 일단에서 타단으로 너비가 좁아지도록 형성되는 복수의 패드를 포함하며, 복수의 패드는, 일단과 타단이 번갈아 위치하도록 너비 방향으로 나란히 배치되는 것을 특징으로 하는 인쇄회로기판이 제공된다.According to an aspect of the present invention, the insulating layer, and a plurality of pads are formed in the insulating layer to narrow the width from one end to the other end, the plurality of pads are arranged side by side in the width direction so that one end and the other end are alternately positioned There is provided a printed circuit board.

서로 인접하는 패드는, 대향하는 두 측면의 형상이 서로 정합될 수 있다.Pads adjacent to each other may be matched to each other in the shape of two opposite sides.

패드는 사다리꼴 형상일 수 있다.The pad may be trapezoidal in shape.

본 발명의 실시예에 따르면, 와이어 본딩을 위한 면적을 충분히 확보하면서 제한된 영역에 보다 많은 패드를 형성할 수 있다.According to an embodiment of the present invention, more pads may be formed in a limited area while sufficiently securing an area for wire bonding.

본 발명에 따른 인쇄회로기판의 실시예를 첨부도면을 참조하여 상세히 설명하기로 하며, 첨부 도면을 참조하여 설명함에 있어, 동일하거나 대응하는 구성 요소는 동일한 도면번호를 부여하고 이에 대한 중복되는 설명은 생략하기로 한다.An embodiment of a printed circuit board according to the present invention will be described in detail with reference to the accompanying drawings, and in the following description with reference to the accompanying drawings, the same or corresponding components are given the same reference numerals and duplicate description thereof will be given. It will be omitted.

도 2는 본 발명의 일 실시예에 따른 인쇄회로기판을 나타낸 평면도이다. 도 2를 참조하면, 인쇄회로기판(200), 패드(pad, 210), 접점(212) 및 절연층(220)이 도시되어 있다.2 is a plan view illustrating a printed circuit board according to an exemplary embodiment of the present invention. Referring to FIG. 2, the printed circuit board 200, the pads 210, the contacts 212, and the insulating layer 220 are illustrated.

본 실시예에 따르면, 복수의 패드(210)가 일단(a)에서 타단(b)으로 너비가 좁아지도록 형성되고, 너비 방향을 따라 일단(a)과 타단(b)이 번갈아 위치하도록 복수의 패드(210)가 나란히 배치됨으로써, 와이어 본딩을 위한 면적을 충분히 확보하면서 제한된 영역 내에 형성되는 패드(210)의 개수를 증가시킬 수 있는 인쇄회로기판(200)이 제시된다.According to the present exemplary embodiment, the plurality of pads 210 are formed to have a narrow width from one end (a) to the other end (b), and the plurality of pads such that one end (a) and the other end (b) are alternately positioned along the width direction. By placing the 210 side by side, a printed circuit board 200 capable of increasing the number of pads 210 formed in a limited area while sufficiently securing an area for wire bonding is presented.

절연층(220)에는 회로 패턴 및 패드(210)가 형성될 수 있으며, 이 패드(210)와 각종 전자 소자의 전극이 와이어(wire)를 통해 전기적으로 본딩됨으로써, 전자 제품 등에 장착되는 반도체 패키지(semiconductor package)가 구현될 수 있다.A circuit pattern and a pad 210 may be formed on the insulating layer 220, and the pad 210 and the electrodes of various electronic devices are electrically bonded through wires, thereby forming a semiconductor package mounted on an electronic product. semiconductor package) may be implemented.

패드(210)는 절연층(220) 상에 복수개 형성될 수 있으며, 사다리꼴 형상과 같이, 일단(a)에서 타단(b)으로 너비가 좁아지도록 형성될 수 있다. 전자 소자와의 전기적 연결을 위한 와이어는, 패드(210) 일단(a) 쪽의 본딩을 위한 면적이 확보되는 부분에 본딩되어 접점(212)을 형성할 수 있으므로, 이외의 부분은 와이어 본딩을 위한 면적을 확보할 필요가 없어 타단(b)으로 갈수록 패드의 너비를 좁게 형성하여도 무방하게 된다.A plurality of pads 210 may be formed on the insulating layer 220, and may be formed to have a narrow width from one end (a) to the other end (b), such as a trapezoidal shape. Since the wire for electrical connection with the electronic device may be bonded to a portion where an area for bonding at one end (a) of the pad 210 is secured to form a contact point 212, other portions may be used for wire bonding. Since the area does not need to be secured, the width of the pad may be narrower toward the other end (b).

일단(a)에서 타단(b)으로 갈수록 너비가 좁아지도록 패드를 형성함에 따라, 절연층(220)의 표면에서 하나의 패드(210)가 차지하는 영역이 좁아질 수 있으므로, 보다 고밀도로 회로 패턴 및 패드(210)를 형성할 수 있다.As the pad is formed so that the width becomes narrower from one end (a) to the other end (b), the area occupied by one pad 210 on the surface of the insulating layer 220 can be narrowed, so that the circuit pattern and The pad 210 may be formed.

또한, 복수의 패드(210)는, 일단(a)과 타단(b)이 번갈아 위치하도록 너비 방 향으로 나란히 배치될 수 있다. 즉, 복수의 패드(210) 중 어느 하나의 일단(a)과 다른 하나의 타단(b)이 너비방향으로 나란하도록, 복수의 패드(210)가 너비 방향을 따라 나란히 배치될 수 있다.In addition, the plurality of pads 210 may be arranged side by side in the width direction such that one end (a) and the other end (b) are alternately positioned. That is, the plurality of pads 210 may be arranged side by side along the width direction such that one end (a) of the plurality of pads 210 and the other end b are parallel in the width direction.

복수의 패드(210)의 일단(a)과 타단(b)이 너비 방향으로 번갈아 나란히 위치하도록, 복수의 패드(210)를 배치함으로써, 와이어 본딩을 위한 면적을 충분히 확보하면서 제한된 영역 내에 형성되는 패드(210)의 개수를 증가시킬 수 있다.By arranging the plurality of pads 210 so that one end (a) and the other end (b) of the plurality of pads 210 are alternately positioned side by side in the width direction, the pads are formed in a limited area while sufficiently securing an area for wire bonding. The number of 210 can be increased.

한편, 복수의 패드(210) 중, 서로 인접하는 패드(210)는, 대향하는 두 측면의 형상이 서로 정합될 수 있다. 즉, 대향하는 패드(210)의 측면이 서로 맞물릴 수 있는 형상을 가짐으로써, 동일한 영역 내에 보다 밀집되도록 패드(210)를 형성할 수 있으며, 동일한 개수의 패드(210)를 형성하는 경우에도 와이어 본딩을 위한 면적을 보다 넓게 확보할 수 있다.Meanwhile, among the pads 210, pads 210 adjacent to each other may have shapes of two opposing side surfaces thereof mated with each other. That is, by having the shape that the sides of the opposing pads 210 can be engaged with each other, it is possible to form the pads 210 to be more densely within the same area, even when the same number of pads 210 are formed It is possible to secure a larger area for bonding.

전술한 실시예 외의 많은 실시예들이 본 발명의 특허청구범위 내에 존재한다.Many embodiments other than the above-described embodiments are within the scope of the claims of the present invention.

도 1은 종래 기술에 따른 인쇄회로기판을 나타낸 평면도.1 is a plan view showing a printed circuit board according to the prior art.

도 2는 본 발명의 일 실시예에 따른 인쇄회로기판을 나타낸 평면도.2 is a plan view showing a printed circuit board according to an embodiment of the present invention.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

200: 인쇄회로기판 210: 패드(pad)200: printed circuit board 210: pad

212: 접점 220: 절연층212: contact 220: insulating layer

Claims (3)

절연층; 및Insulating layer; And 상기 절연층에 일단에서 타단으로 너비가 좁아지도록 형성되는 복수의 패드를 포함하며,It includes a plurality of pads formed in the insulating layer to narrow the width from one end to the other end, 상기 복수의 패드는, 일단과 타단이 번갈아 위치하도록 너비 방향으로 나란히 배치되는 것을 특징으로 하는 인쇄회로기판.The plurality of pads, the printed circuit board, characterized in that arranged side by side in the width direction so that one end and the other end are alternately positioned. 제1항에 있어서,The method of claim 1, 서로 인접하는 상기 패드는, 대향하는 두 측면의 형상이 서로 정합되는 것을 특징으로 하는 인쇄회로기판.The pads adjacent to each other, the shape of the two opposite sides are matched with each other. 제2항에 있어서,The method of claim 2, 상기 패드는 사다리꼴 형상인 것을 특징으로 하는 인쇄회로기판. The pad is a printed circuit board, characterized in that the trapezoidal shape.
KR1020070137634A 2007-12-26 2007-12-26 Printed circuit board KR20090069830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020070137634A KR20090069830A (en) 2007-12-26 2007-12-26 Printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020070137634A KR20090069830A (en) 2007-12-26 2007-12-26 Printed circuit board

Publications (1)

Publication Number Publication Date
KR20090069830A true KR20090069830A (en) 2009-07-01

Family

ID=41321434

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070137634A KR20090069830A (en) 2007-12-26 2007-12-26 Printed circuit board

Country Status (1)

Country Link
KR (1) KR20090069830A (en)

Similar Documents

Publication Publication Date Title
JP2004071670A (en) Ic package, connecting structure and electronic apparatus
JP2007121180A (en) Testing device test method for semiconductor device
US7180182B2 (en) Semiconductor component
JPWO2015182284A1 (en) Semiconductor device
US7598608B2 (en) Mounting substrate
KR101046388B1 (en) Semiconductor package
JP4020795B2 (en) Semiconductor device
US6498308B2 (en) Semiconductor module
JP2020025076A (en) module
KR20090069830A (en) Printed circuit board
JP2011134789A (en) Semiconductor device, and printed circuit board
US20150016069A1 (en) Printed circuit board
JP4699089B2 (en) Chip-on-film semiconductor device
JP4523425B2 (en) Semiconductor device mounting substrate
US10881006B2 (en) Package carrier and package structure
KR100955464B1 (en) Printed circuit board
JP2004363224A (en) Connection structure of semiconductor chip
TWI721648B (en) Package carrier and package structure
JP3998209B2 (en) connector
KR20080051197A (en) Semiconductor package
JP2004031432A (en) Semiconductor device
JP3701242B2 (en) Connection system
JP4382774B2 (en) Semiconductor package, board, electronic device, and method for connecting semiconductor package and printed board
KR20100123941A (en) Substrate for manufacturing semiconductor package and semiconductor package using it
JP2019149393A (en) Wiring board and electronic device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application