KR20090066212A - Defect detection method and defect detection apparatus - Google Patents

Abstract

A defect detecting method and a defect detecting apparatus are provided to perform the binarization of a blood test image in detecting the defect of a pattern on a substrate, thereby acquiring a threshold value for generating a test image completely processed in high precision. The blood test image of multi-gray scale of a substrate is acquired(S11). An edge-removed image is generated by removing an edge expansion-processed from the blood test image(S16). The gray level histogram of the pixel of the edge-removed image is acquired(S17). A threshold value for test is acquired(S18). An image is produced by the binarization of the blood test image with the threshold value(S19). The defect of the pattern of the substrate is detected based on the image completely processed(S20).

Description

DEFECT DETECTION METHOD AND DEFECT DETECTION APPARATUS

The present invention relates to a technique for detecting a defect of a geometric pattern on a substrate.

Background Art Various inspection techniques have conventionally been used in the field of inspecting geometric patterns such as wiring formed on printed wiring boards, semiconductor substrates, glass substrates, etc. (hereinafter referred to as "substrates"). As one of inspection methods, for example, a method of acquiring a multi-gradation image of a substrate on which a wiring pattern is formed, comparing a binary image obtained by binarizing the multi-gradation image with a binary image of a normal substrate prepared in advance, and detecting a defect. This patent is disclosed in Japanese Patent Laid-Open No. Hei 5-340731 (Document 1) and Japanese Patent Laid-Open No. Hei 8-220013 (Document 2).

In the inspection apparatus of Document 1, a multi-gradation digital image of a substrate acquired by a CCD (Charge Coupled Device) camera and converted to AD is binarized to an appropriately determined temporary threshold value so that a wiring pattern is detected, and the detected wiring pattern is appropriately determined. By enlarging at a magnification, an enlarged binary image is enlarged to a level where the wiring pattern width in the image is considered to be the actual wiring pattern width. Next, wiring is performed by applying the pattern mask signal generated as the inversion process (that is, the process of inverting "0" and "1" of the pixel value) to the enlarged binary image to the original multi-gradation digital image. The multi-gradation base image from which the pattern is removed is obtained. The inspection value obtained by dividing the original multi-gradation digital image by binarization of the gradation value one larger than the maximum gradation value in the frequency data for each gradation of the pixels of the base image by the threshold value. An image is compared with a binary image of a normal substrate, and defect detection is performed.

In Document 2, a histogram of density values (i.e. pixel values) of each pixel is obtained based on the multi-value digital image of the substrate obtained by the CCD array and AD converted. In the histogram of the concentration value, the peak of the concentration distribution corresponding to the relatively bright pattern portion on the substrate and the peak of the concentration distribution corresponding to the relatively dark substrate portion appear. Next, a temporary threshold is set at the position of the valley between the peak of the concentration distribution corresponding to the base portion and the peak of the concentration distribution corresponding to the pattern portion. The concentration distribution darker than the temporary threshold value is a range of the temporary concentration distribution of the base material portion, and the concentration value corresponding to the predetermined deviation value in the temporary concentration distribution of the base material portion becomes the next temporary threshold value. This process is repeated until the temporary threshold almost converges, and the binary image for inspection is acquired by binarizing the multi-value digital image of a board | substrate with a convergence value as the binarization threshold for inspection.

By the way, in the inspection apparatus of document 1, when there exists much noise by a diffuse reflection etc. in the area | region corresponding to the base-material part (namely, the part in which a pattern is not formed) of a board | substrate in the multi-gradation digital image of a board | substrate, The threshold value is determined based on the maximum value of the noise that is brighter than the density of the original substrate portion. For this reason, when generating a binary image for inspection, there exists a possibility that the short circuit part displayed darker than a normal wiring pattern in an original multi-gradation digital image may become below a threshold value, and a short circuit part may not be detected as a defect.

In addition, when the wiring pattern detected by the temporary threshold value is enlarged, the enlargement is performed at an appropriately determined magnification. Therefore, it is unclear whether the width of the wiring pattern after the enlargement is equal to the width of the actual wiring pattern. It is difficult to improve the accuracy. In particular, in the case where the edge of the wiring pattern is not smooth (i.e., there are minute irregularities in the edge) or by the irregular reflection at the edge of the pattern, the part near the edge in the multi-gradation digital image is unstable (that is, clearly The width of the wiring pattern after enlargement becomes smaller than the width of an actual wiring pattern in a part of wiring pattern, and the threshold for inspection is determined based on the density | concentration of the edge vicinity brighter than the density | concentration of a base material part, There is this. As a result, defects, such as a short circuit part, cannot be detected.

Also in the apparatus of Document 2, when there is much noise in the base portion or when the edge vicinity of the wiring pattern in the multi-value digital image is unstable, the valley between the peak of the concentration distribution of the base portion and the peak of the concentration distribution of the pattern portion Since the frequency of increases, there is a possibility that the binarization threshold for inspection converges to a large value. Therefore, there is a limit in improving the accuracy of defect detection.

This invention is for the defect detection method which detects the defect of the geometric pattern on a board | substrate, and when detecting the defect of the pattern on a board | substrate, the threshold value for binarizing a to-be-tested image and generating the processed image for inspection is highly accurate. It aims to save road.

The defect detection method includes a) a process of acquiring a multi-gradation inspected image of a substrate; b) a process of extracting an edge from the inspected image to generate an edge image; and c) expanding the edge image of the edge image. D) removing the edges expanded in the step c) from the inspected image to generate an edge-removed image; and e) acquiring a density histogram of pixels of the edge-removed image. F) obtaining a maximum concentration of a concentration distribution corresponding to a region other than the pattern of the substrate in the concentration histogram or a value exceeding the maximum concentration by a predetermined offset value as a threshold; g) the blood Binarizing the inspection image by the threshold to generate a processed image; and h) the panel on the substrate based on the processed image. And detecting a defect in the turn. According to the present invention, since the density distribution corresponding to the pattern and the density distribution corresponding to the region other than the pattern are clearly separated in the density histogram, the threshold for generating the processed image can be obtained with high accuracy. As a result, the defect of a pattern can be detected with high precision.

In a preferred embodiment of the present invention, the step b) performs an edge extraction filter process on the inspected image to generate an edge candidate image that is a multi-gradation image from which an edge candidate that is the candidate for the edge is extracted. And binarizing the edge candidate image by an edge extraction threshold to extract the edge from the edge candidate to generate the edge image. Thereby, the extraction accuracy of an edge can be improved.

In another preferred embodiment of the present invention, the step b) comprises: binarizing the inspected image by a temporary threshold to generate a temporary binary image, and extracting the edge from the temporary binary image; A step of generating an image is provided. This can simplify the extraction of the edges.

In still another embodiment of the present invention, the method further includes performing a noise removing process on the edge image between the step b) and the step c). Thereby, the extraction accuracy of an edge can be improved.

In the defect detection method, Preferably, the said pattern on the said board | substrate is a wiring pattern, and in the said h) process, the short circuit of the said wiring pattern is detected as the said defect.

This invention also aims at the defect detection apparatus which detects the defect of the geometric pattern on a board | substrate.

The above objects and other objects, features, aspects, and advantages will be apparent from the following detailed description of the invention made with reference to the accompanying drawings.

FIG. 1: is a figure which shows the structure of the defect detection apparatus 1 which concerns on 1st Embodiment of this invention. The defect detection apparatus 1 is an apparatus which detects the defect of the pattern to be inspected from the board | substrate with which the geometric pattern was formed in the main surface of the board | substrate main body. In this embodiment, the short circuit (namely, short) of the wiring pattern on a printed wiring board (henceforth "substrate") is detected as a defect by the defect detection apparatus 1.

The defect detection apparatus 1 is provided to the imaging part 3 and the imaging part 3 which image the stage 2 holding the board | substrate 9, the board | substrate 9, and acquire the multi-gradation image of the board | substrate 9. A computer 4 constituted by a stage driver 21 for relatively moving the stage 2 relative to the stage 2, and a CPU for performing various arithmetic operations, a memory for storing various kinds of information, and the like, wherein the computer 4 detects a defect. Each configuration of (1) is controlled.

The imaging unit 3 enters an illumination unit 31 that emits illumination light, an optical system 32 that induces illumination light onto the substrate 9, and at which light from the substrate 9 enters, and an optical system 32. It has an imaging device 33 which converts the image of the board | substrate 9 formed into an electrical signal, and the image data of the board | substrate 9 is output from the imaging device 33. FIG. The stage driver 21 has a mechanism for moving the stage 2 in the X direction and the Y direction in FIG. 1. In addition, in this embodiment, although the image is acquired by the imaging part 3 using the illumination light which is visible light, you may acquire an image using an electron beam, an ultraviolet-ray, X-rays, etc., for example.

FIG. 2 is a block diagram showing, together with other configurations, the functions realized by the CPU of the computer 4 executing arithmetic processing in accordance with a program in the storage device. In the defect detection apparatus 1, the edge candidate extracting section 41, the edge extracting section 42, the noise removing section 43, the expansion processing section 44, the edge removing section 45, the histogram obtaining section 51, Each function of the threshold value acquisition unit 52, the processed image generation unit 53, the defect detection unit 54, and the storage unit 55 is realized by the computer 4. In the storage unit 55, a reference image which is a binary image of a normal (that is, no defect) substrate is stored in advance, and the reference image is used for defect detection of the substrate 9 described later.

3 is a diagram illustrating a flow of a process in which the defect detection apparatus 1 detects a defect on the substrate 9. 4A to 4G are diagrams showing a part of the image acquired or generated in the defect detection diagram by the defect detection apparatus 1.

In the defect detection apparatus 1 shown in FIG. 1, the predetermined | prescribed inspection area | region on the board | substrate 9 is first moved to the imaging position by the imaging part 3 by the stage drive part 21, and the inspection area | region of the board | substrate 9 is carried out. The multi-gradation image (256-gradation multi-gradation image in this embodiment) is acquired and output to the computer 4 (step S11). 4: A is a figure which shows a part of image 81 acquired by the imaging part 3 (Hereinafter, it is called "the to-be-tested image 81."), In the to-be-tested image 81, the illumination part 31 is shown. (See FIG. 1), the background region other than the wiring pattern 91 having a large pixel value (i.e., being brightly displayed) and having a relatively low reflectance having a pixel corresponding to the wiring pattern 91 having a relatively high reflectance with respect to the light from FIG. (In this embodiment, the pixel corresponding to the board | substrate main body 92 has small pixel value (namely, it is displayed in dark).

In the computer 4, the data of the inspected image 81 acquired by the imaging unit 3 is stored in the storage unit 55 shown in FIG. 2 and sent to the edge candidate extracting unit 41. The edge candidate extracting section 41 applies an edge extraction filter (Sobel filter in this embodiment) to the data of the inspection target image 81 to perform edge extraction filter processing, as shown in FIG. 4B, as described later. An edge candidate image 82 which is a 256-gradation multi-gradation image from which an edge candidate which is an edge candidate to be extracted is extracted is generated (step S12). In FIG. 4B, a partial region corresponding to FIG. 4A of the edge candidate image 82 is shown (the same also in FIGS. 4C to 4G). In addition, in the defect detection apparatus 1, various processes are performed with respect to the data of the several image containing the to-be-tested image 81, As mentioned later, in the following description, the process with respect to the data of an image is performed, It is simply expressed as "processing for an image".

The edge here is a boundary between regions of different densities in the inspection target image 81 (see FIG. 4A), and the actual wiring pattern 91 and the substrate main body 92 on the substrate 9 shown in FIG. 4B. The peripheral portion of the boundary portion 93, the wiring pattern 91, and the diffuse reflection portion on the substrate main body 92 (i.e., the portion that should be expressed at substantially the same concentration but is different from the surrounding portion). This means a boundary portion 94 having a large difference in concentration between and. In addition, the edge candidate simply refers to what is obtained by the edge extraction filter process, and in addition to the edge, the boundary portion of the diffuse reflection portion or the like whose density difference with the surrounding portion is not so large (that is, the wiring pattern 91 in FIG. 4B). In the image and the like, and a minute region appearing in light gray that is darker than the edges).

Next, in the edge extracting section 42 (see FIG. 2), the edge candidate image 82 is set by a predetermined edge extraction threshold value (128 which is the intermediate value of the density range of the edge candidate image 82 in the present embodiment). By binarization, the edge candidate is removed from the diffuse reflection part and the like with a small difference in concentration with the surrounding part, and only the edge to be noted is extracted. Then, as shown in Fig. 4C, the edge extraction unit 42 displays the edges in white and the portions other than the edges in black (that is, the pixel values of the pixels constituting the edges become "1", An edge image 83 that is a binary image in which pixel values of pixels other than the edges is " 0 " is generated (step S13).

When the edge image 83 is generated, a noise filter is applied to the edge image 83 in the noise removing unit 43 (see FIG. 2) to perform a noise removing process, as shown in FIG. 4D. Relatively smaller ones of the edges in the image 83 are removed as noise, and only relatively large edges are extracted and displayed in white (step S14). In the present embodiment, when each pixel in the edge image 83 includes a pixel having a pixel value of "0" in eight pixels near the pixel of interest (that is, eight pixels surrounding the pixel of interest). Shrinkage processing is performed so that the pixel value of the pixel of interest is "0". Then, for each pixel in the edge image 83 after the shrinkage processing, a pixel having a pixel value of "1" is included in eight pixels near the pixel of interest. In this case, noise is eliminated by performing an expansion process (also called a diffusion process) in which the pixel value of the pixel of interest is "1".

Next, an expansion process (diffusion process) is performed in the expansion processing unit 44 (see FIG. 2) with respect to the edge of the edge image 83 on which the noise removal process has been performed (that is, the edge indicated in white in FIG. 4D). Is performed, and as shown in Fig. 4E, an edge expanded image 84 is generated (step S15). In this embodiment, when each pixel in the edge image 83 includes a pixel whose pixel value is "1" in eight pixels near the pixel of interest, an expansion process of setting the pixel value of the pixel of interest to "1" is performed. The predetermined number of times is performed.

When the edge expanded image 84 is generated, the inspected image 81 which is a multi-gradation image accommodated in the storage unit 55 (see FIG. 2) by the edge removing unit 45 (see FIG. 2) in step S11. (See FIG. 4A) and the negative AND (NAND) of the edge expanded image 84 which is a binary image are obtained (exactly, the inspection subject image 81 is masked by the edge expanded image 84). As a result, the expanded edge of the edge expanded image 84 shown in FIG. 4E is removed from the inspected image 81 shown in FIG. 4E (that is, in the inspected image 81, the edge expanded image ( 84, the pixel value of the pixel group corresponding to the on-bit part whose pixel value is "1" becomes "0", and as shown in FIG. 4F, the edge-removed image 85 is produced (step S16).

Subsequently, the histogram acquiring unit 51 (refer to FIG. 2) performs pixel density (that is, pixel value) and pixel corresponding to each density (that is, having each pixel value) in the edge-removed image 85. The relationship between the frequency of appearances is obtained, and as shown in Fig. 5, a density histogram 89 of pixels of the edge-removed image 85 is obtained (step S17). In the density histogram 89, the horizontal axis represents the density of the pixel, and the vertical axis represents the frequency of appearance of the pixel corresponding to each density (that is, the number of pixels). As shown in FIG. 5, in the concentration histogram 89, there is a first concentration distribution having a concentration corresponding to a peak value of about 50 and a second concentration distribution having a concentration corresponding to a peak value of about 220. The first density distribution is a distribution of pixels corresponding to a relatively dark substrate body 92 (see FIG. 4F), and the second concentration distribution is a distribution of pixels corresponding to a relatively bright wiring pattern 91 (see FIG. 4F). to be. In the density band between both density distributions, the frequency of the pixel is zero.

Next, the threshold value acquisition part 52 (refer FIG. 2) makes the maximum density | concentration of the 1st density distribution corresponding to the board | substrate main body 92 of the board | substrate 9 based on the density | histogram 89 (this embodiment). In this case, "73" is obtained as the threshold for inspection (step S18). Then, by the processed image generating unit 53 (see FIG. 2), the inspected image 81 is binarized by the threshold for inspection, and the processed image 86 that is a binary image shown in FIG. 4G ( In this embodiment, the pixel value of the pixel whose pixel value in the to-be-tested image 81 is "73" or less becomes "0", and the binary image whose pixel value of the pixel whose pixel value is larger than "73" became "1" is produced | generated. (Step S19).

When the processed image 86 is formed, the processed image 86 is processed by the defect detection unit 54 (see FIG. 2), and the reference image 80 shown in FIG. 6 previously stored in the storage unit 55. (That is, a binary image of a normal substrate), a defect of the wiring pattern 91 on the substrate 9 is detected (step S20). Specifically, the processed image 86 and the reference image 80 are compared after the alignment is performed by pattern matching or the like, and are surrounded by a circle 911 shown by broken lines in the processed image 86 of FIG. 4G. As shown in the figure, a portion that protrudes from the wiring pattern 91 differently from the reference image 80 is detected as a defect (that is, a short circuit portion of the wiring pattern 91). In the defect detection apparatus 1, as needed, the image of the other test | inspection area | region on the board | substrate 9 is acquired as a test | inspection image, and defect detection based on the said test | inspection image is performed.

Next, an example of the conventional defect detection apparatus which calculates | requires the threshold for inspection at the time of generating a binary image from the to-be-tested image which is a multi-gradation image from the density | concentration histogram of the pixel of a to-be-tested image (hereinafter, "a defect detection apparatus of a comparative example"). The apparatus shown in Japanese Patent Application Laid-open No. Hei 8-220013 is briefly described. In addition, in the following description, a defect is detected based on the same to-be-tested image shown to FIG. 4A.

In the defect detection apparatus of the comparative example, the density histogram 789 of the pixel shown in FIG. 7 is obtained from the inspection target image obtained by the imaging unit. As shown in FIG. 7, in the concentration histogram 789, the peak of the concentration distribution (that is, the peak on the right side in FIG. 7) corresponding to the relatively bright wiring pattern and the peak of the concentration distribution corresponding to the relatively dark substrate body. (That is, the peak on the left side in FIG. 7) is shown, and the frequency corresponding to each concentration in the valley portion between both peaks is not zero. The valley between the two peaks corresponds to the pixel group constituting the actual wiring pattern and the edge which is the boundary between the boundary portion or the diffuse reflection portion of the substrate main body and the surrounding portion.

In the defect detection apparatus of the comparative example, a temporary threshold is set at the position of the valley between both peaks of the concentration histogram 789, and the concentration distribution of the darker side (i.e., the left side in FIG. 7) than the temporary threshold is set to the substrate main body. As a corresponding temporary concentration distribution, a density (ie, a pixel value) corresponding to a predetermined deviation value in the temporary concentration distribution of the substrate main body becomes the next temporary threshold value. This process is repeated until the temporary threshold almost converges, and the convergence value becomes the inspection threshold. In this case, from the density histogram 789 shown in FIG. 7, "105" is obtained as an inspection threshold value, and the inspection subject image is binarized by the inspection threshold value, and the processed image which shows a part of it in FIG. 786 is generated.

By the way, when a short circuit occurs between the actual wiring patterns on the substrate, the short circuit portion has a smaller reflectance than the normal wiring pattern, and the cross-sectional shape is rounder than that of the normal wiring pattern, so that reflected light divergence easily occurs. For this reason, the short circuit portion is darker than the normal wiring pattern in the inspection target image (that is, the pixel value of each pixel corresponding to the short circuit portion is reduced).

In the defect detecting apparatus of the comparative example, the influence of the frequency corresponding to the edge existing between the peak of the concentration distribution corresponding to the wiring pattern in the concentration histogram 789 and the peak of the concentration distribution corresponding to the substrate main body is actually used. The pixel value "105" larger than the maximum density of the density distribution of the substrate main body is obtained as the inspection threshold value, and the inspected image is binarized by the inspection threshold value to generate a processed image 786. For this reason, in the processed image 786, as shown by the circle | round | yen 912 shown with a broken line in FIG. 8, the pixel value of the most pixel of the pixel group corresponding to a short circuit part becomes "0", and a short circuit is carried out. Wealth becomes unclear. As a result, in the defect detection apparatus of the comparative example, in the detection of a defect by comparison of the processed image 786 with the reference image, there is a possibility that a short-circuit part that is actually present is not detected as a defect.

On the other hand, in the defect detection of the wiring pattern 91 by the defect detection apparatus 1 which concerns on this embodiment, the edge removal completed image 85 from which the edge was removed from the to-be-tested image 81 (refer FIG. 4A). (FIG. 4F) is generated, and the inspection threshold is obtained based on the density histogram 89 (see FIG. 5) of the pixels of the edge-finished image 85. FIG. In the concentration histogram 89, as described above, the edges are removed to correspond to the concentration distribution corresponding to the wiring pattern 91 and the background region other than the wiring pattern 91 (that is, the substrate main body 92). In the concentration bands between the density distributions (that is, the concentration bands corresponding to the edges), the frequency of the pixel becomes zero, and the density distribution corresponding to the wiring pattern 91 and the density distribution corresponding to the substrate main body 92 are made clear. Are separated. For this reason, by making the maximum density | concentration of the density | concentration distribution corresponding to the board | substrate main body 92 into a test | inspection threshold value, a test | inspection threshold value can be calculated | required with high precision, As a result, the defect of the wiring pattern 91 of the board | substrate 9 is precisely corrected. It can be detected highly.

In addition, in the generation of the edge-removed image 85, by removing the expanded edge from the inspected image 81, the edges of the edge-removed image 85 are surely prevented from remaining. As a result, in the density histogram 89, the density distribution corresponding to the wiring pattern 91 and the concentration distribution corresponding to the substrate main body 92 can be separated more clearly, and as a result, the processed image 86 The threshold for inspection for generating) is more accurately obtained.

As described above, in the defect detection apparatus 1, since the binarization of the inspection target image 81 is performed by the inspection threshold value obtained with high accuracy, it is difficult to detect compared to the disconnection (ie, open) of the wiring pattern 91. It can be said that it is especially suitable for the detection of the short circuit of the wiring pattern 91 (that is, high detection accuracy is required).

In the defect detection apparatus 1, after performing an edge extraction filter process on the to-be-tested image 81 to generate the edge candidate image 82 (refer FIG. 4B), the edge candidate image 82 is set to 2 by an edge extraction threshold. The edge image 83 (see Fig. 4C) is generated by digitizing. As a result, when a weak edge is removed from the edge candidate extracted by the edge extraction filter process, and the extraction accuracy of the edge is improved, when the edge 85 has been removed from the inspected image 81, it is regarded as an edge. Excessive increase in the number of pixels to be removed (that is, pixels whose pixel value becomes "0") is prevented. As a result, a highly accurate concentration histogram 89 can be obtained, and the threshold for inspection can be obtained with higher accuracy.

In addition, the noise removal process is performed on the edge image 83 between the generation of the edge image 83 and the expansion processing for the edge, so that the noise is removed from the edge image 83. As a result, the extraction accuracy of the edge to be removed from the inspection target image 81 is further improved, and the inspection threshold can be obtained with higher accuracy.

9A and 9B are diagrams each showing a part of the inspection target image 81a and the processed image 86a of another substrate on which defect detection is performed by the defect detection apparatus 1 according to the present embodiment, and FIG. 9C. Is a diagram showing a part of the processed image 786a of the other substrate when the defect inspection is performed by the defect detection apparatus of the comparative example described above. 10A and 10B are diagrams similarly showing a part of the inspection target image 81b and the processed image 86b of another substrate acquired or generated by the defect detection apparatus 1, and FIG. 10C is a comparative example. It is a figure which shows a part of the processed image 786b of the said other board | substrate produced | generated by the defect detection apparatus.

9A to 9C and 10A to 10C, in the defect detection apparatus 1 according to the present embodiment, a short circuit portion that is a defect of a wiring pattern that is difficult to detect in the defect detection apparatus of the comparative example (FIG. In FIG. 9B and FIG. 10B, the circle | round | yen shown by the broken line is shown surrounded by dashed lines.) Is detected with high precision.

Next, the defect detection apparatus which concerns on 2nd Embodiment of this invention is demonstrated. 11 is a diagram illustrating a function realized by the computer 4 of the defect detection apparatus according to the second embodiment. As shown in FIG. 11, the defect detection apparatus which concerns on 2nd Embodiment is provided with the temporary binary image generation part 41a instead of the edge candidate extraction part 41 shown in FIG. The other structure and the function implemented by the computer 4 are the same as that of 1st Embodiment, and attach the same code | symbol in the following description.

The flow of defect detection by the defect detection apparatus according to the second embodiment is almost the same as that of the first embodiment, and only the points where steps S21 and S22 shown in FIG. 12 are performed instead of steps S12 and S13 shown in FIG. This is different. When defect detection is performed by the defect detection apparatus according to the second embodiment, first, the inspection target image 81 (see FIG. 4A) is acquired by the imaging unit 3, similarly to the first embodiment, and is shown in FIG. 11. The temporary binary image generating unit 41a and the storage unit 55 are shown (Fig. 3: Step S11).

Subsequently, in the temporary binary image generating unit 41a, the inspected image 81 is binarized by a predetermined temporary threshold to generate a temporary binary image (step S21). The temporary threshold value may be predetermined, for example, stored in the storage unit 55, and the application of the method used when obtaining the inspection threshold value in the defect detection apparatus of the comparative example described above is applied to the inspected image 81. You may be saved. When the temporary binary image is generated, the edge extracting section 42 applies an edge extraction filter to the temporary binary image to perform edge extraction filter processing, thereby generating an edge image that is a binary image (step S22). .

When the edge image is generated, similarly to the first embodiment, the noise removing processing in the noise removing unit 43, the expansion processing of the edges by the expansion processing unit 44, and the inspected image by the edge removing unit 45 are performed. Removal of edges after the expansion process, acquisition of the density histogram of the pixels of the edge-removed image by the histogram acquisition unit 51, calculation of the threshold for inspection based on the density histogram by the threshold value acquisition unit 52, and the processed image Generation of the processed image by the generation unit 53 and defect detection of the wiring pattern 91 on the substrate 9 by the defect detection unit 54 are sequentially performed (steps S14 to S20).

In the defect detection apparatus, similarly to the first embodiment, the inspection threshold for generating the processed image can be obtained with high precision, and as a result, the defect of the wiring pattern 91 of the substrate 9 can be detected with high accuracy. have. In the defect detection apparatus which concerns on 2nd Embodiment, an edge extraction filter process is performed after binarizing the to-be-tested image 81 by a temporary threshold value especially, and an edge is extracted from the to-be-tested image 81 which is a multi-gradation image. In comparison, the extraction of the edge is simplified.

As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, A various change is possible.

For example, in the defect detection apparatus 1 which concerns on 1st Embodiment, various things, such as a gradient filter, a Laplacian filter, Roberts filter, may be used as an edge extraction filter used for extraction of an edge candidate in step S12. .

In the defect detection apparatus which concerns on the said embodiment, other noise filters, such as a median filter, may be used as a noise filter used for the noise removal process in step S14. In addition, a labeling process may be performed on the edge image, and a minute of the plurality of labeled regions may be removed as noise.

In the density histogram acquired by the histogram acquisition unit 51 in step S17, in the concentration band between the first concentration distribution corresponding to the substrate main body and the second concentration distribution corresponding to the wiring pattern, the number of pixels is almost zero. In this case, in step S18, the threshold value for which the pixel count is almost zero is not included in the first density distribution, and the threshold for inspection is determined.

In addition, in step S18, the maximum density of the concentration distribution corresponding to the substrate main body 92 does not necessarily have to be a threshold for inspection, and exceeds the maximum concentration by a predetermined offset value (for example, "5"). The value (that is, the value near the maximum concentration) may be an inspection threshold. In addition, in the defect detection in step S20, the image guide | induced from the design data of the board | substrate 9 may be used as a reference image, disconnection of a wiring pattern, etc. may be detected as a defect.

The number of gradations of the multi-gradation image generated in the defect detection apparatus need not necessarily be 256 gradations, and may be appropriately determined based on the inspection precision and inspection speed required for defect detection, the computational performance of the defect detection apparatus, and the like.

In the defect detection apparatus which concerns on the said embodiment, when a wiring pattern is formed on the film etc. provided on the board | substrate main body, the said film etc. are considered a part of board | substrate main body, for example, the film in the to-be-tested image 81 The area corresponding to is treated as a background area other than the wiring pattern. In addition, the board | substrate 11 in which defect detection is performed by the defect detection apparatus does not necessarily need to be a printed wiring board, but may be a semiconductor substrate, a glass substrate, etc.

While this invention has been described and described in detail, the foregoing description is illustrative and not restrictive. Accordingly, it will be understood that many variations and aspects are possible without departing from the scope of this invention.

1 is a diagram illustrating a configuration of a defect detection device according to a first embodiment;

2 is a block diagram showing a function realized by a computer;

3 is a view showing a flow of a process for detecting a defect;

4A is a diagram illustrating a part of an inspection subject image;

4B to 4F are views showing a part of an image generated on a defect detection drawing,

4G is a diagram showing a part of the processed image;

5 is a diagram showing a density histogram of an edge-removed image;

6 is a diagram illustrating a part of a reference image;

7 is a diagram showing a concentration histogram acquired by a defect detection apparatus of a comparative example;

8 is a diagram showing a part of the processed image generated by the defect detection apparatus of the comparative example;

9A is a view showing a part of an inspection target image of another substrate;

9B is a view showing a part of a processed image of another substrate;

9C is a diagram showing a part of a processed image of another substrate generated by the defect detection apparatus of the comparative example;

10A is a diagram showing a part of an inspection target image of another substrate;

10B is a view showing a part of a processed image of another substrate;

10C is a view showing a part of the processed image of another substrate generated by the defect detection apparatus of the comparative example;

11 is a block diagram showing a function realized by a computer of a defect detection apparatus according to a second embodiment;

12 is a diagram illustrating a part of the flow of a process for detecting a defect.

Claims (7)

As a defect detection method for detecting a defect of a geometric pattern on a substrate, a) a process of acquiring inspection images of multiple gradations of the substrate; b) extracting an edge from the inspected image to generate an edge image; c) performing expansion processing on the edge of the edge image; d) removing the edges expanded in the step c) from the inspected image to generate an edge-removed image; e) obtaining a density histogram of pixels of the edge-removed image; f) obtaining a maximum concentration of a concentration distribution corresponding to a region other than the pattern of the substrate in the concentration histogram or a value exceeding the maximum concentration by a predetermined offset value as a threshold; g) binarizing the inspected image by the threshold to generate a processed image; h) A defect detection method comprising the step of detecting a defect of the pattern on the substrate based on the processed image. The method according to claim 1, B) process, Performing an edge extraction filter process on the inspected image to generate an edge candidate image which is a multi-gradation image from which an edge candidate serving as the edge candidate is extracted; And binarizing the edge candidate image by an edge extraction threshold to extract the edge from the edge candidate to generate the edge image. The method according to claim 1, B) process, Generating a temporary binary image by binarizing the inspected image by a temporary threshold value; And a step of generating the edge image by extracting the edge from the temporary binary image. The method according to any one of claims 1 to 3, And a step of performing a noise removing process on the edge image between the step b) and the step c). The method according to claim 4, The pattern on the substrate is a wiring pattern, In the step h), a short circuit of the wiring pattern is detected as the defect. The method according to any one of claims 1 to 3, The pattern on the substrate is a wiring pattern, In the step h), a short circuit of the wiring pattern is detected as the defect. A defect detection device for detecting a defect of a geometric pattern on a substrate, An imaging unit for imaging the substrate, An edge extraction unit for extracting edges from the multi-gradation inspected image acquired by the imaging unit to generate an edge image; An expansion processing unit that performs expansion processing on the edge of the edge image; An edge removal unit which removes the edges expanded by the expansion processing unit from the inspected image to generate an edge-removed image; A histogram acquisition unit for acquiring a density histogram of pixels of the edge-removed image; A threshold value acquisition section for obtaining a maximum concentration of a concentration distribution corresponding to a region other than the pattern of the substrate in the concentration histogram or a value near the maximum concentration as a threshold; A processed image generating unit configured to binarize the inspected image by the threshold to generate a processed image; And a defect detection unit that detects a defect of the pattern on the substrate based on the processed image.

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