KR20090056364A

KR20090056364A - Layer short protection circuit of transformer

Info

Publication number: KR20090056364A
Application number: KR1020070123482A
Authority: KR
Inventors: 장민석
Original assignee: 엘지이노텍 주식회사
Priority date: 2007-11-30
Filing date: 2007-11-30
Publication date: 2009-06-03

Abstract

The present invention relates to a layer short circuit protection circuit of a transformer.

The present invention PWM PWM for controlling the drive state of the inverter; A first comparator comparing the inverter drive signal with the master feedback current and switching the COMP terminal potential of the PWM IC to "high" or "low" according to the result; And a second comparator for comparing the inverter driving signal with the slave feedback current and converting the COMP terminal potential of the PWM IC to "high" or "low" according to the result.

Description

Layer short protection circuit of transformer

1 is a diagram for explaining a short circuit state of a transformer;

Figure 2 is a layer short circuit protection circuit diagram of a transformer according to an embodiment of the present invention.

100: PWM IC

U1, U2: comparators

(R1, R2), (R3, R4), (R5, R6): voltage divider

D1, D2: diode for reverse protection

IM, IS: feedback current

REG: drive signal

In general, in case of a BLU (Back Light Unit) constituting a backlight using an external electrofluorescent lamp (EEFL) in an LCD display device, a transformer for generating a high voltage driving the EEFL is used.

The transformer has a configuration in which a plurality of thin wires are wound outside the core as shown in FIG. 1, and a phenomenon in which a layer is shorted may occur due to winding failure or aging.

In order to drive the EEFL, a pair of transformers for supplying high voltages to the left and right connectors of the EEFL, respectively, must be configured, and the current supplied to the EEFL is referred to as a master current IM and a slave current IS, respectively.

However, as described above, when a short circuit occurs in any one of a pair of transformers for supplying a master or slave current, the output current may be pulled out in the remaining transformers, resulting in a sudden increase in output current. do.

As a result, the temperature of the transformer in a steady state rises rapidly and a failure such as fire or short circuit occurs.

The present invention can protect other transformers and component circuits even if the transformer is shorted.

In one embodiment of the present invention, the voltage divider may further include a first voltage divider for dividing the inverter driving signal to a predetermined level.

The apparatus may further include a reversal prevention diode that prevents the reverse flow of the master feedback current.

The apparatus may further include a reversal prevention diode that prevents the reverse flow of the slave feedback current.

The apparatus may further include a second voltage divider resistor for dividing the master feedback current.

The apparatus may further include a third voltage divider resistor for dividing the slave feedback current.

The first comparator may negatively input a voltage divided by the first voltage divider resistor, and positively input a voltage divided by the second voltage divider resistor, thereby receiving a potential of the COMP terminal of the PWM IC according to the result. Switch to "high" or "low" state.

In addition, the second comparator receives the voltage divided by the first voltage divider negatively, positively receives the voltage divided by the third voltage divider, and accordingly results in the potential of the COMP terminal of the PWM IC. Switch to "high" or "low" state.

The PWM IC normally operates the inverter when the COMP terminal is in the "high" state, and stops the operation of the inverter when the COMP terminal is in the "low" state.

Hereinafter, exemplary embodiment (s) of the present invention will be described in detail with reference to the accompanying drawings.

2 is a layer short circuit protection circuit diagram of a transformer according to an exemplary embodiment of the present invention.

Referring to FIG. 2, a first voltage dividing resistor R1 and R2 for dividing the drive signal REG of the inverter, a reversal prevention diode D1 for preventing a reverse flow of the returned master current IM, and the reversal prevention The second voltage divider resistors R3 and R4 for dividing the output of the diode D1; The third voltage divider R5 and R6 to be divided and the voltage divided by the first voltage divider R1 and R2 are negatively input, and the voltage divided by the second voltage divider R3 and R4 is positively received. A first comparator U1 for controlling the potential of the COMP terminal of the PWM IC 100 to a "high" or "low" state according to the result of the comparison, and the divided voltage in the first voltage divider R1 and R2. The negative voltage is input, and the voltage divided by the third voltage divider R5 and R6 is positively input and compared. W consists of the potential of the COMP terminal of the PWM IC (100) to the second comparator (U2) for controlling to "high" or "low" state according to the result.

Here, the COMP terminal of the PWM IC 100 is a low voltage / high voltage protection terminal that detects a low voltage / high voltage state on the load side and protects a circuit.

In addition, the voltage level divided by the first voltage dividing resistors R1 and R2 for dividing the driving signal REG is set lower than the level of the voltage detected when the transformer is in a steady state.

That is, when the transformer is in a steady state, each of the feedback currents IM and IS is at a normal level, and the master feedback current IM is divided by the second voltage divider resistors R3 and R4 to the positive of the first comparator U1. The potential supplied is higher than the potential supplied to the negative of the first comparator U1 by dividing the driving signal REG by the first voltage divider R1 and R2.

In addition, the potential supplied to the positive terminal of the second comparator U1 by dividing the slave feedback current IS by the third voltage divider R5 and R6 may generate the driving signal REG from the first voltage divider R1 and R2. The voltage is higher than the potential supplied by the partial pressure to the negative of the first comparator U1.

Therefore, the outputs of the first comparator U1 and the second comparator U2 are in a “high” state, whereby the COMP terminal of the PWM IC 100 maintains a predetermined potential, and the PWM IC 100 turns off the inverter. Operate normally.

On the other hand, when one of the transformers is shorted, the output current is drawn to the other transformer. For example, assuming that the transformer supplying the master current is shorted, the master feedback current IM decreases below a predetermined level. The slave feedback current IS rises rapidly.

That is, the potential supplied to the positive terminal of the first comparator U1 by dividing the master feedback current IM from the second voltage divider R3 and R4 may generate the driving signal REG from the first voltage divider R1 and R2. Partial pressure is lower than the potential supplied to the negative of the first comparator U1.

Therefore, the output of the first comparator U1 is in the "low" state, and the output of the second comparator U2 is in the "high" state, so that the potential of the COMP terminal of the PWM IC 100 is changed to the first comparator ( The potential is " 0 " by U1) and the PWM IC 100 stops the inverter immediately.

This case also applies when the transformer supplying the slave current is shorted.

Therefore, the inverter can be stopped immediately in response to the short circuit of the transformer to protect the circuit.

As described above, in the detailed description of the present invention, specific embodiment (s) have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiment (s), but should be defined by the claims below and equivalents thereof.

According to the present invention, the inverter can be immediately stopped in response to a short circuit of the transformer to protect the circuit safely.

Claims

PWM IC for controlling the drive state of the inverter;

A first comparator comparing the inverter drive signal with the master feedback current and switching the COMP terminal potential of the PWM IC to "high" or "low" according to the result; And

And a second comparator for comparing the inverter drive signal with a slave feedback current and switching the COMP terminal potential of the PWM IC to "high" or "low" according to the result.

The method of claim 1,

And a first voltage divider resistor for dividing the inverter drive signal to a predetermined level.

The method of claim 1,

The layer short circuit protection circuit of the transformer further comprises a reverse protection diode for preventing the reverse flow of the master feedback current.

The method of claim 1,

And a reversal prevention diode for preventing a reverse flow of the slave feedback current.

The method of claim 1,

And a second voltage divider resistor for dividing the master feedback current.

The method of claim 1,

And a third voltage divider resistor for dividing the slave feedback current.

The method according to claim 2 or 5,

The first comparator,

Negatively input a voltage divided by the first voltage divider;

And a voltage input from the second voltage divider resistor is positively input, and accordingly, the potential of the COMP terminal of the PWM IC is changed to a "high" or "low" state.

The method according to claim 2 or 6,

The second comparator,

Negatively input a voltage divided by the first voltage divider;

The voltage divided by the third voltage divider resistor is positively input, and according to the result, the potential of the COMP terminal of the PWM IC is switched to a "high" or "low" state.

The method of claim 1,

The PWM IC,

If the COMP terminal is in the "high" state, operate the inverter normally,

A layer short circuit protection circuit of the transformer to stop the operation of the inverter when the COMP terminal is "low" state.