KR20090044420A - Plasma process apparatus used for manufacturing semiconductor device - Google Patents
Plasma process apparatus used for manufacturing semiconductor device Download PDFInfo
- Publication number
- KR20090044420A KR20090044420A KR1020070110513A KR20070110513A KR20090044420A KR 20090044420 A KR20090044420 A KR 20090044420A KR 1020070110513 A KR1020070110513 A KR 1020070110513A KR 20070110513 A KR20070110513 A KR 20070110513A KR 20090044420 A KR20090044420 A KR 20090044420A
- Authority
- KR
- South Korea
- Prior art keywords
- unit
- wafer
- upper electrode
- unit electrodes
- electrodes
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32568—Relative arrangement or disposition of electrodes; moving means
Abstract
An upper electrode matrix disposed on an upper side of a process chamber in which a wafer is mounted and having unit electrodes independent of positional movement therebetween, and a lower electrode disposed opposite to the upper electrode matrix; And a power source connected to the upper electrode matrix and the lower electrode for plasma excitation.
Plasma, etching, deposition, uniformity, induced magnetic field
Description
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the manufacture of semiconductor devices, and more particularly, to a process apparatus using plasma.
Thin film deposition and etching processes have been used to integrate circuits constituting semiconductor devices on wafers. Process apparatuses using plasma in the deposition or selective etching of such thin films are used. The plasma processing apparatus includes a process chamber that provides a space and an environment in which a wafer process such as etching or deposition is performed, and an upper electrode is disposed above the process chamber and a lower electrode is disposed below the process chamber. . When RF (Radio Frequency) power is applied to the upper and lower electrodes, an induced magnetic field is induced between the upper and lower electrodes, and the process reaction gas is excited to the plasma state by the induced induced magnetic field change. The excited plasma arrives on the wafer, and reactive ions and the like in the plasma process react, whereby an etching reaction or a deposition reaction is performed on the wafer.
Since the thin film is substantially etched or deposited by the reactive ions produced by the excited plasma, the plasma process, such as etching or deposition, is dependent on the density or concentration and energy of the reactive ions. The density or concentration and energy of these reactive ions are substantially influenced by the plasma generation density, which is influenced by the voltage applied to the upper and lower electrodes and thus the distribution of the induced magnetic field.
The density distribution of the plasma or the concentration distribution of the reactive ions and the energy distribution reaching the wafer (or the etching target layer or the deposition target layer deposited on the wafer) are preferably induced to have a uniform distribution throughout the wafer region. Depending on the position of, different distributions can be seen. As a result, the etching (or deposition) speed may vary for each wafer region, so that a variation in the pattern size or the thickness of the deposited film may occur, which may result in deterioration or non-uniformity of product characteristics. In some cases, rather than inducing a uniform plasma density over the entire wafer area, it may be advantageous for pattern size uniformity or product characteristic uniformity to induce different plasma density for each wafer area.
While it is advantageous to the device characteristics or process uniformity to adjust or modify the distribution of the reaction plasma density induced on the wafer according to the process, the process of modifying the distribution of the reaction plasma density on a process-by-process basis allows the upper and lower electrodes to be substantially flat. Planar plate) in the form of a fixed state is practically difficult. Since the plasma is generated by using a fixed type of electrode, it is possible to change the power or bias of the plasma generating power source or to change the vacuum of the process chamber as a means for controlling the plasma distribution or characteristics. The solution may be limited. Nevertheless, it is substantially difficult to change the plasma distribution more freely per wafer region. Accordingly, in order to more precisely realize an etch bias and an etching uniformity, an improvement of a plasma processing apparatus capable of improving the uniformity of the plasma distribution or otherwise changing the plasma distribution for each wafer region is required.
An object of the present invention is to provide a plasma processing apparatus for manufacturing a semiconductor device capable of changing the plasma distribution for each wafer region.
One aspect of the invention, the process chamber (chamber) to which the wafer is mounted; An upper electrode matrix installed above the process chamber and arranged with unit electrodes having independent positional movements; A lower electrode disposed to face the upper electrode matrix and supporting the wafer; And a power source connected to the upper electrode matrix and the lower electrode for plasma excitation.
Connection axes connected to each of the unit electrodes of the upper electrode matrix; A driving unit driving the connecting shafts independently; And an electrode position adjusting unit configured to independently adjust the separation distance between the lower electrode and the unit electrodes by the driving unit by independently driving the connecting shafts up or down by the unit electrodes. present.
The electrode position adjusting unit may control the driving unit to drive the unit electrodes to move up, down, or horizontally independently of each other according to the set position information of the unit electrodes.
An embodiment of the present invention may provide a plasma processing apparatus for manufacturing a semiconductor device capable of changing the plasma distribution for each wafer region.
1 is a view for explaining a plasma processing apparatus for manufacturing a semiconductor device according to an embodiment of the present invention. Referring to FIG. 1, a plasma processing apparatus according to an embodiment of the present invention may include a flat
RF power is applied to the
The
Accordingly, the operator inputs the position coordinates of the
On the other hand, as described above, the
Since the first spacing d1 and the second spacing d2 are adjusted differently, the distribution of the induced magnetic field is also changed accordingly, and the plasma density generated is also changed. Since the mutual spacing between the
For example, in the etching process, a pattern size or pattern density to be formed on the
2 and 3 are diagrams for explaining a first embodiment of an upper electrode matrix according to an embodiment of the present invention. 2 and 3, the
4 and 5 are views for explaining a second embodiment of the upper electrode matrix according to the embodiment of the present invention. 2 and 3, in the
As such, in the exemplary embodiment of the present invention, the plasma density distribution may be differently adjusted for each region of the
1 is a view for explaining a plasma processing apparatus for manufacturing a semiconductor device according to an embodiment of the present invention.
2 and 3 are diagrams for explaining a first embodiment of an upper electrode matrix according to an embodiment of the present invention.
4 and 5 are views for explaining a second embodiment of the upper electrode matrix according to the embodiment of the present invention.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020070110513A KR20090044420A (en) | 2007-10-31 | 2007-10-31 | Plasma process apparatus used for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070110513A KR20090044420A (en) | 2007-10-31 | 2007-10-31 | Plasma process apparatus used for manufacturing semiconductor device |
Publications (1)
Publication Number | Publication Date |
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KR20090044420A true KR20090044420A (en) | 2009-05-07 |
Family
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Family Applications (1)
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KR1020070110513A KR20090044420A (en) | 2007-10-31 | 2007-10-31 | Plasma process apparatus used for manufacturing semiconductor device |
Country Status (1)
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KR (1) | KR20090044420A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018125381A3 (en) * | 2016-12-29 | 2018-08-09 | Applied Materials, Inc. | Apparatus for field guided acid profile control in a photoresist layer |
US11112697B2 (en) | 2015-11-30 | 2021-09-07 | Applied Materials, Inc. | Method and apparatus for post exposure processing of photoresist wafers |
KR20220042082A (en) * | 2018-02-05 | 2022-04-04 | 램 리써치 코포레이션 | Upper electrode having varying thickness for plasma processing |
-
2007
- 2007-10-31 KR KR1020070110513A patent/KR20090044420A/en not_active Application Discontinuation
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11112697B2 (en) | 2015-11-30 | 2021-09-07 | Applied Materials, Inc. | Method and apparatus for post exposure processing of photoresist wafers |
US11899366B2 (en) | 2015-11-30 | 2024-02-13 | Applied Materials, Inc. | Method and apparatus for post exposure processing of photoresist wafers |
WO2018125381A3 (en) * | 2016-12-29 | 2018-08-09 | Applied Materials, Inc. | Apparatus for field guided acid profile control in a photoresist layer |
KR20190092595A (en) * | 2016-12-29 | 2019-08-07 | 어플라이드 머티어리얼스, 인코포레이티드 | Device for Field-Induced Acid Profile Control in Photoresist Layers |
US10615058B2 (en) | 2016-12-29 | 2020-04-07 | Applied Materials, Inc. | Apparatus for field guided acid profile control in a photoresist layer |
JP2020515045A (en) * | 2016-12-29 | 2020-05-21 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | Device for field-induced acid profile control in photoresist layer |
KR20210107040A (en) * | 2016-12-29 | 2021-08-31 | 어플라이드 머티어리얼스, 인코포레이티드 | Apparatus for field guided acid profile control in a photoresist layer |
KR20220042082A (en) * | 2018-02-05 | 2022-04-04 | 램 리써치 코포레이션 | Upper electrode having varying thickness for plasma processing |
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