KR20090043761A - Apparatus for detecting a receiving signal information after fft processing and method thereof - Google Patents

Abstract

The present invention relates to a receiving signal information detecting apparatus and a receiving signal information detecting method for detecting information of a signal after a fast Fourier transform (FFT) processing at a receiving end of a system using an Orthogonal Frequency Multiplexing (OFDM) transmission scheme. More specifically, it detects the modulation scheme and pilot pattern of the received signal, detects the integer frequency offset through it, calculates the phase of the received signal and determines the phase of the received signal through this to obtain the initial information of the rear end of the FFT system. The present invention relates to a receiving signal information detecting apparatus and a receiving signal information detecting method capable of reducing the complexity and the amount of computation.

OFDM, FFT, Modulation Mode Detector, Pilot Pattern Detector, Integer Frequency Offset Detector, Phase Detector

Description

Apparatus for detecting a receiving signal information after FFT processing and method

The present invention relates to a receiving signal information detecting apparatus and a receiving signal information detecting method for detecting information of a signal after a fast Fourier transform (FFT) processing at a receiving end of a system using an Orthogonal Frequency Multiplexing (OFDM) transmission scheme. More specifically, it detects the modulation scheme and pilot pattern of the received signal, detects the integer frequency offset through it, calculates the phase of the received signal and determines the phase of the received signal through this to obtain the initial information of the rear end of the FFT system. The present invention relates to a receiving signal information detecting apparatus and a receiving signal information detecting method capable of reducing the complexity and the amount of computation.

In the case of high-speed data transmission over a wireless channel, a high bit error rate is caused by the effects of multipath fading, Doppler spread, and the like, and thus a wireless access method suitable for a wireless channel is required.

Orthogonal Frequency Division Multiplexing (“OFDM”) is a method suitable for high-speed data transmission in wired and wireless channels. It uses a plurality of carriers having mutual orthogonality, and thus has high frequency utilization efficiency. The inverse fast Fourier transform (IFFT) and the fast Fourier transform (FFT), respectively, has the advantage of high-speed modulation and demodulation.

The system using the OFDM transmission method processes data in symbol size (FFT size) unit instead of data in sample unit, so that symbol synchronization is performed to estimate the start position of a symbol. Decide

Frame synchronization can be classified into a case in which the starting point of the FFT is exactly located in the effective symbol section, a case in which the starting point of the FFT is located between the guard periods, and a case in which the starting point of the FFT is out of the guard period. If the starting point of the FFT is out of the protection interval, the phase of the received signal is damaged due to time synchronization error and intersymbol interference occurs. On the other hand, if the starting point of the FFT is located between the guard intervals, no inter-symbol interference occurs, but the time synchronization error appears as the phase rotation. If there is a time synchronization error within the guard interval, the performance can be improved by using a simple equalizer.However, phase rotation at the rear end of the FFT increases modulation mode detection, pilot pattern detection, and integer frequency offset detection error. It will have a big impact.

A system using the OFDM transmission scheme is more sensitive to frequency error than a single carrier system. In the single carrier system, the frequency error causes only a decrease in the signal-to-noise ratio (SNR), whereas in the OFDM system, when the received signal with the frequency error passes through the FFT, the orthogonality condition between the subcarriers is broken and interference between subcarriers occurs. In the OFDM system, since the influence of the frequency error depends on the degree of integer multiple error according to the subcarrier spacing, the frequency error is expressed as a multiple of the subcarrier frequency interval. Integer frequency error occurs because the oscillator performance of the receiver is much lower for the transmitter than the Doppler frequency shift due to movement or due to the performance degradation due to aging, and it is estimated by using a pilot symbol.

Compensating the integer frequency error includes a method using Morelli's algorithm, minimum energy detection, and pilot data.

The Morelli algorithm uses PN sequences to generate data while maintaining the same frequency spacing using two OFDM symbols, assuming the fractional frequency error has already been compensated. According to this method, in order to overcome the frequency selective fading environment, two contiguous symbols for frequency synchronization are used and the data size of the subcarrier is increased to increase the contribution of data to the frequency correlation. This method estimates the integer frequency offset using the correlation of the received signal, and has a problem in that the detection capability is degraded when the noise and the channel are largely affected.

The method using the minimum energy detection estimates an approximate frequency offset of a phase reference symbol (PRS) signal in a transmission frame using a minimum energy detection scheme. This method can be used even with low complexity and large time synchronization error. Null part has very little energy compared to data part because it has no data, so it creates a suitable window and calculates energy while moving the window to find the point with the smallest energy to compensate for the frequency error. However, there is a problem that this method cannot be used when there is no null data section.

The pilot data is a method of inserting pilot data on a frequency axis and using the information to obtain an integer frequency offset. This method arranges and transmits pilots already known at the receiving end at predetermined intervals or arbitrary intervals on the frequency axis of the transmitting end, and the receiving end estimates the integer frequency offset using the correlation between the pilot data and the pilot data in the received signal. However, this method requires a sufficient number of pilot data and the position and size information of the pilot should be known to the receiver.

The OFDM transmission system transmits signals by changing the modulation mode and pilot pattern in consideration of reception coverage, transmission power, terrain, and moving speed of the receiver. Detection is needed first. The modulation mode and pilot pattern must be detected quickly and accurately before the integer frequency offset and phase detection required by the receiving system, so that satisfactory performance is achieved regardless of noise or channel. In addition, it is possible to make the best use of the structure of the current receiver without additional processors possible, and the development of a simple algorithm with low complexity is urgently required.

The present invention has been made to solve the above problems, and in particular, the modulation scheme and pilot pattern of the received signal is detected, through which the integer frequency offset is detected, and the phase of the received signal is calculated through the phase of the received signal It is an object of the present invention to provide a reception signal information detection apparatus and a reception signal information detection method capable of acquiring the initial information of the rear end of the FFT and reducing the complexity and the calculation amount of the system by determining the.

In order to achieve the above object, a reception signal information detection apparatus according to the present invention is configured to receive information of a signal after fast Fourier transform (FFT) processing at a receiving end of a system using an orthogonal frequency multiplexing (OFDM) transmission scheme. In the signal information detecting apparatus, a plurality of delay signals obtained by delaying a signal output through the FFT unit by respective predetermined delay lengths are obtained, and after generating a first pilot signal pattern, multiplying them in parallel with the delay signals and by a predetermined length. A modulation mode detector configured to accumulate the power magnitudes of the summed first signals by a predetermined cumulative length and detect a modulation mode from a maximum power magnitude signal among the output signals; And generating a second pilot signal pattern and multiplying the signal with the signal output through the FFT unit to obtain a second signal, and multiplying the conjugate complex number of the delay signal by delaying the second signal by a predetermined delay length and multiplying the second signal. And a phase detector for calculating the phase of the output signal by summing by a predetermined length, accumulating by the predetermined cumulative length, and determining the phase of the received signal.

The modulation mode detector may further include a first pilot pattern generator configured to generate the first pilot signal pattern including a differential modulation information signal and a scattering pilot pattern; A first delayer for obtaining the delayed signal using a delay length determined according to an FFT mode; A parallel multiplier for multiplying the delay signal and the first pilot signal pattern in parallel; A first summer that sums the output signals of the parallel multipliers; A power magnitude calculator for calculating the power magnitude of the output signal of the first summer; A magnitude accumulator for accumulating magnitudes of output signals of the power magnitude calculator; And a maximum signal detector configured to compare an output signal of the magnitude accumulator and detect an output signal having a maximum magnitude.

The phase detector may further include: a second pilot pattern generator configured to generate a desired pilot pattern according to the modulation mode detected by the modulation mode detector and output the second pilot signal pattern; An extractor for extracting information data according to the detected modulation mode from an output signal of the FFT unit; And a multiplier configured to obtain the second signal and to generate a signal obtained by multiplying a complex number of a delay signal obtained by delaying the second signal by a predetermined delay length and the second signal.

The extractor may include: an SP extractor extracting information data corresponding to a scattering pilot when the detected modulation mode is synchronous modulation; And a Wi extractor for extracting information data corresponding to continuous pilot and asynchronous modulation information when the detected modulation mode is asynchronous modulation.

The apparatus for detecting received signal information may further include a pilot pattern detector for detecting a pilot pattern from an output signal of the modulation mode detector.

The pilot pattern detector may further include a pilot pattern calculator configured to receive the maximum power magnitude signal from the modulation mode detector and calculate a pilot pattern corresponding to a path of an input signal; And a pilot pattern determiner for determining a pilot pattern of the received signal from the pilot pattern of the output signal of the pilot pattern calculator.

The apparatus for detecting received signal information may further include an integer frequency offset detector for detecting an integer frequency offset based on an output signal of the modulation mode detector.

In addition, an integer frequency offset detector includes: a frequency delay calculator for receiving the maximum power magnitude signal from the modulation mode detector and calculating a frequency delay through path information; And an integer multiple frequency offset determiner that determines a frequency offset of the received signal from an output signal of the frequency delay calculator.

In addition, the frequency delay calculator calculates the frequency delay of the continuous pilot when the output signal of the FFT device is asynchronous modulation, and calculates the frequency delay of the scattering pilot when the output signal of the FFT device is synchronous modulation. have.

In the received signal information detection method according to the present invention, in the received signal information detection method for detecting information of a signal after a fast Fourier transform (FFT) processing at the receiving end of a system using an orthogonal frequency multiplexing (OFDM) transmission method, a) a first signal obtained by obtaining a plurality of delay signals delaying a signal output through the FFT by a predetermined delay length, generating a first pilot signal pattern, multiplying the delay signal in parallel, and adding the predetermined delay signal; A modulation mode detection step of detecting a modulation mode from the maximum power magnitude signal among the output signals by accumulating the power magnitude by a predetermined cumulative length; (b) a pilot pattern detecting step of detecting a pilot pattern from the output signal of step (a); (c) an integer frequency offset detection step of detecting an integer frequency offset based on the output signal of step (a); And (d) generating a second pilot signal pattern and multiplying it by a signal output through the FFT unit to obtain a second signal, and a complex conjugate of the delayed signal delaying the second signal by a predetermined delay length and the second signal. Summing the multiplied signals by a predetermined length, accumulating by a predetermined cumulative length, calculating a phase of the output signal, and determining a phase of the received signal through the phase detection step.

In addition, step (a) may include generating the first pilot signal pattern including (a1) a differential modulation information signal and a scattering pilot pattern; (a2) obtaining the delay signal using a delay length determined according to an FFT mode; (a3) multiplying the delay signal and the first pilot signal pattern in parallel; (a4) summing the output signals of step (a3); (a5) calculating the power magnitude of the output signal of step (a4); (a6) accumulating the magnitudes of the output signals of step (a5); And (a7) detecting the output signal having the maximum magnitude by comparing the output signal of step (a6).

In addition, step (d) may include (d1) generating a desired pilot pattern according to the modulation mode detected by the modulation mode detector and outputting the second pilot signal pattern; (d2) extracting information data according to the detected modulation mode from an output signal of the FFT unit; And (d3) obtaining the second signal and generating a signal obtained by multiplying the conjugate complex number of the delay signal by delaying the second signal by a predetermined delay length and the second signal.

According to the present invention, it is possible to obtain initial information of the rear end of an FFT by detecting a modulation mode, a pilot pattern, an integer frequency offset, and a phase at a receiving end of an OFDM transmission system.

In addition, the present invention guarantees satisfactory performance even in a low signal-to-noise ratio and high-speed time-varying channel environment, and can reduce the complexity of the system by maximizing the process used in the existing receiver and reduces the amount of computation by suppressing the use of multipliers. It can be effective.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals are assigned to the same components as much as possible, even if shown on different drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related well-known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted. In addition, the following will describe a preferred embodiment of the present invention, but the technical idea of the present invention is not limited thereto and may be variously modified and modified by those skilled in the art.

1 is a block diagram of a receiving end of an OFDM transmission system according to a preferred embodiment of the present invention. The received signal is frame-synchronized, serial / parallel conversion is performed, and then the guard interval is removed and FFT conversion is performed. After the FFT conversion, the output signal of the FFT device is subjected to parallel / serial conversion, and then output through the channel equalizer to the decoder. To this end, modulation mode, integer frequency offset, pilot pattern, and phase detection are performed in the interval after the FFT conversion. An apparatus for detecting received signal information according to the present invention will be referred to as a post-FFT estimator 11 in the following description.

Referring to FIG. 1, the receiver 10 is divided into an FFT front end and an FFT rear end with respect to the FFT device 15.

The FFT front end includes a series / parallel converter 13, a guard interval remover 14.

The serial / parallel converter 13 converts the received signal into a parallel structure. The first received signal has a structure suitable for serial signal processing. For FFT, the serially received signal must be changed to a parallel structure. Therefore, the serial / parallel converter 13 is used to convert the received signal into the parallel structure in the step before the guard interval removal.

The guard interval remover 14 performs a function of removing a guard interval to FFT only valid symbols among the received signals. The guard interval is inserted to reduce the influence of inter-symbol interference due to the time delay caused by the channel.

The FFT unit 15 performs fast Fourier transform of the valid symbols of the received signal. The received signal is an Inverse Fast Fourier Transform (IFFT) at the transmitting end as an OFDM signal. The received signal is demodulated to the original signal through the Fast Fourier Transform (FFT) at the receiving end.

The FFT back stage includes a parallel / serial converter 16, a channel equalizer 17, a decoder 18, and a post-FFT estimator 11.

The post-FFT estimator 11 estimates a modulation mode that is determined from the transmitting end to the receiving end. The received signal is an OFDM signal and is subjected to FFT processing to estimate the modulation mode, pilot pattern, integer frequency offset and phase. The detailed configuration of the post-FFT estimator 11 will be described with reference to FIG. 2 below.

The parallel / serial converter 16 converts a received signal converted into a parallel structure by the serial / parallel converter 13 into a serial signal at the rear end of the FFT for fast Fourier transform processing.

The channel equalizer 17 corrects distortion of the received signal as it passes through various types of channels.

The decoder 18 compensates for various kinds of channel codes inserted and modulated in the transmission signal by the transmitting end. Generally, there are deinterleavers such as bits / bytes and decoders such as viterbi.

FIG. 2 is a block diagram of a receiver including a detailed configuration of a post-FFT estimator in FIG. 1.

The post-FFT estimator 11, with reference to FIG. 2, comprises a modulation mode detector 100, a pilot pattern detector 200, an integer multiple frequency offset detector 300, and a phase detector 400. Hereinafter, for convenience of description, the signal passing through the summers 140a, 140b, 140c, 140d, and 140e of the modulation mode detector 100 is referred to as a “first signal”, and the first multiplier ( The signal passing through 441 will be referred to as a "second signal". In addition, a pilot pattern generated by the pilot pattern generator 110 of the modulation mode detector 100 is referred to as a "first pilot signal pattern", and a pilot pattern generated by the pilot pattern generator 420 of the phase detector 400 is referred to as "". Second pilot signal pattern ".

The modulation mode detector 100 multiplies in parallel the information data output from the pilot pattern generator 110 (see FIG. 3) and the plurality of delay signals delaying the signal output through the FFT device 15 by a predetermined delay length. The modulated mode is detected from the maximum power magnitude signal among the output signals by accumulating the power magnitude of the signal summed up by the predetermined length by the predetermined cumulative length. That is, the modulation mode detector 100 obtains a plurality of delay signals from the signals output through the FFT unit 15, generates a first pilot signal pattern, multiplies them in parallel with the delay signals, adds them up by a predetermined length, and adds the first signals. Get signal. Subsequently, the maximum power magnitude signal is calculated from the output signals by accumulating the power magnitude of the first signal by a predetermined cumulative length, and thereby detecting the modulation mode. For example, the information data of the pilot pattern generator 110 includes scattering pilot pattern P1, scattering pilot pattern P2, scattering pilot pattern P3, and scattering pilot pattern P4 corresponding to the differential modulation information signal Wi corresponding to the asynchronous modulation mode and the synchronous modulation mode. Is present. Accordingly, five paths exist for each information signal, and a total of five power levels exist in each path. The modulation mode detector 100 sets the maximum of the five power levels as the maximum power level, and determines the modulation mode of the path having the maximum power level as the modulation mode of the received signal. The detailed configuration of the modulation mode detector 100 will be described below with reference to FIGS. 3 to 6.

The pilot pattern detector 200 determines the pilot pattern corresponding to the path of the output signal as the pilot pattern of the received signal through the output signal of the maximum signal detector 170 (see FIG. 3) of the modulation mode detector 100. The pilot pattern detector 200, together with the modulation mode detector 100, obtains a correlation between a received signal that has passed through the FFT processing stage and a pilot signal pattern composed of scattering pilots, continuous pilots, information data, and the like, and determines a predetermined OFDM symbol. The modulation method of the received signal is detected from the power values of the first signal obtained by accumulating. A detailed configuration of the pilot pattern detector 200 will be described below with reference to FIGS. 6 and 7.

The integer frequency offset detector 300 calculates the number of samples according to the difference between the position of the maximum power of the output signal and the start position of the pilot pattern through the output signal of the maximum signal detector 170 of the modulation mode detector 100. Determine the integer frequency offset of. A detailed configuration of the integer frequency offset detector 300 will be described below with reference to FIGS. 6 and 8.

The phase detector 400 multiplies the desired information data Wi or SP extracted from the signal output through the FFT device 15 with the information data Wi or SP at the same position output from the pilot pattern generator 420 (see FIG. 9), The phase of the received signal is determined by summing the multiplied signal by the complex number of the delayed signal which delayed the multiplied signal by the length of the predetermined delayer, and accumulating the signal by accumulating the predetermined accumulated length to calculate the phase of the output signal. That is, the phase detector 400 generates a second pilot signal pattern and multiplies it by an output signal of the FFT device 15 to obtain a second signal, and a conjugate complex number of delay signals that delay the second signal by a predetermined delay length. The signal multiplied by the second signal is added up by a predetermined length. Thereafter, the signal is accumulated by a predetermined cumulative length, and the phase of the output signal is calculated, and the phase of the received signal is determined. For example, in the case of the output signal of the extractor 410 (see FIG. 9) and the pilot pattern generator 420, in the case of the synchronous modulation according to the modulation mode determined by the modulation mode detector 100, the SP information data is used in the asynchronous modulation mode. Wi information data is output. In the extractor 410, when the pilot pattern determined by the pilot pattern detector 200 is SP1, SP2, SP3, or SP4, the scattering pilot patterns corresponding to the scattering pilot patterns are determined and output as SP information data. In the case of the delayer 442 (see FIG. 9), the delay length is determined by the output interval of the information data Wi or SP output from the extractor 410. The cumulative length of the summer 460 is equal to the FFT length for FFT conversion of the FFT group 15, and the cumulative length of the accumulator 470 uses a multiple of the FFT length. A detailed configuration of the phase detector 400 will be described below with reference to FIG. 9.

FIG. 3 is a block diagram of a modulation mode detector in FIG. 2, and FIG. 4 is a graph showing characteristics of differential modulation information signal Wi of a pilot pattern generator in a modulation mode detector, and FIGS. 5A to 5D are pilots in a modulation mode detector, respectively. It is a graph showing the characteristics of the scattering pilot patterns SP1, SP2, SP3, and SP4 of the pattern generator. 6A to 6E are graphs illustrating characteristics of an output signal of a magnitude accumulator for modulation mode detection in a modulation mode detector.

Referring to FIG. 3, the modulation mode detector 100 includes a pilot pattern generator 110, delayers 120a, 120b, 120c, 120d, and 120e, parallel multipliers 130a, 130b, 130c, 130d, and 130e. 140a, 140b, 140c, 140d, 140e, power magnitude calculators 150a, 150b, 150c, 150d, 150e, magnitude accumulators 160a, 160b, 160c, 160d, 160e, maximum signal detector 170, And a modulation mode determiner 180. The modulation mode detector 100 calculates the maximum power by adding the parallel multiplication signal of the delay signal of the signal output from the FFT device 15 and the signal from the pilot pattern generator 110 and calculates the maximum power from the accumulated maximum power signal. Detect the modulation mode.

The pilot pattern generator 110 generates information data used for the received signal according to a modulation mode and outputs the data in parallel. The information data includes the differential modulation information signal Wi used in the asynchronous modulation mode, the scattering pilot pattern SP1, the scattering pilot pattern SP2, the scattering pilot pattern SP3, and the scattering pilot pattern SP4 used for the synchronous modulation mode. 4 shows an output signal of the differential modulation information signal Wi of the pilot pattern generator 110, the horizontal axis represents the number of subcarrier samples, and the vertical axis represents the magnitude of the signal. 4 shows an output signal for the differential modulation information signal Wi when the FFT length of the FFT device 15 is 128. Referring to this, the subcarrier spacing is constant for a power signal having a magnitude of the differential modulation information signal Wi of 1. However, it can be seen that they are located at the same subcarrier position with respect to the output signal of every FFT group 15. FIG. 5A illustrates the output signal of the scattered pilot pattern SP1 of the pilot pattern generator 110, the horizontal axis represents the number of subcarrier samples, and the vertical axis represents the signal size. 5A shows an output signal for the scattering pilot pattern SP1 when the FFT length of the FFT device 15 is 128. Referring to this, the power signal having the magnitude 1 of the scattering pilot pattern SP1 has a constant subcarrier spacing. It can be seen that the output signals of the FFT group 15 are sequentially located in the order of P1, P2, P3, and P4. Similarly with respect to FIGS. 5B to 5D, the scattering pilot pattern SP2 has the output signal of every FFT group 15 in the order of P2, P3, P4, and P1, and the scattering pilot pattern SP3 has the order of every FFT group 15. It can be seen that they are sequentially located in the order of P3, P4, P1 and P2 for the output signal, and in the order of P4, P1, P2 and P3 for the output signal of every FFT group 15 for the scattering pilot pattern SP4. have.

Delays (120a, 120b, 120c, 120d, 120e) is output by delaying a predetermined delay length for a block of the signal output from the FFT device 15, the delay length is determined according to the FFT mode of the received signal, Typically 10 or 20 delay lengths are used.

The parallel multipliers 130a, 130b, 130c, 130d, and 130e accumulate the output signals of the delayers 120a, 120b, 120c, 120d, and 120e by the length of 1 OFDM symbol output from the FFT unit 15 and the pilot. The output signal of the pattern generator 110 is multiplied in parallel and output. One OFDM symbol length is the FFT length of the FFT group 15. In the case of FFT length, the 2K mode uses 2048 subcarriers according to the FFT mode, and thus the 2048 length is used, the 4K mode uses 4096 subcarriers, and thus the 4096 length and the 8K mode uses 8192 subcarriers. In addition, the FFT length is determined according to the FFT length in each case when the FFT is not performed for all subcarriers. For example, in the case of an FFT device that performs an FFT of 256 lengths, the FFT length is 256 lengths.

Summers 140a, 140b, 140c, 140d, and 140e sum and output parallel output signals of parallel multipliers 130a, 130b, 130c, 130d, and 130e.

The power magnitude calculators 150a, 150b, 150c, 150d, and 150e calculate and output power magnitudes for the output signals of the summers 140a, 140b, 140c, 140d, and 140e.

The magnitude accumulators 160a, 160b, 160c, 160d, 160e are the delay lengths of the delayers 120a, 120b, 120c, 120d, 120e for the output signals of the power magnitude calculators 150a, 150b, 150c, 150d, 150e. Accumulate by the specified cumulative length every time. The cumulative length can vary depending on the design, and typically 4 or 8 times the delay length. 6A to 6E show the output signals of the respective magnitude accumulators 160a, 160b, 160c, 160d, 160e of the modulation mode detector 100 for the synchronous modulation mode received signal, and the horizontal axis indicates the position index. , The vertical axis represents the signal magnitude.

The maximum signal detector 170 compares the output signals of the magnitude accumulators 160a, 160b, 160c, 160d, 160e and compares them from the magnitude accumulators 160a, 160b, 160c, 160d, 160e of the path having the maximum power magnitude. Output the input signal. 6A, 6C, 6D, and 6E, the power magnitude of the output signal of each of the magnitude accumulators 160a, 160b, 160c, 160d, and 160e is within 0.4 power magnitudes. On the other hand, referring to FIG. 6B, since the power magnitude of the output signal of the magnitude accumulator 160b is greater than or equal to one power magnitude, the maximum signal detector 170 outputs the signal of the magnitude accumulator 160b which is the path signal of SP1. .

The modulation mode determiner 180 determines the modulation mode corresponding to the path of the output signal of the maximum signal detector 170 and detects the modulation mode of the received signal. 6A to 6E, the modulation mode of the received signal is determined as the synchronous modulation mode corresponding to the path of the scattering pilot SP1 which is the signal of the magnitude accumulator 160b.

FIG. 7 is a detailed block diagram of the pilot pattern detector in FIG. 2.

The pilot pattern detector 200, referring to FIG. 7, includes a pilot pattern calculator 210 and a pattern detector 220. The pilot pattern detector 200 detects a pilot pattern from an output signal of the modulation mode detector 100.

The pilot pattern calculator 210 receives the output signal of the maximum signal detector 170 of the modulation mode detector 100 and calculates a pilot pattern corresponding to the path of the input signal. In the example of FIG. 6, the pilot pattern calculator 210 receives an output signal of the magnitude accumulator 160b of the modulation mode detector 100 and determines SP1 corresponding to the path as a pilot pattern. The pilot pattern calculator 210 may be omitted when the output signal of the FFT device 15 is an asynchronous modulation method, and determines one of four cases of scattering pilot when the synchronous modulation method is used.

The pattern detector 220 detects a pilot pattern of the received signal from the pilot pattern of the output signal of the pilot pattern calculator 210. In the example of FIG. 6, the pattern detector 220 determines the pilot patterns P1, P2, P3, and P4 of the received signal from SP1 corresponding to the output signal path of the pilot pattern calculator 210.

FIG. 8 is a detailed block diagram of an integer frequency offset detector in FIG. 2.

The integer frequency offset detector 300, referring to FIG. 8, includes a frequency delay calculator 310 and an offset detector 320. The integer frequency offset detector 300 estimates the integer frequency offset using the maximum power value position information of the signal having the maximum power value among the first signals.

The frequency delay calculator 310 receives the output signal of the maximum signal detector 170 of the modulation mode detector 100, calculates a subcarrier frequency corresponding to the maximum value of the output signal, and calculates a difference from the reference subcarrier frequency. In this case, the reference subcarrier frequency corresponds to 1/2 of the delay lengths of the delayers 120a, 120b, 120c, 120d, and 120e of the modulation mode detector 100. For example, if the delay length is 10, the reference subcarrier frequency is 5 and the delay length. Is 20, the reference subcarrier frequency is 10. The frequency delay calculator 310 calculates the frequency delay of the continuous pilot when the output signal of the FFT device 15 is asynchronous modulation, and determines the integer frequency offset by calculating the frequency delay of the scattering pilot in the synchronous modulation system. Done.

The offset detector 320 detects the frequency offset of the received signal from the output signal of the frequency delay calculator 310.

9 is a detailed block diagram of the phase detector in FIG. 2.

Referring to FIG. 9, the phase detector 400 includes an extractor 410, a pilot pattern generator 420, signal selectors 430a and 430b, a multiplier 440, a normalization constant outputter 450, and a summer ( 460, accumulator 470, phase calculator 480, and phase determiner 490. The phase detector 400 accumulates a complex conjugate product of the pilot pattern position signals in the received signal and an average thereof by a predetermined OFDM symbol to estimate a phase offset of the received signal. That is, the phase detector 400 sums the phase difference between the product of the signal output from the FFT device 15 and the signal from the pilot pattern generator 420 and the multiplied signals, and accumulates the signal to calculate and detect a phase.

The extractor 410 extracts the information data according to the modulation mode detected by the modulation mode detector 100 from the output signal of the FFT machine 15. The extractor 410 includes an SP extractor 410a and a Wi extractor 410b. If the modulation mode is a synchronous modulation mode, the SP extractor 410a extracts information data corresponding to the scattering pilot. On the other hand, if the modulation mode is an asynchronous modulation mode, the Wi extractor 410b extracts information data corresponding to the asynchronous modulation information signal Wi.

The pilot pattern generator 420 outputs information data according to the modulation mode detected by the modulation mode detector 100. The pilot pattern generator 420 extracts continuous pilot and asynchronous modulation information data when the detected modulation mode is an asynchronous modulation mode, and scattering pilot which is a synchronous modulation information signal when the modulation mode is synchronous modulation. The information data of the scattering pilot is the same as P1, P2, P3, and P4 of FIGS. 5A to 5D, and the extraction order depends on the detection result of the pilot pattern detector 200. On the other hand, the information data of the asynchronous modulation information signal is the same as Wi of FIG.

The signal selectors 430a and 430b select signals of a desired path according to the modulation mode detected by the modulation mode detector 100. In the case of the signal selector 430a, the path of the SP extractor 410a is selected by the extractor 410 in the synchronous modulation mode, and the path of the Wi extractor 410b is selected in the extractor 410 in the asynchronous modulation mode. In the case of the signal selector 430b, the scattering pilot SP is selected by the pilot pattern generator 420 in the synchronous modulation mode, and the asynchronous modulation information signal Wi is selected by the pilot pattern generator 420 in the asynchronous modulation mode.

The multiplier 440 includes a first multiplier 441 that multiplies the output signals of the signal selectors 430a and 430b, a delayer 442 that delays the output signal of the first multiplier 441 by a predetermined delay length, and a delay. A complex complex generator 443 that outputs a complex conjugate of the output signal of the generator 442, and a second multiplier 444 that multiplies the output signal of the conjugate complex generator 443 by the output signal of the first multiplier 441. do. The delay length of the delay unit 442 corresponds to the subcarrier interval of the information data output from the pilot pattern generator 420.

The normalization constant outputter 450 outputs the inverse of the constant corresponding to the subcarrier spacing of the information data output from the pilot pattern generator 440. The output signal of the normalization constant outputter 450 is input to the second multiplier 444 of the multiplier 440.

The summer 460 sums the output signal of the multiplier 440 by a predetermined summation length and outputs the sum. The sum length is equal to the FFT size of the FFT group 15.

The accumulator 470 accumulates the output signal of the summer 460 by a predetermined cumulative length. The cumulative length is four or eight times the FFT size of the FFT group 15.

The phase calculator 480 calculates a phase according to the real part and the imaginary part from the output signal of the accumulator 470.

Phase determiner 490 determines the phase of the received signal from the output signal of phase calculator 480.

Next, a method of detecting received signal information according to a preferred embodiment of the present invention will be described.

In the received signal information detection method according to the preferred embodiment of the present invention, a plurality of delay signals obtained by delaying a signal output through an FFT by a predetermined delay length are obtained, and after generating a first pilot signal pattern, the delay signals are generated. A modulated mode detection step of detecting a modulation mode from a maximum power magnitude signal among the output signals by accumulating the power magnitudes of the first signal multiplied in parallel and summed by a predetermined length by a predetermined cumulative length, from an output signal of the modulation mode detection step A pilot pattern detection step of detecting a pilot pattern, an integer frequency offset detection step of detecting an integer frequency offset based on the output signal of the modulation mode detection step, and a second pilot signal pattern generated and outputted through the FFT device Multiply the signal to obtain a second signal, and hold the second signal by a predetermined delay length. And a phase detection step of calculating the phase of the output signal by accumulating the complex number of the delayed signal and the signal multiplied by the second signal by a predetermined length, accumulating by a predetermined cumulative length, and determining the phase of the received signal through this. Is done. Since the received signal information detecting method according to the preferred embodiment of the present invention has been sufficiently described in the above-described received signal information detecting apparatus, only the components of the received signal information detecting apparatus will be described here. .

The modulation mode detection step is performed in the modulation mode detector 100 according to the preferred embodiment of the present invention. The modulation mode detecting step includes generating a first pilot signal pattern including a differential modulation information signal and a scattering pilot pattern (performed by the pilot pattern generator 110) and obtaining a delay signal using a delay length determined according to the FFT mode. Step (performed by delays 120a, 120b, 120c, 120d, 120e), multiplying the delay signal and the first pilot signal pattern in parallel (performed by parallel multipliers 130a, 130b, 130c, 130d, 130e), Summing output signals of the step of multiplying in parallel (performed by summers 140a, 140b, 140c, 140d, 140e), calculating power magnitudes of output signals of summing the output signals (power magnitude calculator ( 150a, 150b, 150c, 150d, 150e), accumulating the magnitude of the output signal in the step of calculating the power magnitude (performed in the size accumulators 160a, 160b, 160c, 160d, 160e), and Compare the output signal of the accumulating step to the maximum It comprises the step of detecting the output signal of the size (done in maximum signal detector 170).

The pilot pattern detection step is performed in the pilot pattern detector 200 according to the preferred embodiment of the present invention. The pilot pattern detection step includes calculating a pilot pattern (performed by the pilot pattern calculator 210) and a pattern detection step (performed by the pattern detector 220).

The integer frequency offset detection step is performed in the integer frequency offset detector 300 according to the preferred embodiment of the present invention. The integer frequency offset detection step includes a frequency delay calculation step (performed by the frequency delay calculator 310) and an offset detection step (performed by the offset detector 320).

The phase detection step is performed in the phase detector 400 according to the preferred embodiment of the present invention. In the phase detecting step, a desired pilot pattern is generated according to the modulation mode detected in the modulation mode detecting step, and a second pilot signal pattern is output (performed by the pilot pattern generator 420). The modulation detected from the output signal of the FFT group is performed. Extracting the information data according to the mode (performed by the extractor 410), obtaining a second signal, and generating a signal multiplied by the conjugate complex number of the delayed signal which delayed the second signal by a predetermined delay length and multiplying the second signal; Multiplying the output signals of the multiplying step by a predetermined summation length (performing the summer 460), and accumulating the output signals of the summation step by a predetermined cumulative length. (Performed by accumulator 470), calculating phases according to the real part and imaginary part from the output signal of the accumulating step (performed by phase calculator 480), and output scene of the phase calculating step From a step (carried out in the phase determiner 490) for determining the phase of the received signal.

The above description is merely illustrative of the technical idea of the present invention, and various modifications, changes, and substitutions may be made by those skilled in the art without departing from the essential characteristics of the present invention. will be. Accordingly, the embodiments disclosed in the present invention and the accompanying drawings are not intended to limit the technical spirit of the present invention but to describe the present invention, and the scope of the technical idea of the present invention is not limited by the embodiments and the accompanying drawings. . The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of the present invention.

The present invention provides a high-speed wireless LAN of IEEE 802.11a and HIPELAN / 2, Broadband Wireless Access (BWA) of IEEE 802.16, Digital Multimedia Broadcasting (DMB) and Digital Video Broadcasting (DVB-T), Portable Digital Video Broadcasting ( It can be used in various fields based on the OFDM scheme such as DVB-H) and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial).

1 is a block diagram of a receiving end of an OFDM transmission system according to a preferred embodiment of the present invention;

2 is a block diagram of a receiver including a detailed configuration of a post-FFT estimator in FIG. 1;

3 is a detailed block diagram of a modulation mode detector of FIG. 2;

4 is a graph showing the characteristics of the differential modulation information signal Wi of the pilot pattern generator in the modulation mode detector,

5A to 5D are graphs showing characteristics of scattering pilot patterns SP1, SP2, SP3 and SP4 of the pilot pattern generator in the modulation mode detector, respectively;

6A to 6E are graphs illustrating characteristics of an output signal of a magnitude accumulator for modulation mode detection in a modulation mode detector;

7 is a detailed block diagram of a pilot pattern detector of FIG. 2;

8 is a detailed block diagram of an integer multiple frequency offset detector of FIG. 2;

9 is a detailed block diagram of the phase detector in FIG. 2.

<Explanation of symbols for the main parts of the drawings>

100-Modulation Mode Detector 200-Pilot Pattern Detector

300-Integer Frequency Offset Detector 400-Phase Detector

Claims (12)

A reception signal information detection apparatus for detecting information of a signal after a fast Fourier transform (FFT) processing at a receiving end of a system using an Orthogonal Frequency Multiplexing (OFDM) transmission scheme, Power of the first signal obtained by obtaining a plurality of delay signals delaying a signal output through the FFT by a predetermined delay length, generating a first pilot signal pattern, multiplying the delay signal in parallel, and adding the predetermined delay signal; A modulation mode detector for accumulating the magnitude by a predetermined cumulative length and detecting a modulation mode from the maximum power magnitude signal among the output signals; And After generating a second pilot signal pattern, multiply it by a signal output through the FFT unit to obtain a second signal, and multiply the conjugate complex number of the delay signal by delaying the second signal by a predetermined delay length and multiply the signal by the second signal. A phase detector that adds a predetermined length, accumulates a predetermined cumulative length, calculates a phase of an output signal, and determines a phase of a received signal through the sum. Received signal information detection device comprising a. The method of claim 1, wherein the modulation mode detector A first pilot pattern generator configured to generate the first pilot signal pattern comprising a differential modulation information signal and a scattering pilot pattern; A first delayer for obtaining the delayed signal using a delay length determined according to an FFT mode; A parallel multiplier for multiplying the delay signal and the first pilot signal pattern in parallel; A first summer that sums the output signals of the parallel multipliers; A power magnitude calculator for calculating the power magnitude of the output signal of the first summer; A magnitude accumulator for accumulating magnitudes of output signals of the power magnitude calculator; And Maximum signal detector for detecting the output signal of the maximum magnitude by comparing the output signal of the magnitude accumulator Received signal information detection device comprising a. The method of claim 1, wherein the phase detector A second pilot pattern generator for generating a desired pilot pattern according to the modulation mode detected by the modulation mode detector and outputting the second pilot signal pattern; An extractor for extracting information data according to the detected modulation mode from an output signal of the FFT unit; And A multiplier configured to obtain the second signal and generate a signal multiplied by a complex number of a delay signal obtained by delaying the second signal by a predetermined delay length and the second signal; Received signal information detection device comprising a. The method of claim 3, wherein the extractor An SP extractor for extracting information data corresponding to a scattering pilot when the detected modulation mode is synchronous modulation; And Wi extractor for extracting information data corresponding to continuous pilot and asynchronous modulation information when the detected modulation mode is asynchronous modulation Received signal information detection device comprising a. The method of claim 1, And a pilot pattern detector for detecting a pilot pattern from an output signal of the modulation mode detector. The method of claim 5, wherein the pilot pattern detector A pilot pattern calculator which receives the maximum power magnitude signal from the modulation mode detector and calculates a pilot pattern corresponding to a path of an input signal; And A pilot pattern determiner for determining a pilot pattern of the received signal from a pilot pattern of an output signal of the pilot pattern calculator Received signal information detection device comprising a. The method of claim 1, And an integer multiple frequency offset detector for detecting an integer multiple frequency offset based on an output signal of the modulation mode detector. 8. The system of claim 7, wherein the integer frequency offset detector is A frequency delay calculator for receiving the maximum power magnitude signal from the modulation mode detector and calculating a frequency delay from path information; And Integer frequency offset determiner for determining the frequency offset of the received signal from the output signal of the frequency delay calculator Received signal information detection device comprising a. The method of claim 8, wherein the frequency delay calculator When the output signal of the FFT device is an asynchronous modulation method, the frequency delay of the continuous pilot is calculated, and when the output signal of the FFT device is a synchronous modulation method, the frequency delay of the scattering pilot is calculated. Detection device. A reception signal information detection method for detecting information of a signal after a fast Fourier transform (FFT) processing at a receiving end of a system using an orthogonal frequency multiplexing (OFDM) transmission method, (a) obtaining a plurality of delay signals obtained by delaying the signal output through the FFT by a predetermined delay length, generating a first pilot signal pattern, multiplying them in parallel with the delay signal, and summing by a predetermined length A modulation mode detection step of detecting a modulation mode from the maximum power magnitude signal among the output signals by accumulating the power magnitude of the signal by a predetermined cumulative length; (b) a pilot pattern detecting step of detecting a pilot pattern from the output signal of step (a); (c) an integer frequency offset detection step of detecting an integer frequency offset based on the output signal of step (a); And (d) generating a second pilot signal pattern and multiplying it by a signal output through the FFT unit to obtain a second signal, and complex conjugate of the delayed signal and delaying the second signal by a predetermined delay length A phase detection step of calculating the phase of the output signal by summing the multiplied signals by a predetermined length, accumulating by a predetermined cumulative length, and determining the phase of the received signal through the result. Received signal information detection method comprising a. The method of claim 10, wherein step (a) (a1) generating the first pilot signal pattern including the differential modulation information signal and a scattering pilot pattern; (a2) obtaining the delay signal using a delay length determined according to an FFT mode; (a3) multiplying the delay signal and the first pilot signal pattern in parallel; (a4) summing the output signals of step (a3); (a5) calculating the power magnitude of the output signal of step (a4); (a6) accumulating the magnitudes of the output signals of step (a5); And (a7) comparing the output signal of the step (a6) to detect the output signal of the maximum magnitude Received signal information detection method comprising a. The method of claim 10, wherein step (d) (d1) generating a desired pilot pattern according to the modulation mode detected in step (a) and outputting the second pilot signal pattern; (d2) extracting information data according to the detected modulation mode from an output signal of the FFT unit; And (d3) obtaining the second signal and generating a signal obtained by multiplying the conjugate complex number of the delay signal by delaying the second signal by a predetermined delay length and the second signal; Received signal information detection method comprising a.

Images