KR20090038620A - Method of manufacturing liquid crystal display device - Google Patents

Abstract

A method of manufacturing a liquid crystal display device is provided to remove the peeling phenomenon caused by the stress difference between a gate insulating layer and an interlayer insulating film without deteriorating the characteristic of a TFT. The hydrogen plasma process is performed on a substrate including a semiconductor pattern(151). A silicon oxide film(161) is formed on the substrate. A silicon nitride film(163) is formed on the silicon oxide film. A gate electrode(153) branched from a gate line is formed on the silicon nitride film. An interlayer insulating film(154) is formed on the silicon nitride film including the gate electrode at the same temperature as the silicon nitride film. As the interlayer insulating film is patterned, the source/drain regions of the semiconductor pattern are exposed. Source/drain electrodes(155a,155b) are formed on the interlayer insulating film including the source/drain regions.

Description

Manufacturing method of liquid crystal display device {METHOD OF MANUFACTURING LIQUID CRYSTAL DISPLAY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method of manufacturing a liquid crystal display device that can improve peeling due to stress difference between a gate insulating film and an interlayer insulating film without degrading the characteristics of a thin film transistor. It relates to a manufacturing method.

Liquid crystal display devices (liquid crastal display device) is due to the characteristics of light weight, thin, low power consumption driving, the application range is gradually increasing. In accordance with this trend, the liquid crystal display is used in office automation equipment, audio / video equipment, and the like.

The liquid crystal display displays an image by changing an electrical signal into visual information by using a characteristic in which light transmittances of liquid crystals, which are intermediate states of liquid and crystal, vary according to an applied voltage. A typical liquid crystal display device is composed of two substrates provided with electrodes and a liquid crystal layer interposed between the two substrates. Such a liquid crystal display device is lighter in weight, smaller in volume, and operates with less power than other display devices having the same screen size.

The liquid crystal display uses a thin film transistor (TFT) as switching for driving and controlling.

The thin film transistor may include a semiconductor layer including a source region, a channel region, and a drain region, a gate insulating layer formed on the semiconductor layer, a gate region formed on the semiconductor layer, and a gate electrode and the source region formed on the gate insulating layer; And a source electrode and a drain electrode respectively contacting the drain region. In general, the gate insulating layer is a single layer of a silicon oxide layer (SiO ₂ ) or a silicon nitride layer (SiNx).

The gate insulating film formed of the silicon oxide film has a problem of increasing leakage current, whereas the gate insulating film formed of the silicon nitride film has poor interface characteristics between the semiconductor layer and the silicon nitride film, thereby deteriorating the characteristics of the thin film transistor.

In a typical thin film transistor substrate, a protective layer (SiNx) is disposed on a gate insulating layer, and when the gate insulating layer is formed of a silicon nitride layer, peeling is caused due to a difference in stress between layers (gate insulating layer and protective layer) due to a difference from the protective layer formation temperature. (Peeling) There was a problem causing the phenomenon.

An object of the present invention is to provide a method of manufacturing a liquid crystal display device which can improve peeling caused by stress difference between a gate insulating film and an interlayer insulating film without degrading the characteristics of the thin film transistor.

Method of manufacturing a liquid crystal display device according to an embodiment of the present invention,

Forming a semiconductor pattern on the substrate; Performing a hydrogen plasma process on the substrate including the semiconductor pattern; Forming a silicon oxide film on the substrate including the semiconductor pattern; Forming a silicon nitride film on the silicon oxide film; Forming a gate electrode branched from a gate wiring on the silicon nitride film; Forming an interlayer insulating film on the silicon nitride film including the gate electrode at the same temperature as the silicon nitride film; Patterning the interlayer insulating film to expose a source / drain region of the semiconductor pattern; Forming a source / drain electrode on the interlayer insulating film including the source / drain region; And forming a pixel electrode in contact with the drain electrode.

In addition, the manufacturing method of the liquid crystal display device according to another embodiment of the present invention,

Forming a gate electrode branched from the gate line on the substrate; Forming a silicon oxide film on the substrate including the gate electrode; Forming a silicon nitride film on the silicon oxide film; Forming a semiconductor layer on the silicon nitride layer so as to correspond to the gate electrode; Forming a source / drain electrode on the semiconductor layer; Performing a hydrogen plasma process on the silicon nitride film including the source / drain electrodes; Forming a protective layer on the silicon nitride film including the source / drain electrodes at the same temperature as the silicon nitride film; And forming a pixel electrode formed on the protective layer and in contact with the drain electrode.

According to the present invention, an interlayer insulating film made of SiNx is disposed on the silicon nitride film of the gate insulating film, and the interlayer insulating film is formed at the same temperature as the silicon nitride film to improve the peeling due to the difference in stress between the layers. .

In addition, in the present invention, when the silicon nitride film and the interlayer insulating film are formed at the same temperature by performing a hydrogen plasma process before the gate insulating film is formed, the thin film transistor is formed by hydrogen release of the interlayer insulating film formed at a higher temperature than a general thin film transistor substrate. There is an effect that can reduce the characteristics of the (TFT) through the hydrogen plasma process.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating a pixel area of a thin film transistor substrate according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the thin film transistor substrate cut along the line II ′ of FIG. 1.

1 and 2, the thin film transistor substrate of the liquid crystal display according to the exemplary embodiment of the present invention includes a gate line 110 and a data line 130 crossing each other on the substrate 150. . The data line 130 is disposed with the gate line 110 and the interlayer insulating layer 154 therebetween.

The thin film transistor substrate includes a thin film transistor (TFT) formed at each intersection of the gate line 110 and the data line 130.

The thin film transistor TFT includes a semiconductor pattern 151, a gate insulating layer 160 disposed on the substrate 150 including the semiconductor pattern 151, and the gate insulating layer 160 so as to correspond to the semiconductor pattern 151. ), An interlayer insulating layer 154 disposed on the entire surface of the substrate 150 including the gate electrode 153, and the interlayer insulating layer 154 so as to correspond to the gate electrode 153. Source / drain electrodes 155a and 155b disposed thereon.

The gate insulating layer 160 includes a silicon oxide film 161 and a silicon nitride film 163, and the silicon oxide film 161 and the silicon nitride film 163 are sequentially disposed.

The interlayer insulating film 154 made of SiNx is disposed on the silicon nitride film 163. The interlayer insulating layer 154 may be formed at the same temperature as the silicon nitride layer 163 to improve the peeling due to the stress difference between the layers.

According to the present invention, the hydrogen plasma process may be performed before the gate insulating layer 160 is formed, thereby improving the problem that the characteristics of the TFT are degraded. That is, when the silicon nitride film 163 and the interlayer insulating film 154 are formed at the same temperature, the characteristics of the thin film transistor TFT due to the hydrogen release of the interlayer insulating film 154 formed at a higher temperature than a general thin film transistor substrate are reduced. May be compensated for through a hydrogen plasma process.

3A to 3H illustrate a method of manufacturing the thin film transistor substrate of FIG. 2.

Referring to FIG. 3A, in the thin film transistor substrate according to the exemplary embodiment, an amorphous silicon layer is deposited and crystallized on the substrate 150 to form a polysilicon layer, and a photolithography process and an etching process using a mask are performed. Polysilicon is patterned through to form the semiconductor pattern 151.

Although not illustrated, a buffer insulating layer (not shown) may be formed before the amorphous silicon layer is deposited to prevent contamination of the semiconductor pattern 151.

Referring to FIG. 3B, a hydrogen plasma process is performed on the substrate 150 including the semiconductor pattern 151. The hydrogen plasma process proceeds to compensate for hydrogen escape of the interlayer insulating film 154 formed in FIG. 3E.

Referring to FIG. 3C, the gate insulating layer 160 is formed on the substrate 150 including the semiconductor pattern 151.

The gate insulating layer 160 has a structure in which silicon oxide layers SiO ₂ and 161 and silicon nitride layers SiNx 163 of an inorganic material are sequentially formed.

Referring to FIG. 3D, a gate line (not shown) and a gate electrode 153 branching from the gate line are formed on the gate insulating layer 160.

More specifically, a metal such as Al, Al alloy, Mo, Mo alloy, W, W alloy, Cr, Cr alloy, Ti, Ti alloy, etc. are deposited on the gate insulating layer 160 by sputtering or the like. A gate line (not shown) and a gate electrode 153 are formed through a photolithography process and an etching process using a mask.

Referring to FIG. 3E, an interlayer insulating layer 154 is formed on the gate insulating layer 160 including the gate electrode 153.

The interlayer insulating layer 154 is made of an inorganic material such as silicon nitride (SiNx).

The interlayer insulating layer 154 is formed on the silicon nitride layer 163 of the gate insulating layer 160 and is formed at the same temperature as the silicon nitride layer 163.

When the interlayer insulating layer 154 and the silicon nitride layer 163 of the gate insulating layer 160 are formed at the same temperature, peeling may be caused due to the difference in stress between the two layers in contact with each other. ) To improve the occurrence.

For example, when the silicon nitride layer 163 of the gate insulating layer 160 is formed at 350 ° C, the interlayer insulating layer 154 may be formed at 350 ° C.

The interlayer insulating film 154 is preferably formed at 400 ° C or lower (especially 350 ° C).

After the interlayer insulating layer 154 is formed, first and second contact holes 170a and 170b penetrating the interlayer insulating layer 154 and the gate insulating layer 160 are formed through a photolithography process and an etching process using a mask. To expose the source and drain regions.

Referring to FIG. 3F, source / drain electrodes 155a and 155b are formed on the interlayer insulating layer 154 including the first and second contact holes 170a and 170b of FIG. 3E.

More specifically, Al, Al alloy, Mo, Mo alloy, W, W alloy, Cr, Cr alloy, Ti on the interlayer insulating film 154 including the first and second contact holes (170a, 170b in Fig. 3e). And metal such as Ti alloy are deposited by sputtering or the like. Next, the source / drain electrodes 155a and 155b are formed by patterning through a photolithography process and an etching process using a mask.

Referring to FIG. 3G, an organic layer 157 is formed on the interlayer insulating layer 154 including the source / drain electrodes 155s and 155b.

The organic layer 157 is formed on the interlayer insulating layer 154 including the source / drain electrodes 155a and 155b. The organic layer 157 includes a third contact hole 157a formed on the drain electrode 155b, and the drain electrode 155b extends to the outside of the organic layer 157 through the third contact hole 157a. Exposed.

Referring to FIG. 3H, a pixel electrode 159 made of a transparent conductive material is formed on the organic layer 157 including the third contact hole (157a of FIG. 3G).

More specifically, any one of a transparent conductive metal group including indium tin oxide (ITO) and indium zinc oxide (IZO) is deposited on the organic layer 157, a photolithography process using a mask and The pixel electrode 159 is formed by patterning by an etching process.

In the manufacturing process of the thin film transistor according to the exemplary embodiment described above, the formation temperature of the silicon nitride film 163 of the gate insulating film 160 and the interlayer insulating film 154 in contact therewith is equal to the stress between the layers. The peeling phenomenon can be improved.

In addition, the present invention performs a hydrogen plasma process before the gate insulating layer 160 is formed to solve the problem of deterioration (hydrogen release) of the thin film transistor, which may be caused by the interlayer insulating layer 154 formed at a higher temperature than a general thin film transistor substrate. As a result, the peeling phenomenon can be improved, and the deterioration of the characteristics of the thin film transistor due to the process conditions (temperature) can be improved.

4 is a cross-sectional view illustrating a thin film transistor substrate according to another exemplary embodiment of the present invention.

4 is a bottom gate (semiconductor layer on the gate electrode) structurally different from the top gate (structure in which the gate electrode is disposed on the semiconductor layer) shown in FIGS. 1 to 3H according to another embodiment of the present invention; This is a arranged structure).

More specifically, in the thin film transistor substrate according to another embodiment of the present invention, a gate electrode 253 branched from a gate line (not shown) is disposed on the substrate 250 by a photolithography process and an etching process using a mask. The gate insulating layer 260 on which the silicon oxide layer 261 and the silicon nitride layer 263 are sequentially formed is disposed on the substrate 250 including the gate electrode 253.

Here, the hydrogen plasma process may be performed before the gate insulating layer 260 is formed.

The semiconductor patterns 251a and 251b are disposed on the gate insulating layer 260 to correspond to the gate electrode 253, and the source / drain electrodes 255a, 251a and 251b are disposed on the gate insulating layer 260 including the semiconductor patterns 251a and 251b. 255b) is disposed.

The protective layer 254 formed at the same temperature as the silicon nitride film 263 is disposed on the gate insulating film 260 including the source / drain electrodes 255a and 255b. The protective layer 254 is made of an inorganic material such as silicon nitride (SiNx).

The protective layer 254 is preferably formed at a temperature of 400 ° C. or less (particularly 350 ° C.).

The protective layer 254 includes a contact hole (not shown) in a region corresponding to the drain electrode 255b, and the drain electrode 255b is exposed to the outside from the protective layer 254 by the contact hole.

The pixel electrode 259 is disposed on the passivation layer 254 including the exposed drain electrode 255b.

5 is a view showing the characteristics of a thin film transistor according to an embodiment of the present invention.

As shown in FIG. 5, the thin film transistor according to the exemplary embodiment of the present invention has a hydrogen plasma treatment (80 W, 5 minutes, H2 flow rate 1200 sccm), a deposition temperature of a silicon nitride film at 350 ° C., and a deposition temperature of an interlayer insulating film. When the temperature is set to 350 ° C., when the Vgs 10V to the Vgs 15V, the Ids is 8nA, and when the Vgs 5V, the Ids is 1nA, which shows that the characteristics of the thin film transistor are improved.

The current uniformity is 3.0%, which is compared with the general liquid crystal display (4.6%).

 Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a plan view illustrating a pixel area of a thin film transistor substrate according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of the thin film transistor substrate cut along the line II ′ of FIG. 1.

3A to 3H illustrate a method of manufacturing the thin film transistor substrate of FIG. 2.

4 is a cross-sectional view illustrating a thin film transistor substrate according to another exemplary embodiment of the present invention.

5 is a view showing the characteristics of a thin film transistor according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

150 substrate 151 semiconductor pattern

153: gate electrode 155a: source electrode

155b: drain electrode 154: interlayer insulating film

157: organic film 157a: third contact hole

160, 260: gate insulating film 161, 261: silicon oxide film

163 and 263 silicon nitride film 254 protective layer

Claims (6)

Forming a semiconductor pattern on the substrate; Performing a hydrogen plasma process on the substrate including the semiconductor pattern; Forming a silicon oxide film on the substrate including the semiconductor pattern; Forming a silicon nitride film on the silicon oxide film; Forming a gate electrode branched from a gate wiring on the silicon nitride film; Forming an interlayer insulating film on the silicon nitride film including the gate electrode at the same temperature as the silicon nitride film; Patterning the interlayer insulating film to expose a source / drain region of the semiconductor pattern; Forming a source / drain electrode on the interlayer insulating film including the source / drain region; And And forming a pixel electrode in contact with the drain electrode. According to claim 1, And the interlayer insulating film is formed at 350 ° C. According to claim 1, The interlayer insulating film is a method of manufacturing a liquid crystal display device, characterized in that the silicon nitride (SiNx) of the inorganic material. Forming a gate electrode branched from the gate line on the substrate; Forming a silicon oxide film on the substrate including the gate electrode; Forming a silicon nitride film on the silicon oxide film; Forming a semiconductor layer on the silicon nitride layer so as to correspond to the gate electrode; Forming a source / drain electrode on the semiconductor layer; Performing a hydrogen plasma process on the silicon nitride film including the source / drain electrodes; Forming a protective layer on the silicon nitride film including the source / drain electrodes at the same temperature as the silicon nitride film; And And forming a pixel electrode formed on the protective layer and in contact with the drain electrode. The method of claim 4, wherein The protective layer is a manufacturing method of the liquid crystal display, characterized in that formed at 350 ° C. The method of claim 4, wherein The protective layer is a method of manufacturing a liquid crystal display device, characterized in that the silicon nitride (SiNx) of the inorganic material.

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