KR20090032590A - Inductor of a semiconductor device and method of forming the same - Google Patents

Abstract

An inductor of a semiconductor device and a method of formation thereof are provided to obtain the high inductance by welding inductors through a metal pad bumper. An inductor including the first inductor top metal line and the first inductor bottom metal wiring are formed in the first semiconductor substrate(102). The first pre-metal dielectric layer(104) is formed between the first semiconductor substrate and the first inductor down metal wiring. The first inter metal dielectric layer(106) is formed between the first inductor top metal line and the first inductor bottom metal wiring. The second inter-metal dielectric layer(112) is formed on the top of the first inter metal dielectric layer. The first semiconductor device including the first metal pad bumper(122) is formed on the first inductor. The second metal pad bumper(140) of the second semiconductor device is welded with the first metal pad bumper. The second pre-metal dielectric layer(130) and the third inter metal dielectric layer(132) are formed in the second semiconductor substrate(128). The second semiconductor device comprises the second inductor bottom metal wiring(134) and the second inductor top metal line(136).

Description

Inductor of a semiconductor device and method of forming the same

The present invention relates to an inductor of a semiconductor device and a method of forming the same. More particularly, the present invention relates to a thick inductor wiring and a high inductance in implementing an inductor through a semiconductor process.

In general, the development of a communication system for realizing an information society requires a high speed information transmission and information processing technology. Moreover, the rapidly growing field of portable communication systems requires a semiconductor integrated circuit (IC), which features high speed, high efficiency and low power consumption, for high speed information exchange and long battery life. .

The frequency used in such a communication system has a radio frequency (RF) band of about several hundred MHz to several GHz, and the IC used here is commonly referred to as an RF IC. The semiconductor process for implementing the RF IC has been mainly performing a compound semiconductor IC process basically including gallium arsenide (GaAs) in order to realize a high frequency operation, but in recent years BiCMOS, bipolar It is also carried out in (Bipolar) or CMOS (CMOS) IC process.

As one of the various devices manufactured by the above process, an inductor is a passive device that is indispensable for impedance matching in an RF IC. However, Q (Quality Factor) required by the RF IC cannot be obtained using a standard logic process.

In addition, to ensure a high Q value, the parasitic resistances generated in the inductor metallization must be reduced and the losses due to eddy current and displacement current through the silicon substrate must be reduced.

The Q value can be increased by increasing the thickness of the metal wiring used as the inductor than the thickness applied in the standard process, or by using copper, which has been applied since 0.5 μm CMOS technology. In addition, it is advantageous in structure to have a circular structure rather than a square, and the inductor metal wiring spacing is advantageous.

It is also advantageous to leave the center of the inductor empty. It is known that approximately one third of the diameter of the inductor is appropriate for the diameter of the portion of the inductor that is empty.

Increasing the thickness of the inductor metal wiring from 8,000 Å to 20,000 Å is known to increase the Q value from about 5 to about 8, which is a parasitic resistance component due to the increase in the parasitic capacitance due to the increase in the thickness of the inductor metal wiring. This is due to the large decrease, which means that there is little change in inductance according to the thickness of the inductor metallization.

Also, as the number of turns of the inductor increases, the inductance increases, but the Q value increases below a certain number of revolutions and then decreases when the number of turns exceeds a certain number of turns. That is, the parasitic resistance and the parasitic capacitance are increased rather than the inductance increase due to the increase in the number of revolutions, thereby reducing the Q value.

As a result, forming a metal wiring for an inductor thick enough to have a high Q while having a high inductance as desired in a general semiconductor processing method is limited by space or process constraints.

In particular, the current inductor manufacturing process employs a damascene process when wiring is formed of Cu in order to realize a desired pattern. Here, the damascene process comprises a combination of an oxide film deposition process, an exposure process, an etching process, a chemical mechanical polishing process, and a metal deposition process.

In this process, the wiring is formed through the etching process after the inductor pattern is formed in order to form a thick inductor wiring when forming the inductor wiring, there is a limitation in forming a deep inductor pattern at present due to the etching selectivity of the photoresist and the oxide film. .

Accordingly, an object of the present invention is to provide a method for forming an inductor of a semiconductor device and a method for forming the same, which has a high inductance while overcoming space or process constraints and forms a metal wiring for an inductor thick enough to have a desired high Q. Is in.

In order to achieve the above object, one feature of a method for forming an inductor of a semiconductor device according to the present invention, forming a first inductor including an upper metal wiring and a lower metal wiring on the first semiconductor substrate; Completing a first semiconductor device by forming a metal pad bumper that protrudes to the outside on the upper metal wiring; And the second semiconductor device comprises a structure such as a first inductor and a metal pad bumper of the first semiconductor device, the second semiconductor device bonding the metal pad bumper of the second semiconductor device and the metal pad bumper of the first semiconductor device; It is made to include.

In order to achieve the above object, one feature of an inductor of a semiconductor device according to the present invention, the first inductor formed on the first semiconductor substrate including the upper metal wiring and the lower metal wiring protrudes outward on the upper metal wiring A first semiconductor device comprising a metal pad bumper; And the second semiconductor device includes a structure such as a first inductor and a metal pad bumper of the first semiconductor device, wherein the metal pad bumper of the second semiconductor device and the metal pad bumper of the first semiconductor device are bonded to each other. 2 semiconductor elements; It is made to include.

Other objects, features and advantages of the present invention will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

As described above, the inductor of the semiconductor device and the method of forming the semiconductor device according to the present invention have the desired high inductance while the inductors are bonded through the metal pad bumper to overcome the space or process constraints, and thus, the desired high Q is obtained. There is an effect that can form a metal wiring for the inductor thick enough to have.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described. At this time, the configuration and operation of the present invention shown in the drawings and described by it will be described by at least one embodiment, by which the technical spirit of the present invention and its core configuration and operation is not limited.

In addition, the terminology used in the present invention is a general term that is currently widely used as much as possible, but in certain cases, the term is arbitrarily selected by the applicant. In this case, since the meaning is described in detail in the description of the present invention, It is to be understood that the present invention is to be understood as the meaning of the term rather than the name.

1A to 1G are cross-sectional views illustrating a method of forming an inductor of a semiconductor device in accordance with an embodiment of the present invention, and are shown in the order of steps.

First, referring to FIG. 1, an inductor including a first inductor upper metal wiring 114 and a first inductor lower metal wiring 108 is formed on a first semiconductor substrate 102. Here, the first inductor upper metal wiring 114 and the first inductor lower metal wiring 108 are connected to the first inductor via 110.

In addition, a first PMD layer (Pre Metal Dielectric Layer; 104) is formed between the first semiconductor substrate 102 and the first inductor lower metal wiring 108. In addition, a first IMD layer (Inter Metal Dielectric Layer) 106 is formed between the first inductor upper metal wiring 114 and the first inductor lower metal wiring 108. A second IMD layer 112 is formed on the first IMD layer 106 together with the first inductor upper metal wiring 114.

Thereafter, the top surface of the first inductor upper metal wiring 114 is exposed through the planarization process. The planarization here may use a chemical mechanical polishing (CMP) process.

The first inductor is formed of the first inductor upper metal wiring 114, the first inductor lower metal wiring 108, and the first inductor via 110. The semiconductor device including the first inductor may be formed by other than the first inductor. It may include an inductor or other structure.

Subsequently, referring to FIG. 1B, the passivation layer 116 and the photoresist 118 are stacked on the layer on which the second IMD layer and the first inductor upper metal wiring 114 are formed.

Next, referring to FIG. 1C, the passivation layer 116 and the photoresist 118 are selectively etched to form a pad opening 120 partially exposing the first inductor upper metal wiring 114.

Subsequently, referring to FIG. 1E, a metal is embedded in a pad open block 120, and referring to FIG. 1D, the remaining photoresist 118 is removed to complete the first metal pad bumper 122. .

Through the above-described process, a first inductor including a first inductor upper metal wiring 114, a first inductor lower metal wiring 108, and a first inductor via 110 and a first metal pad bumper 122 formed thereon is formed. The 1st semiconductor element provided can be completed.

Subsequently, referring to FIG. 1F, the first semiconductor pad including the first inductor and the first metal pad bumper 122 and the second semiconductor device including the same structure may be turned upside down. The second metal pad bumper 140 of the semiconductor device is bonded.

Since the second semiconductor device has a second inductor therein and a second metal pad bumper 140 protruding to the outside like the first semiconductor device, the second PMD layer 130 is formed on the second semiconductor substrate 128. ) And a third IMD layer 132 stacked thereon.

In addition, the second semiconductor device may have a second inductor including the second inductor lower metal interconnection 134 and the second inductor upper metal interconnection 136, and the second inductor may contact the upper portion of the second inductor upper metal interconnection 136. And a metal pad bumper 140.

Here, the metal forming the first inductor and the second inductor of the first semiconductor element and the second semiconductor element is copper, and thus the junction of the first metal pad bumper 122 and the second metal pad bumper 140 is copper. And copper junction.

Here, the bonding uses a copper to copper direct bonding (Cu to Cu direct bonding) method. The direct bonding method of copper and copper is a useful integration method used in SIP (System In Package) technology or multi-packaging technology.

Since the first semiconductor device and the second semiconductor device each include a first inductor and a second inductor, and the inductors are connected to each other by the direct junction of copper and copper, the total inductance value is the inductance and the second inductor of the first inductor. It can be the sum of inductances. Here, if the internal structures of the first semiconductor element and the second semiconductor element are completely the same, the total inductance value is twice the inductance of the first inductor.

In addition, the first inductor upper metal wiring 114, the first metal pad bumper 122, the second metal pad bumper 140, and the second inductor upper metal wiring 136 are connected to each other to form one inductor metal wiring. It is coming true. This means that through the direct bonding method of copper and copper between semiconductor devices, it is possible to form a thick inductor metallization without space and process constraints, it is possible to implement the desired high Q inductor.

Next, referring to FIG. 1G, an enlarged detail structure of region A illustrated in FIG. 1F may be described. The second semiconductor device includes an I / O pad layer 126 at a lower portion thereof. Here, the second inductor lower metal wiring 134 is connected to the input / output pad layer 126 and a super contact 138, whereby the input / output pad layer 126 is responsible for one electrode of the inductor. The input / output pad layer 126 may be formed of aluminum.

Figure 2 shows a plan view of the inductor according to the present invention.

The inductor shown in FIG. 2 is merely a diagram for aiding in understanding the present invention, and the present invention is not limited thereto. That is, although the inductor shown in FIG. 2 shows an octagonal shape, the inductor according to the present invention can be formed in a circular shape. Ideally, the inductor can take the form of being near circular.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

1A to 1G are cross-sectional views illustrating a method of forming an inductor of a semiconductor device according to an embodiment of the present invention.

2 is a plan view of an inductor of a semiconductor device according to the present invention.

* Explanation of symbols for the main parts of the drawings

102: first semiconductor substrate 104: first PMD layer

106: first IMD layer 108: first inductor lower metal wiring

110: first inductor via 112: second IMD layer

114: metal wiring on the first inductor 116: passivation layer

118 photoresist 120 pad opening

122: first metal pad bumper 126: input / output pad layer

128: second semiconductor substrate 130: second PMD layer

132: third IMD layer 134: metal wiring under the second inductor

136: upper metal wiring of the second inductor 138: super contact

140: second metal pad bumper

Claims (10)

Forming a first inductor including an upper metal interconnection and a lower metal interconnection on a first semiconductor substrate; Completing a first semiconductor device by forming a metal pad bumper that protrudes to the outside on the upper metal wiring; And The second semiconductor device includes a structure such as a first inductor and a metal pad bumper of the first semiconductor device, the second semiconductor device comprising: bonding the metal pad bumper of the second semiconductor device and the metal pad bumper of the first semiconductor device; Inductor forming method of a semiconductor device comprising a. The method of claim 1, Comprising a metal pad bumper protruding outward on the upper metal wiring to complete the first semiconductor device, Planarizing the upper surface of the upper metal wiring to be exposed; Stacking and patterning a passivation layer and a photoresist on top of the upper metallization to form a trench to partially expose the upper surface of the upper metallization; And Embedding the trench with a metal and removing residual photoresist; Inductor forming method of a semiconductor device comprising a. The method of claim 1, An input / output pad layer is formed below the second semiconductor device, and a lower metal wiring of the inductor of the second semiconductor device and the input / output pad layer are connected through a contact. Way. The method of claim 1, The bonding method of the metal pad bumper is a method of forming an inductor of a semiconductor device, characterized in that the direct bonding (metal) to the metal (direct bonding) method. The method of claim 4, wherein The metal and metal direct bonding method is a method of forming an inductor of a semiconductor device, characterized in that the copper to copper direct bonding (Cu to Cu direct bonding) method. A first semiconductor device including a first inductor including an upper metal wiring and a lower metal wiring on a first semiconductor substrate, and a metal pad bumper protruding outwardly on the upper metal wiring; And The second semiconductor device may include a structure such as a first inductor and a metal pad bumper of the first semiconductor device, wherein the metal pad bumper of the second semiconductor device and the metal pad bumper of the first semiconductor device are joined to each other. Semiconductor devices; Inductor of a semiconductor device comprising a. The method of claim 6, The first semiconductor device may include a passivation layer having a trench formed on a portion of the upper metal wiring so that the upper surface of the upper metal wiring is partially exposed. The metal pad bumper of the first semiconductor device is formed by embedding a metal in the trench. The method of claim 6, An input / output pad layer is formed below the second semiconductor device, and the lower metal wiring of the inductor of the second semiconductor device and the input / output pad layer are connected through a contact. The method of claim 6, The method of bonding the metal pad bumper is an inductor of a semiconductor device, characterized in that the method of direct bonding of metal and metal. The method of claim 9, The direct bonding method of the metal and the metal is an inductor of a semiconductor device, characterized in that the copper to copper direct bonding (Cu to Cu direct bonding) method.

Images