KR20090032418A - Constant amplitude product coding method and apparatus in cdma communication systems and device thereof - Google Patents

Constant amplitude product coding method and apparatus in cdma communication systems and device thereof Download PDF

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KR20090032418A
KR20090032418A KR1020070097649A KR20070097649A KR20090032418A KR 20090032418 A KR20090032418 A KR 20090032418A KR 1020070097649 A KR1020070097649 A KR 1020070097649A KR 20070097649 A KR20070097649 A KR 20070097649A KR 20090032418 A KR20090032418 A KR 20090032418A
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bits
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constant amplitude
encoding
encoder
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김용철
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서울시립대학교 산학협력단
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/10Code generation
    • H04J13/102Combining codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/10Code generation
    • H04J13/12Generation of orthogonal codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems
    • H04J13/0007Code type
    • H04J13/004Orthogonal

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Abstract

A spread spectrum product encoding method keeping a predetermined amplitude of a transmission signal in a code division multiple access communication system is provided to encode data bits to keep an amplitude of linear combination of orthogonal codes constantly, thereby preventing orthogonal damages due to level clipping. A hierarchic constant amplitude basis encoding device comprises a level converter(710), a residual bit generating unit(720), a basis encoding multiplicator(730), a basis encoding digital adding up unit(740) and a normalization unit(750). The basis encoding digital adding up unit adds up multiplication results of the basis encoding multiplicator to generate four chip signals having constant amplitudes. The normalization unit normalizes output of the digital adding up unit to generate four outputs of constant amplitude chips which have (+1) or (-1) values.

Description

Coefficient spreading product coding method and apparatus for maintaining constant amplitude of transmission signal in code division multiple access communication system and apparatus in CDMA communication systems and device

The present invention relates to a spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal in a code division multiple access (CDMA) communication system. That is, the present invention encodes the input information bit stream instead of using a level clipping method to make a multi-level signal made by adding multiple orthogonal codes in a conventional CDMA to a constant amplitude. Even if several orthogonal codes are added by using the method, the amplitude of the signal remains constant, eliminating the need for level limitation, and maintaining a higher information rate per chip than the conventional CS / CDMA, and compared with the conventional hierarchical constant amplitude coding method. A spread spectrum product encoding method having a simple structure and an apparatus thereof are provided.

The CDMA method used in mobile communication mainly uses a DS / CDMA (Direct Sequence / Code Division Multiple Access) method in which data is multiplied by a direct orthogonal code to spread a band. A base station of a DS / CDMA system transmits a linear sum of signals of several channels simultaneously. Therefore, the value of each chip of the binary sequence generated from each channel has a random value of (+1) or (-1). The amplitude of the transmission signal to which all binary sequences of n channels are added is equal to {-n, -n + 2,... It will have a random value between., n-2, n}. Since the transmission signal has a large amplitude variation range, like an analog signal, rather than a digital signal, a power amplifier transmitting such a signal requires high linearity.

Unlike the base station, in the second generation mobile communication, only one orthogonal code is used in the terminal, so the level of the signal transmitted from the terminal is constant. However, in the next generation mobile communication providing a multimedia service, the terminal uses a multi-code method in which a single high-speed signal is serially and in parallel converted in multiple channels and transmitted simultaneously in a terminal. In this case, since a plurality of orthogonal codes are added, the level of the transmission signal is changed randomly as in the case of the base station, and thus a power amplifier having a high linearity is required, thus making it difficult to implement a low-cost terminal device and increasing battery consumption.

Accordingly, PW / CDMA, CS / CDMA, and hierarchical constant amplitude encoding methods have been proposed as a method for solving the problems caused by the signal level of the modulated signal being not constant when the transmission data is transmitted in the multicode method.

The most effective of the above methods is a hierarchical constant amplitude encoding method, which has high similarity to the present invention. The hierarchical constant amplitude coding method has the advantage of efficiently accommodating information of multiple channels while maintaining high information rate per chip.However, a large amount of computation is required in the process of recursively combining and distributing the encoder. It has the disadvantage of being complicated.

Hereinafter, with reference to the accompanying drawings it is compared in detail with respect to the prior art. 1 is a diagram illustrating a module configuration of a DS / CDMA transmitter based on multicode according to the prior art.

As shown in Fig. 1, the input signals d1, d2, ..., dn are multiplied by the orthogonal code patterns c1, c2, ..., cn and the multiplier (1a, 1b, ..., 1n), respectively, and the analog summation unit. At 100, all are summed and converted into a signal S of an analog form at a random level and sent to the RF amplifier.

When the conventional DS / CDMA method is used for multi-code CDMA, as the number of orthogonal codes increases, the variation of the modulation signal level increases, requiring a power amplifier having a high linearity for signal transmission. There is also a problem of increased cost.

To solve this problem, PW / CDMA (Pulse Width / CDMA) (patent registration) cuts the modulation signal level above a certain value and transmits only the remaining level value by changing the pulse width to make the signal waveform always binary. No. 0293128; 2001.03.30) has been proposed.

2 is a diagram illustrating a module configuration of a PW / CDMA transmitter according to the prior art. As shown in FIG. 1, after the signal of the output signal of the digital summer 200 is cut out by using the level limiter 210 instead of the analog summer 100 of the DS / CDMA method of FIG. 1, a pulse generator ( 220 to create a binary signal. Although the PW / CDMA method has a binary value, a modulation signal has a binary value, but in the process of forcibly cutting a signal level, orthogonality between codes is impaired, thereby causing interference and degrading transmission characteristics.

A method and apparatus for encoding a transmission signal in a CS / CDMA communication system using a new modulation / demodulation method that uses a multi-code but does not require truncation due to a constant amplitude of a generated signal (Patent Application No. 10-2002-20158: 2002.04.12) was proposed. 3 is a diagram illustrating a configuration of an apparatus for encoding a transmission signal in a CS / CDMA communication system.

Orthogonal code section A, B, C (300, 320, 340) is an orthogonal code section that carries information bits passed through a parallel, parallel converter, D 360 is the three orthogonal code section (300, 320, 340) ) Is a marginal orthogonal code section on which the margin bit string after the data inputted into the. Each orthogonal code part has (N + 1) input channels, and the information bit stream input thereto has data of 1 and 0. In each block, one of two N-square orthogonal codes is selected from the N input information bits. In the polarity converter 310, 330, 350, and 370, the information bits input to the other channel are converted into 1 by (+1) and 0 by (-1). Input to section 390.

In the case of CS / CDMA, when the information bit is increased by 6 bits, the number of channels required for its transmission increases by 4 times. Thus, the number of information bits is 3, 9, 27,... As the data rate increases to 3/4, 9/16, 15/64,... As it is rapidly reduced, it is inefficient.

A hierarchical constant amplitude encoding method and apparatus thereof in a code division multiple access communication system as an efficient modulation and demodulation method that maintains the information rate per chip at an N power of (3/4) even when the number of information bit strings is increased. 0564178-0000: March 24, 2006). This method can maintain the information rate per chip at (N) of (3/4), thereby solving the problem that the information rate per chip is drastically reduced in CS / CDMA.

In the hierarchical constant amplitude coding method, input bits are distributed and combined recursively. The encoder at the highest level receives an N-bit information bit sequence of 3 as an input, divides it into three groups of three (N-1) power bits, and divides each group into three (N-1) power bits. The sub-coding unit recursively repeats the process of dividing three (N-1) powers of the input into three groups by recursively inputting the input of the encoding to the lower encoding unit. The bit input is processed to obtain four chip output signals with constant amplitude. The subsequent combining process is the inverse of the previous distribution, where the outputs of the three lower blocks and the outputs of one spare block are tied together to get 16 chip output signals. As described above, the process of generating the upper block by combining the outputs of three blocks and the outputs of one spare block is recursively repeated, and finally, the outputs of four N power chips having a constant amplitude from three N power input bits of three are output. Generate heat.

4 is a block diagram of a hierarchical constant amplitude coding method and apparatus for encoding a transmission signal in the apparatus. The distribution unit 400 divides the input into three groups and then sends each group to the lower encoder 410 for processing. To the outputs from the three lower encoders 410, the most significant margin bit generator 420 adds the margin bits. The three output vectors and one margin vector are multiplied by a pseudo Hadamard code in the multiplier 430, and then summed into one in the digital adder 440 to generate a constant amplitude signal of (+2) or (-2). After that, the normalization unit 450 finally normalizes to (+1) or (-1).

As described above, the hierarchical constant amplitude encoding method has a high information rate per chip and can efficiently receive information of various channels, but a large amount of computation is required in the process of recursively combining and distributing the encoder. There is a disadvantage that the structure is complicated.

Accordingly, the present invention has been made to solve the above-mentioned problems according to the prior art, and an object of the present invention is to use a method of encoding an information bit stream so that the amplitude of a signal is kept constant even if a number of orthogonal codes are added. This eliminates the need for level constraints and solves the problem that the information rate per chip decreases rapidly as the number of information bit streams in CS / CDMA increases, while using a recursive operation in the hierarchical constant amplitude coding method. A code division multiple access communication system that accommodates only the advantages of the existing methods of keeping the chip rate per chip of (3/4), which is the advantage of the hierarchical constant amplitude coding method, while simplifying the block configuration of the chip. Spreading Product Coding Method and Its Length Maintaining Constant Amplitude It is to provide a.

The present invention recursively performs combining and distributing bit strings in a process of generating an N-th power coded output bit string of 3 by receiving 3 N power information bit strings as inputs in the conventional hierarchical constant amplitude encoding method. It was conceived to prevent the complexity of the entire configuration from becoming too large. In the conventional hierarchical constant amplitude coding method, after adding the extra bits in the first dimension direction and spreading them first, the process continues from the second dimension to the N-th dimension, whereas the present invention eliminates such a process. The transmission performance is maintained while reducing the overall calculation amount by adding only the extra bits without performing the spreading process in the first and second dimensional directions and in the remaining dimensional directions.

A spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention for achieving the above object, a Q (4) basic encoding unit for processing three information bit streams And expand the Q (4) basic coding scheme by distributing and processing the input bit strings of the N-th power information bit streams of 3 to the lower coding unit, and then summing the spreading results to obtain a chip output having a constant amplitude. The Q (4) basic encoder encodes one spare bit for three information bit streams, spreads them in a 4 x 4 Hadamard matrix, adds them, and obtains four chip output signals having a constant amplitude. The encoder divides the input of the 9-bit information bit stream into three groups of three bits each, and encodes each of three bits by the basic encoder. Four chip outputs with amplitude are produced, and the outputs of the 12 chips, the outputs of the three basic encoders, and the outputs of the four chip spare blocks generated therefrom are banded together in a 16 x 16 pseudo Hadamard matrix, summed together, and then a constant amplitude. 16 chip outputs are obtained, and when it is extended to the general case to process N information bits string of 3, the information bit string is divided into 3 groups of 3 (N-1) power bits. Is sent to the lower encoder Q (4 ^ (N-1)) for processing, and Q (4 ^ (N-1)) divides three (N-1) powers of 3 into three groups again Send it to the encoder for processing. However, in order to reduce the amount of computation, the spreading process is performed only in Q (4) and Q (16), and the higher coding unit adds only a spare bit without spreading process. In this way, the input is recursively sent to the lower encoder to be processed and summed up, and finally, the N-th power information string of 3 has a constant amplitude and receives the N-th power output string of 4 having a constant amplitude. Create

According to one aspect of a spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention for achieving the above object, the Q (4) basic encoding unit is input A level converting unit converting the signal levels after serially / parallel switching of the information bit streams; A margin bit generation unit configured to logically operate the three bits to generate one margin bit; A multiplier for multiplying the level-converted three information bits and one spare bit by a spreading code; A digital adder configured to add the multiplication results to generate four chip signals having a predetermined amplitude; It may include a normalizer for normalizing the magnitude of the chip signal having a predetermined amplitude and converting the chip signal into a chip signal having a magnitude of (+1) or (-1). The expansion encoding unit divides the N-th power information string of 3 into three groups of three (N-1) th power bits; Recursively repeating the process of distributing 3 (N-1) power input bits of 3 and sending them to the Q (4N (N-2)) lower encoder which processes 3 (N-2) power input bits. A lower encoder for generating (N-1) powers of the constant amplitude chip outputs of? A margin bit generator for generating margin bits by performing a logical operation on an output of a lower encoder including the basic encoder; A multiplier for multiplying the outputs of the three lower encoders and the outputs of the margin bit generators by a spreading code; A digital adder which adds the multiplication result to produce a chip signal having a predetermined amplitude; It may include a normalization unit for normalizing the magnitude of the chip signal having a predetermined amplitude and converting the chip signal of the magnitude (+1) or (-1).

On the other hand, according to one aspect of the hierarchical constant amplitude encoding method of a code division multiple access communication system transmission signal according to the present invention, the Q (4) basic encoding step is a signal level after the serial input and parallel switching of the three information bit streams A level converting step of converting; A margin bit generation step of logically operating the three bits to generate one margin bit; A multiplication step of multiplying said level-converted three information bits and said one spare bit by a spreading code; A digital summing step of adding up the multiplication result to produce four chip signals having a constant amplitude; The method may include a normalization step of normalizing the magnitude of the chip signal having a predetermined amplitude and converting the chip signal into a chip signal having a magnitude of (+1) or (-1). The expansion encoding step may include a dividing step of dividing the N-th power information strings of three into three groups of three (N-1) power bits; Recursively repeating the process of distributing three (N-1) power input bits of 3 and sending them to the Q (4 ^ (N-2)) sub-coding step, which processes three (N-2) power input bits. A lower encoding step of generating (N-1) square powers of four constant amplitude chips; A margin bit generation step of generating a margin bit by performing a logical operation on an output of a lower encoding step including the basic encoding step; A multiplication step of multiplying the outputs of the three lower coding steps and the outputs of the spare bit generation steps by a spreading code; A digital summing step of adding the multiplication results to produce a chip signal having a constant amplitude; A normalization step of normalizing the magnitude of the chip signal having the predetermined amplitude and converting the chip signal into a chip signal having a magnitude of (+1) or (-1) may be included.

5 is a spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to an embodiment of the present invention. 4) It is a figure which shows the structure of a basic coding part. 4 of Q (4) means output 4 chips with constant amplitude.

The level converter 510 receives three input bit strings b 0 , b 1 , and b 2 having a value of 1 or 0, converts a level from 1 to (+1) and 0 to (-1), and then parallelizes them. A block for generating signals of d 0 , d 1 , and d 2 , and the margin bit generator 520 is a block for generating the margin bit d 3 by using Equation 1 from d 0 , d 1 , and d 2 . Four bits of d 0 , d 1 , d 2 , and d 3 are orthogonal code patterns each consisting of four chips in the multiplier 530.

Figure 112007508175175-PAT00020
After multiplying by and adding in the digital summing unit 540 to have a constant amplitude of (+2) or (-2), it is normalized in the normalizing unit 550 and changed to a value of (+1) or (-1). .

Orthogonal Code Pattern

Figure 112007508175175-PAT00021
Equation 2 is shown in Equation 2, which is actually equal to each row of the 4 x 4 Hadamard matrix. d 0 , d 1 , d 2 , d 3
Figure 112007508175175-PAT00022
Added after spreading using S 4 = [ s 0 , s 1 , s 2 , s 3 ] Equation 2 proves that each bit s 0 , s 1 , s 2 , and s 3 of S is a constant value of (+2) or (-2). The value of S 4 is normalized by (+2) to (+1) and (-2) to (-1) so that the final output of Q (4) is (+1) or ( The output of 4 chips with value of -1) is t 4 = [ t 0 , t 1 , t 2 , t 3 ].

FIG. 6 shows a spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention. 16) A diagram showing a configuration of an extension encoder.

A 9-bit input b 9 = ( b 0 , b 1 , .., b 8 ) with a unipolar value (1 or 0)

Figure 112007508175175-PAT00023
= ( b 0 , b 1 , b 2),
Figure 112007508175175-PAT00024
= ( b 3 , b 4 , b 5),
Figure 112007508175175-PAT00025
After dividing into three groups of = ( b 6 , b 7 , b 8) , they are each encoded by the Q (4) basic coding unit, followed by generating a spare bit in units of four chips, then spreading them together, Produces chip outputs.

The distribution unit 600 divides the 9-bit input into three groups, and then sends each group to the Q (4) basic encoder for processing. Three Q (4) basic encoders each consist of four chips

Figure 112007508175175-PAT00026
To create a free bit generator 620 is
Figure 112007508175175-PAT00027
4 bits of free bits from,
Figure 112007508175175-PAT00028
Create Four 4-chip vectors as shown in equation (4)
Figure 112007508175175-PAT00029
Pseudo-Hadamard code pattern of 4 x 16 matrix structure respectively in multiplier
Figure 112007508175175-PAT00030
And multiplied by 4 chips, and then summed by the digital adder 640 to have a 16 chip signal with a constant amplitude of (+2) or (-2) S 16 = [ s 0 , s 1 , .., s 15 ] And S 16 is normalized in the normalization unit 650 to output 16 chips with values of (+1) or (-1) t 16 = [ t 0 , t 1 , .., t 15 ] Is generated.

Code pattern

Figure 112007508175175-PAT00031
In Equation 4, each has a structure of a 4 x 16 matrix,
Figure 112007508175175-PAT00032
The matrix composed of 4 x 4 Hadamard matrix is replaced with 4 x 4 identity matrix. Such
Figure 112007508175175-PAT00033
Is a similar Hadamard code pattern.

Free bit vector

Figure 112007508175175-PAT00034
In units of 4 chips
Figure 112007508175175-PAT00035
Is obtained by performing the EXOR operation and the complementary operation according to Equation (6). Free bit vector
Figure 112007508175175-PAT00036
The method of obtaining is different from that of Q (4). The Q (4) base encoder adds d 3 = 3 for the level-converted input 3 bits.
Figure 112007508175175-PAT00037
Although the margin bit d 4 is generated by the following equation, the margin bit vector of the Q (16) extended encoder is
Figure 112007508175175-PAT00038
The output of the Q (4) basic encoder is first obtained for each 3 bits without performing an EXOR operation directly on a 9-bit input.
Figure 112007508175175-PAT00039
, And perform an EXOR operation on each of these 4 chip units
Figure 112007508175175-PAT00040
Get

Figure 112007508175175-PAT00041
end
Figure 112007508175175-PAT00042
Equation 6 proves that the value of each chip of the 16-chip signal S 16 = [ s 0 , s 1 , .., s 15 ] is always (+2) or (-2) multiplied by It was.

The Q (4) basic encoder that produces four chip signals for three-bit input and the Q (16) extended encoder that produces sixteen chip signals for nine-bit input have been described. In the above steps, we will look at the general method of generating 4 N power chip signals for 3 N power inputs.

7 is a spread spectrum product encoding method for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention, and an N power of 4 having a constant amplitude in response to the input of 3 N power bits in the apparatus. It is a figure which shows the structure of the Q (L) extension coding part which produces a chip signal. For the convenience of notation, N squares of 4 are simply expressed as L, and N squares of 3 are expressed as M.

M bit inputs with unipolar (1 or 0) values b M = ( b 0 , b 1 , .., b M -1 )

Figure 112007508175175-PAT00043
= ( b 0 , b 1 , .., b (M / 3-1) ),
Figure 112007508175175-PAT00044
= ( b M / 3 , b M / 3 + 1 , .., b 2 M / 3-1 ),
Figure 112007508175175-PAT00045
After dividing into three groups = ( b 2 M / 3 , b 2 M / 3 + 1 , .., b M -1 ), it is encoded by Q ( L / 4) in units of M / 3 bits, Spare bits are generated in L / 4 chip units.

The distribution unit 700 divides the input of the M bits into three groups, and then sends each group to Q (L / 4) for processing. Three Q ( L / 4) expansion encoders each output L / 4 bits

Figure 112007508175175-PAT00046
To generate the uppermost free bit generator 720
Figure 112007508175175-PAT00047
L / 4 free bits,
Figure 112007508175175-PAT00048
Create From the step of Q (64) or more, the diffusion process is not performed, and the L chip output is
Figure 112007508175175-PAT00049
Is generated.

[Equation 1]

The following table lists the possible values of d 0 , d 1 , d 2 , and d 3 .

Figure 112007508175175-PAT00001

[Equation 2]

Figure 112007508175175-PAT00002

Bipolar bits d 0 , d 1 , d 2 , d 3 are

Figure 112007508175175-PAT00050
Four-chip signal summed after spreading using S 4 = [ s 0 , s 1 , s 2 , s 3 ] Is given by In addition, it is represented by Equation 3 using vectors and matrices.

Figure 112007508175175-PAT00051

Looking at the table of Equation 1 d 0, d 1, d 2, always three bits among the four bits d 3 is equal to the value of the other bits can be seen that the value of the reverse. Using this fact, we can prove that s 0 , s 1 , s 2 , and s 3 are all (+2) or (-2).

d 0 , d 1 , d 2 , and d 3 have a value of (+1) or (-1), where s 0 is the sum, three of them are equal and the other is different, so the value of s 0 is ( +2) or (-2). On the other hand, s 1 is the sum of d 0 and d 2 minus the sum of d 1 and d 3 . In this case, if d 0 = d 2 then d 1 + d 3 = 0, so s 1 is either (+2) or (-2). Conversely, if d 0 = -d 2, the size of s 1 is (+2) or (-2). We can prove in a similar way that the values of the remaining outputs s 2 and s 3 are (+2) or (-2).

[Equation 3]

S 4 = [ s 0 , s 1 , s 2 , s 3 ] = [ d 0 , d 1 , d 2 , d 3 ] H 4

H 4 is a 4 x 4 Walsh-Hadamard matrix.

Figure 112007508175175-PAT00052

[Equation 4]

Figure 112007508175175-PAT00053

From here,

Figure 112007508175175-PAT00054
As an identity matrix of 4 x 4.

Outputs of the Q (4) base encoder

Figure 112007508175175-PAT00055
end
Figure 112007508175175-PAT00056
Multiply by and add the 16-chip signal output S 16 = [ s 0 , s 1 , .., s 15 ] to the 4-chip vector
Figure 112007508175175-PAT00057
When expressed in units as shown in Equation (5).

[Equation 5]

Figure 112007508175175-PAT00006

If this is expressed as determinant, it is as follows.

Figure 112007508175175-PAT00058

Here, I 4 means an identity matrix of 4 × 4.

[Equation 6]

Figure 112007508175175-PAT00059

If the above expression is expressed differently, it is as follows.

Figure 112007508175175-PAT00060

therefore

Figure 112007508175175-PAT00061
And slack vector
Figure 112007508175175-PAT00062
When each element of is

Figure 112007508175175-PAT00063

The following relationship holds between t 0 , t 1 , .., t 15 .

Figure 112007508175175-PAT00011

Therefore, the four chip vectors shown in Equation 5 by the same logic as in the case of the Q (4) basic coding unit

Figure 112007508175175-PAT00064
The value of each elemental chip of is always (+2) or (-2). Therefore, the value of each chip of the 16 chip signal S 16 = [ s 0 , s 1 , .., s 15 ] is always (+2) or (-2).

[Equation 7]

Figure 112007508175175-PAT00065

Figure 112007508175175-PAT00066
This is the identity matrix of L / 4 x L / 4.

Figure 112007508175175-PAT00067
end
Figure 112007508175175-PAT00068
L chip signal output S L = [ s 0 , s 1 , .., s L -1 ] obtained by multiplying by and summating L / 4 chip vector
Figure 112007508175175-PAT00069
When expressed in units, it is expressed as Equation 8.

The terms used to describe the embodiments of the present invention above are used for the purpose of describing the present invention, and are not used to limit the scope of the present invention as defined in the claims or the claims.

[Effects of the Invention]

In the code division multiple access communication system according to the present invention, a spread spectrum product encoding method and apparatus for maintaining a constant amplitude of a transmission signal, the amplitude of the linear combination of the orthogonal codes becomes constant when the data bits are encoded The clipping process can be eliminated, eliminating the problem of orthogonality due to level clipping. In addition, in conventional CS / CDMA, as the number of information bits increases, the information rate per chip decreases drastically. However, the present invention has excellent performance in that the information rate per chip maintains (3/4) N squares. In addition, while maintaining the code rate per chip of (3/4) N, which is an advantage of the hierarchical constant amplitude coding method, the configuration is simple and the system implementation cost is low.

1 is a diagram showing the configuration of a conventional DS / CDMA transmitter

2 is a diagram showing the configuration of a PW / CDMA transmitter of the prior art.

3 is a block diagram of a transmission signal encoding apparatus in a CS / CDMA communication system.

4 is a diagram of a case where the number of input bits is N powers of 3 in the hierarchical constant amplitude encoding method of a transmission signal in a code division multiple access communication system;

FIG. 5 is a diagram of three input bits in a spread spectrum product encoding method for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention.

6 is a diagram of a case in which nine input bits are used in a spread spectrum product encoding method for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention;

FIG. 7 is a diagram of a case where an input bit is N times three in the spread spectrum product encoding method for maintaining a constant amplitude of a transmission signal in a code division multiple access communication system according to the present invention.

Claims (4)

The basic encoding unit for the input three information bit streams, Q (4) is a level conversion unit for converting the level of the signal after serial-parallel conversion from (1) / (0) to (+1) / (-1); Output of the level converter, d 0 , d 1 , d 2 , d 3
Figure 112007508175175-PAT00070
A margin bit generator for generating one margin bit having a value of (+1) or (-1), d 3 by performing a logical operation according to the following equation;
A basic encoding multiplier for multiplying 4 bits of d 0 , d 1 , d 2 , and d 3 by combining the information bits and the spare bits, which are outputs of the level converter, with a 4 × 4 Hadamard code; A basic encoded digital adder for adding four multiplication results by the basic encoded multiplier to generate four chip signals having a predetermined amplitude; A hierarchical constant amplitude fundamental of a transmission signal in a code division multiple access communication system including a normalizer for normalizing an output of the digital adder to generate an output of four constant amplitude chips having a value of (+1) or (-1). Encoding device.
A recursive extension encoding unit for 3 ^ N (N-th power of 3) information bit streams, Q (4 ^ N) includes a divider for dividing the input into 3 groups of 3 ^ (N-1) bits; Recursively repeating the process of sending the output of the divider to the Q (4 ^ (N-1)) lower encoder that processes 3 ^ (N-1) input bits, resulting in 3 ^ (N-1) basics. A lower encoder comprising an encoder in the encoder Q (4), the base encoder for generating four constant amplitude chip outputs each having a value of (+1) or (-1) as described in claim 1; Outputting the intermediate encoder of the intermediate stage including the basic encoder;
Figure 112007508175175-PAT00071
In bits
Figure 112007508175175-PAT00072
(L / 4) spare bits that have the value of (+1) or (-1) by logical operation
Figure 112007508175175-PAT00073
A margin bit generation unit for generating a;
Outputting the three lower level encoding units;
Figure 112007508175175-PAT00074
And the output of the margin bit generator,
Figure 112007508175175-PAT00075
L bits made of one,
Figure 112007508175175-PAT00076
A multiplier for multiplying by a similar Hadamard code of size L x L ;
A digital adder configured to add the multiplication result to generate a chip signal having a predetermined amplitude; A normalizer for normalizing an output of the digital adder to generate an L bit output having a constant level of (+1) or (-1); As described above, the output of the three intermediate stages and the spare bits generated therefrom are then sequentially spread and normalized and sent to the input of the encoder of the next higher layer. A hierarchical constant amplitude extension encoding apparatus of a transmission signal in a code division multiple access communication system generating 4 ^ N constant amplitude chips having a value of -1).
A basic encoding unit for the input three information bit streams, Q (4), comprising: a level conversion step of converting a signal level from (1) / (0) to (+1) / (-1) after serial / parallel switching; The output of the level converter, d 0 , d 1 , d 2 , d 3 to
Figure 112007508175175-PAT00077
A margin bit generation step of generating a margin bit d 3 having a value of (+1) or (-1) by a logical operation by an equation;
A basic coded multiplication step of spreading by multiplying 4 bits of d 0 , d 1 , d 2 , and d 3 by combining the information bits and the spare bits as outputs of the level conversion unit with a 4 × 4 Hadamard code; A basic encoded digital summing step of adding four multiplication results by the basic encoded multiplier to produce four chip signals having a predetermined amplitude; A hierarchical constant amplitude fundamental of a transmission signal in a code division multiple access communication system including a normalizer for normalizing an output of the digital adder to generate an output of four constant amplitude chips having a value of (+1) or (-1). Encoding method.
The recursive extended encoding step for 3 ^ N information bit streams includes: a distribution step of dividing an input into three groups of 3 ^ (N-1) bits; Recursively repeating the process of sending the output of the divider to the Q (4 ^ (N-1)) lower encoder that processes 3 ^ (N-1) input bits, resulting in 3 ^ (N-1) basics. A lower encoding step including a basic encoding step in which the encoding unit generates four constant amplitude chip outputs each having a value of (+1) or (-1) as described in claim 4; Outputting the intermediate encoder of the intermediate stage including the basic encoder;
Figure 112007508175175-PAT00078
In bits
Figure 112007508175175-PAT00079
(L / 4) spare bits that have the value of (+1) or (-1) by logical operation
Figure 112007508175175-PAT00080
An extra bit generation step of generating;
Outputting the three lower level encoding units;
Figure 112007508175175-PAT00081
And the output of the margin bit generator,
Figure 112007508175175-PAT00082
L bits made of one,
Figure 112007508175175-PAT00083
A multiplication step of multiplying by a similar Hadamard code of L × L size;
A digital summing step of adding the multiplication results to produce a chip signal having a constant amplitude; A normalization step of normalizing an output of the digital adder to generate an output of L bits having a constant level of (+1) or (-1); As described above, the output of the three intermediate stages and the spare bits generated therefrom are then sequentially spread and normalized and sent to the input of the encoder of the next higher layer. A hierarchical constant amplitude extension encoding method of a transmission signal in a code division multiple access communication system generating 4 ^ N constant amplitude chips having a value of -1).
KR1020070097649A 2007-09-28 2007-09-28 Constant amplitude product coding method and apparatus in cdma communication systems and device thereof KR20090032418A (en)

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