KR20090026595A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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Publication number
KR20090026595A
KR20090026595A KR1020070091687A KR20070091687A KR20090026595A KR 20090026595 A KR20090026595 A KR 20090026595A KR 1020070091687 A KR1020070091687 A KR 1020070091687A KR 20070091687 A KR20070091687 A KR 20070091687A KR 20090026595 A KR20090026595 A KR 20090026595A
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KR
South Korea
Prior art keywords
film
metal
metal barrier
barrier film
forming
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KR1020070091687A
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Korean (ko)
Inventor
김준기
황의성
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주식회사 하이닉스반도체
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Priority to KR1020070091687A priority Critical patent/KR20090026595A/en
Publication of KR20090026595A publication Critical patent/KR20090026595A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4941—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon

Abstract

A method for manufacturing a semiconductor device is disclosed. A method of manufacturing a semiconductor device includes forming a gate insulating film on a semiconductor substrate, forming a gate conductive film on the gate insulating film, and applying a bias power to the semiconductor substrate to form a gate insulating film on the gate conductive film. Forming a metal barrier layer on the metal barrier layer; forming a metal layer on the metal barrier layer; and etching the gate insulating layer, the gate conductive layer, the barrier layer, and the metal layer to form a gate pattern.

Thus, according to the present invention, by forming a metal barrier film on the gate conductive film by a sputtering method while applying a bias power to the semiconductor substrate, the interface reaction between the metal film and the gate conductive film can be suppressed There is.

Description

Method of manufacturing semiconductor device

The present invention relates to a method for manufacturing a semiconductor device.

In general, a gate of a semiconductor device has a laminated film structure of a gate insulating film made of an oxide film and a polysilicon film, and a hard mask film formed on the gate conductive film. This is because the polysilicon film satisfies physical properties required as a gate such as high melting point, ease of thin film formation, ease of line pattern, stability to an oxidizing atmosphere, and formation of a flat surface.

However, as the design rule is reduced in accordance with the recent trend of high integration of semiconductor devices, the gate to which the polysilicon film is applied has a limit in implementing low resistance in a fine line width.

Accordingly, in order to form a gate having a lower resistance, a polyside gate structure including a structure in which a metal silicide film, which is an ohmic layer, is formed on the polysilicon film, and a metal gate structure including a structure in which a metal film is formed on a polysilicon film are developed. There is a bar. In the metal gate structure, a tungsten (W) film is mainly used as the metal gate.

However, in the case of the metal gate to which the tungsten film is applied, a tungsten silicide (WSix) film is formed in a subsequent heat treatment process as the tungsten film and the polysilicon film are in direct contact with each other. Caused by stress.

In order to solve this problem, a tungsten nitride film is interposed between the tungsten film and the polysilicon film as a metal barrier film. However, when a metal barrier film is formed between the tungsten film and the polysilicon film, an interfacial reaction occurs between the tungsten nitride film and the polysilicon film to increase the interface resistance.

In order to solve the above problems, a method of forming a tungsten silicide film, a titanium film (Ti) and / or a titanium nitride film (TiN) between the tungsten nitride film and the polysilicon film has been developed.

However, when the tungsten silicide film is formed on the polysilicon film during subsequent metal gate formation, the resistance of the metal gate may be reduced, but a contact resistance problem may occur. Furthermore, the titanium film and / or the titanium nitride film Is formed on the polysilicon film, the contact resistance problem does not occur, but the grain size of the metal film formed on the tungsten nitride film is reduced due to the crystallization of the tungsten nitride film formed on the titanium film and / or the titanium nitride film. do. As a result, in subsequent formation of the metal gate, the resistance of the metal gate is increased due to the decrease in grain size of the tungsten film.

The present invention relates to a method for manufacturing a semiconductor device capable of reducing the resistance of the metal gate.

A method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a gate insulating film on a semiconductor substrate, forming a gate conductive film on the gate insulating film, and sputtering while applying a bias power to the semiconductor substrate. Forming a metal barrier film on the gate conductive film by a method, forming a metal film on the metal barrier film, etching the gate insulating film, the gate conductive film, the barrier film, and the metal film to form a gate pattern. Forming a step.

Here, the gate conductive film includes a polysilicon film.

The bias power is 100 to 600 W.

The forming of the metal barrier layer may include removing the metal particles from the metal target facing the semiconductor substrate, and accelerating the metal particles toward the semiconductor substrate by the bias power.

The forming of the metal barrier layer may include forming a first metal barrier layer on the gate conductive layer and forming a second metal barrier layer on the first metal barrier layer.

The forming of the first metal barrier film may include removing first metal particles from a first metal target facing the semiconductor substrate, and accelerating the first metal particles toward the semiconductor substrate by the bias power. It includes.

The forming of the second metal barrier film may include removing the second metal particles from the second metal target facing the semiconductor substrate, and accelerating the second metal particles toward the semiconductor substrate by the bias power. It includes a step.

The second metal barrier film is in an amorphous state.

The second metal barrier film includes a small crystal size in an amorphous state.

After forming the second metal barrier film, forming the third metal barrier film.

The first metal barrier film includes at least one of a titanium film, a tungsten film, and a tungsten silicide film.

The second metal barrier film includes at least one of a titanium nitride film, a tungsten nitride film, and a tungsten silicon nitride film.

The third metal barrier film includes at least one of a tungsten nitride film and a tungsten silicon nitride film.

The metal film is formed by a physical vapor deposition (PVD) method.

The metal film includes a tungsten film.

In addition, according to another embodiment of the present invention, a method of manufacturing a semiconductor device includes forming a gate insulating film on a semiconductor substrate, forming a gate conductive film on the gate insulating film, and forming a first conductive film on the gate conductive film. Forming a metal barrier film, forming a second metal barrier film on the first metal barrier film by sputtering while applying bias power on the semiconductor substrate, and forming a metal film on the second metal barrier film. And forming a gate structure by patterning the gate insulating layer, the gate conductive layer, the first and second metal barrier layers, and the metal layer.

Here, the gate conductive film includes a polysilicon film.

The first metal barrier film is formed by a physical vapor deposition (PVD) method.

The bias power is 100 to 600 W.

The forming of the second metal barrier film includes removing the metal particles from the metal target facing the semiconductor substrate, and accelerating the metal particles toward the semiconductor substrate using the bias power. .

The second metal barrier film is in an amorphous state.

The second metal barrier film includes a small crystal size in an amorphous state.

The first metal barrier film includes at least one of a titanium film, a tungsten film, and a tungsten silicide film.

The second metal barrier film includes at least one of a titanium nitride film, a tungsten nitride film, and a tungsten silicon nitride film.

The method may further include forming the third metal barrier film between the forming of the second metal barrier film and the forming of the metal film.

The third metal barrier film includes at least one of a tungsten nitride film and a tungsten silicon nitride film.

The metal film is formed by a physical vapor deposition (PVD) method.

The metal film includes a tungsten film.

In the present invention, an amorphous metal barrier film is formed between the gate conductive film and the metal film by the sputtering method while applying the bias power. Therefore, when the metal gate is formed, a metal film having large grains can be formed. As a result, the resistance of the metal gate can be reduced, and the interfacial reaction between the metal film and the gate conductive film can be suppressed.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

According to the present invention, a metal barrier film is formed on a gate conductive film by a sputtering method while applying a bias power to a semiconductor substrate during metal gate formation.

The metal barrier film is formed on the gate conductive film by the metal particles accelerated toward the semiconductor substrate by the sputtering method while applying the bias power, and thus, between the gate conductive film and the metal film. It is possible to suppress interfacial reactions that can be caused, thereby reducing the interfacial resistance of the metal gate.

1A through 1F are cross-sectional views of processes for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1A, a gate insulating layer 102 is formed on a semiconductor substrate 100 having an isolation layer (not shown). The gate insulating layer 102 may be an oxide layer and / or a nitride layer.

Referring to FIG. 1B, a gate conductive layer 104 is formed on the gate insulating layer 102. The gate conductive layer 104 may be a polysilicon layer, and the polysilicon layer may be doped with P-type impurities or doped with N-type impurities.

Referring to FIG. 1C, a first metal barrier film 106 that is a part of an amorphous metal barrier film is formed on the gate conductive film 104 in a state where a bias power is applied to the semiconductor substrate 100. The first metal barrier film 106 may include an amorphous material or may be formed of a film having a small crystal size on the amorphous material. The first metal barrier film 106 may be a titanium (Ti) film or tungsten silicide. It may be formed of any one of (WSix) films.

The first metal barrier film 106 is formed by a PVD process using a PVD device having a metal target. In order to form the first metal barrier film 106, the first metal particles are separated from the first metal target (not shown) facing the semiconductor substrate 200 by using plasmalized ions, and in detail, The first metal barrier film 106 is a PVD method according to a sputtering method, wherein the first metal particles bounced from the target in the process of hitting the metal target by the first metal particles formed by the plasma using a sputtering device are formed on the semiconductor substrate. The film is deposited by moving to 100 and depositing on the semiconductor substrate 100.

In this case, some of the first metal particles bounced off the target are ionized in the course of the plasma, and when the bias power is applied to the semiconductor substrate 100, the ionized first metal particles are directed toward the semiconductor substrate 100. Accelerated, first metal particles are deposited on the gate conductive film 104, and a first metal barrier film 106 is formed on the gate conductive film 104. Here, the bias power applied to the semiconductor substrate 100 is 100 to 600W.

Referring to FIG. 1D, after forming the first metal barrier film 106, a bias power is applied to the semiconductor substrate 100 to form a second metal barrier film 108 on the first metal barrier film 106. ).

The second metal barrier film 108 may include an amorphous state, or may be formed of a film having a small crystal size in the amorphous state, and the second metal barrier film 108 may be a titanium nitride film (TiN) or tungsten. It may be formed of any one of the nitride film WN and the tungsten silicon nitride film WSiN.

Here, the second metal barrier film 108 is formed by a PVD process using a PVD device having a metal target like the first metal barrier film 106.

In order to form the second metal barrier film 108, the second metal particles are separated from the second metal target (not shown) facing the semiconductor substrate 200 by using plasmalized ions, and in detail, The second metal barrier film 108 is a PVD method according to the sputtering method. In the process of hitting the metal target with the second metal particles formed by the plasma using the sputtering device, the second metal particles bounced from the target are the semiconductor. The film is deposited by moving to the substrate 100 and being deposited on the semiconductor substrate 100.

At this time, some of the second metal particles bounced off the target are ionized in the course of the plasma, and when the bias power is applied to the semiconductor substrate 100, the ionized second metal particles are directed toward the semiconductor substrate 100. As the second metal particles are accelerated, the second metal barrier film 108 is formed on the first metal barrier film 106. Here, the bias power applied to the semiconductor substrate 100 is 100 to 600W.

The first and second metal barrier films 106 and 108 are formed of an amorphous metal barrier film 110.

In this case, when the bias power is applied to the semiconductor substrate 100, a force in which the first and second metal particles collide with each other increases, thereby amorphousening a film deposited on the gate conductive film 104, that is, a metal film to be subsequently formed. You can.

As a result, the amorphous metal barrier film 110 can suppress the interfacial reaction between the gate conductive film 104 and the metal film to be subsequently formed and form a metal film having large crystal grains, thereby preventing the metal gate resistance from increasing. have.

In an embodiment, the amorphous metal barrier film 110 may be formed between the metal film to be subsequently formed and the gate conductive film 104 to increase the grain size of the metal film and reduce the resistivity of the metal film. Through this, the resistance of the gate can be effectively improved.

Referring to FIG. 1E, a metal film 112 is formed on the second metal barrier film 108. The metal film 112 includes a tungsten film.

Here, after forming the second metal barrier film 108, a third metal barrier film (not shown) may be formed before forming the metal film 112. In this case, the third metal barrier film may be formed of at least one of a tungsten nitride film WN or a tungsten silicon nitride film WSiN.

Referring to FIG. 1F, the metal film 112, the amorphous metal barrier film 110, the gate conductive film 104, and the gate insulating film 102 are patterned to form a metal gate G. Referring to FIG.

Here, the present invention forms a metal barrier film on the gate conductive film by applying a bias power to the semiconductor substrate.

In this way, the bias power is applied to not only suppress the interfacial reaction that may be caused between the metal film to be subsequently formed on the gate conductive film and the gate conductive film, but also by the bias power. When the metal barrier film is amorphous to form a subsequent metal gate, a metal film with large grains can be formed. Through this, the resistance of the metal gate can be reduced.

2A through 2F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with another embodiment of the present invention.

Referring to FIG. 2A, a gate insulating layer 202 is formed on a semiconductor substrate 200 having an isolation layer (not shown). The gate insulating film 202 may be an oxide film and / or a nitride film.

Referring to FIG. 2B, a gate conductive layer 204 is formed on the gate insulating layer 202. The gate conductive layer 204 may be a polysilicon layer, and the polysilicon layer may be doped with P-type impurities or doped with N-type impurities.

Referring to FIG. 2C, a first metal barrier film 206 is formed on the gate conductive film 204. The first metal barrier layer 206 may be formed of a titanium (Ti) layer or a tungsten silicide (WSix) layer.

Referring to FIG. 2D, after the first metal barrier layer 206 is formed, a portion of an amorphous metal barrier layer on the first metal barrier layer 206 is applied while the bias power is applied to the semiconductor substrate 200. The second metal barrier film 208 is formed.

The second metal barrier film 206 may include an amorphous material or may be formed of a film having a small crystal size on the amorphous material. The second metal barrier film 206 may be a titanium nitride (TiN) film or tungsten. It may be formed of any one of a nitride (WN) film and a tungsten silicon nitride film (WSiN).

The second metal barrier film 208, which is part of the amorphous metal barrier film, is formed as the metal barrier film 210 by the first metal barrier film 206 and the bias power.

The second metal barrier film 208 is formed by a PVD process using a PVD device having a metal target. To form the second metal barrier film 208, metal particles are separated from the metal target (not shown) facing the semiconductor substrate 200 by using plasmidated ions, and in detail, the second metal barrier. The film 208 is a PVD method according to the sputtering method in the process of the metal particles formed by the plasma hit the metal target using a sputtering device, the metal particles bounced off from the target is moved to the semiconductor substrate 200 The film is deposited by the method deposited on the semiconductor substrate 200.

In this case, a part of the metal particles bounced off the target is ionized in the course of passing the plasma, and when the bias power is applied to the semiconductor substrate 200, the ionized metal particles accelerate toward the semiconductor substrate 200, Metal particles are formed on the first metal barrier film 206. Here, the bias power applied to the semiconductor substrate 200 is 100 to 600W.

Here, the present invention can suppress the interfacial reaction with the metal film to be subsequently formed by forming the second metal barrier film 208 that is part of the amorphous metal barrier film by the bias power, thereby, the interface of the metal gate The resistance can be prevented from increasing.

Referring to FIG. 2E, a metal film 212 is formed on the second metal barrier film 208. The metal film 212 includes a tungsten film.

Here, after forming the second metal barrier film 208, before forming the metal film 212, a third metal barrier film (not shown) may be formed. In this case, the third metal barrier film may be formed of at least one of a tungsten nitride film WN or a tungsten silicon nitride film WSiN.

Referring to FIG. 2F, the metal film 212, the second metal barrier film 208, the first metal barrier film 206, the gate conductive film 104, and the gate insulating film 102 are patterned to form a metal gate. (G) is formed.

Subsequently, although not shown, a series of subsequent known processes are sequentially performed to complete a semiconductor device according to another embodiment of the present invention.

In the present invention, after the first metal barrier film is formed on the gate conductive film, a bias power is applied to the semiconductor substrate to form a second metal barrier film that is part of an amorphous metal barrier film on the first metal barrier film.

This can suppress the interfacial reaction that can be caused between the metal film to be subsequently formed and the gate conductive film, and thus the same effect as the present invention can be obtained.

3A to 3C are graphs showing a crystal structure according to bias power when a titanium nitride film (TiN) is used as the metal barrier film.

3A is a graph showing a crystal structure of a titanium nitride film formed when a bias power is not applied to a semiconductor substrate, and it can be seen that the titanium nitride film to which the bias power is not applied has a crystal peak.

3B is a graph showing a crystal structure of a titanium nitride film formed when 100 W of bias power is applied to a semiconductor substrate, and the titanium nitride film formed with 100 W of bias power is relatively reduced compared to the peak shown in FIG. 3A. It can be seen that the crystal structure has a peak.

FIG. 3C is a graph showing the crystal structure of a titanium nitride film formed when the bias power is increased to 200 W and applied to the semiconductor substrate. The titanium nitride film formed with the 200 W bias power applied to the peak shown in FIG. It can be seen that the amorphous structure is relatively reduced compared to the peak.

Therefore, when the bias power is increased, the peak size gradually decreases, so that the crystal structure of the titanium nitride film is broken to change from the crystal structure to the amorphous structure.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

1A through 1F are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

2A through 2E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with another embodiment of the present invention.

3A to 3C are graphs showing the crystal structure according to the bias power.

Claims (28)

Forming a gate insulating film on the semiconductor substrate; Forming a gate conductive film on the gate insulating film; Forming a metal barrier film on the gate conductive film by sputtering while applying a bias power to the semiconductor substrate; Forming a metal film on the metal barrier film; And Etching the gate insulating film, the gate conductive film, the barrier film, and the metal film to form a gate pattern; Method of manufacturing a semiconductor device comprising a. The method of claim 1, The gate conductive film is a semiconductor device manufacturing method, characterized in that it comprises a polysilicon film. The method of claim 1, The bias power is a manufacturing method of a semiconductor device, characterized in that 100 ~ 600W. The method of claim 1, Forming the metal barrier film, Removing the metal particles from the metal target facing the semiconductor substrate; And Accelerating the metal particles toward the semiconductor substrate by the bias power; Method of manufacturing a semiconductor device comprising a. The method of claim 1, Forming the metal barrier film, Forming a first metal barrier film on the gate conductive film; And Forming a second metal barrier film on the first metal barrier film; Method of manufacturing a semiconductor device comprising a. The method of claim 5, wherein Forming the first metal barrier film, Removing the first metal particles from the first metal target facing the semiconductor substrate; And Accelerating first metal particles toward the semiconductor substrate by the bias power; Method of manufacturing a semiconductor device comprising a. The method of claim 5, wherein Forming the second metal barrier film, Removing the second metal particles from a second metal target facing the semiconductor substrate; And Accelerating the second metal particles toward the semiconductor substrate by the bias power; Method of manufacturing a semiconductor device comprising a. The method of claim 5, wherein The second metal barrier film is a method of manufacturing a semiconductor device, characterized in that the amorphous state. The method of claim 8, And the second metal barrier film includes a small crystal size in an amorphous state. The method of claim 5, wherein After the forming of the second metal barrier film, Forming the third metal barrier film; Method of manufacturing a semiconductor device comprising a. The method of claim 5, wherein The first metal barrier film includes at least one of a titanium film, a tungsten film, and a tungsten silicide film. The method of claim 5, wherein The second metal barrier film includes at least one of a titanium nitride film, a tungsten nitride film, and a tungsten silicon nitride film. The method of claim 10, And the third metal barrier film comprises at least one of a tungsten nitride film and a tungsten silicon nitride film. The method of claim 1, The metal film is a method of manufacturing a semiconductor device, characterized in that formed by the Physical Vapor Deposition (PVD) method. The method of claim 1, And said metal film comprises a tungsten film. Forming a gate insulating film on the semiconductor substrate; Forming a gate conductive film on the gate insulating film; Forming a first metal barrier film on the gate conductive film; Forming a second metal barrier film on the first metal barrier film by sputtering while applying a bias power to the semiconductor substrate; Forming a metal film on the second metal barrier film; And Patterning the gate insulating film, the gate conductive film, the first and second metal barrier films, and the metal film to form a gate structure; Method of manufacturing a semiconductor device comprising a. The method of claim 16, The gate conductive film is a semiconductor device manufacturing method, characterized in that it comprises a polysilicon film. The method of claim 16, The first metal barrier film is a semiconductor device manufacturing method, characterized in that formed by the PVD (Physical Vapor Deposition) method. The method of claim 16, The bias power is a manufacturing method of a semiconductor device, characterized in that 100 ~ 600W. The method of claim 16, Forming the second metal barrier film, Removing the metal particles from the metal target facing the semiconductor substrate; And Accelerating the metal particles toward the semiconductor substrate using the bias power; Method of manufacturing a semiconductor device comprising a. The method of claim 16, The second metal barrier film is a method of manufacturing a semiconductor device, characterized in that the amorphous state. The method of claim 21, And the second metal barrier film includes a small crystal size in an amorphous state. The method of claim 16, The first metal barrier film includes at least one of a titanium film, a tungsten film, and a tungsten silicide film. The method of claim 16, The second metal barrier film includes at least one of a titanium nitride film, a tungsten nitride film, and a tungsten silicon nitride film. The method of claim 16, And forming the third metal barrier film between the forming of the second metal barrier film and the forming of the metal film. The method of claim 25, And the third metal barrier film comprises at least one of a tungsten nitride film and a tungsten silicon nitride film. The method of claim 16, The metal film is a method of manufacturing a semiconductor device, characterized in that formed by the Physical Vapor Deposition (PVD) method. The method of claim 16, And said metal film comprises a tungsten film.
KR1020070091687A 2007-09-10 2007-09-10 Method of manufacturing semiconductor device KR20090026595A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10361194B2 (en) 2015-10-30 2019-07-23 Samsung Electronics Co., Ltd. Semiconductor devices and methods of fabricating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10361194B2 (en) 2015-10-30 2019-07-23 Samsung Electronics Co., Ltd. Semiconductor devices and methods of fabricating the same
US10872888B2 (en) 2015-10-30 2020-12-22 Samsung Electronics Co., Ltd. Semiconductor devices and methods of fabricating the same
US11495597B2 (en) 2015-10-30 2022-11-08 Samsung Electronics Co., Ltd. Semiconductor devices and methods of fabricating the same

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