KR20090012421A - Data modulation method, modulator, recording method, and recording apparatus - Google Patents
Data modulation method, modulator, recording method, and recording apparatus Download PDFInfo
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- KR20090012421A KR20090012421A KR1020070076224A KR20070076224A KR20090012421A KR 20090012421 A KR20090012421 A KR 20090012421A KR 1020070076224 A KR1020070076224 A KR 1020070076224A KR 20070076224 A KR20070076224 A KR 20070076224A KR 20090012421 A KR20090012421 A KR 20090012421A
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- sequence
- channel sequence
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- channel
- modulation table
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10268—Improvement or modification of read or write signals bit detection or demodulation methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
Abstract
Description
The present invention relates to a data modulation method, a modulation apparatus, a recording method and a recording apparatus, and more particularly, to a method and apparatus for modulating data recorded on an optical recording medium, and a recording method and apparatus therefor.
A general recording system uses a modulation code, which is used to reduce distortion of a reproduction signal caused by interference between adjacent symbols in the reproduction portion of the recording system and to provide smooth timing recovery.
The modulation code at this time can be expressed as ( d , k ), which is called a run length limit (RLL) code. Here, d is a constraint condition that means the minimum number of zeros that may exist between 1 and 1 of the modulation code, and is a condition for reducing distortion of a signal caused by interference between adjacent symbols. In addition, k is a constraint condition that means the maximum number of zeros that may exist between 1 and 1, and is a condition for timing recovery.
Modulation code design when k - changed when the observed sequence that violates the
In other words, the bit flip method is a method of adding a k -restriction condition by applying an error to a channel sequence. In this method, an error is applied to a channel sequence, which is a sequence before being recorded on the recording medium, so that an error is included in the sequence recorded on the recording medium.
Therefore, if a bit flip occurs frequently in such a bit flip method, it is difficult to restore the original data during demodulation, and there is a limit in improving the recording density even when the bit flip is possible.
Accordingly, the present invention is to solve the above problems, an object of the present invention is to provide a demodulation method, a demodulation device, a recording method and a recording device that can easily restore the original data, improve the recording density have.
In order to achieve the above object, a method of modulating data according to the present invention comprises the steps of generating a channel sequence for an input sequence using a modulation table, and when the channel sequence violates run length constraints, Replacing with an illegal sequence that cannot be generated by the modulation table.
In this case, the run length constraint may be a condition for the maximum number of zeros existing between 1 and 1 in the channel sequence.
In this case, the intermediate sequence of the channel sequence may be replaced with the illil sequence.
The modulation table may have at least two illicit sequences. In this case, in the step of replacing with the alligator sequence, a part of the channel sequence may be replaced by selecting an alligator sequence having the highest DC suppression efficiency among at least two alligator sequences.
A partial sequence may be selected to replace a part of the channel sequence so as to satisfy a parity preserving condition among at least two daily sequences.
The modulation table may include at least one state, code words corresponding to the input sequence, and information designating the next state.
Meanwhile, the data modulation apparatus according to the present invention determines whether a run length constraint of a modulation table and a channel sequence for generating a channel sequence for an input sequence is violated, and modulates a part of the channel sequence if the run length constraint is violated. It includes a bit flipper that replaces the one sequence that cannot be generated by the table.
Meanwhile, in the data recording method according to the present invention, a channel sequence for an input sequence is generated by using a modulation table, and when a channel sequence violates a run length constraint, a part of the channel sequence may be generated by the modulation table. Generating modulation data by substituting an idle sequence which is absent and storing the modulation data on a recording medium.
On the other hand, the data recording apparatus according to the present invention includes a modulator for modulating data and an optical unit for irradiating light to the recording medium and recording the modulated data generated by the modulator on the recording medium, wherein the modulator is configured for an input sequence. Bits that determine whether the run length constraints of the modulation table and channel sequence that generate the channel sequence are violated, and if part of the run length constraint is violated, replaces a portion of the channel sequence with an illigible sequence that cannot be generated by the modulation table. It includes a flipper.
The present invention can provide a demodulation method, a demodulation device, a recording method, and a recording device which can easily restore original data during demodulation and can improve recording density. In addition, the modulation method according to the present invention has excellent DC suppression efficiency.
Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail. As used herein, the term " recording device " means any device capable of recording data or reproducing the recorded data using a recording medium. In addition, the term " recording medium " in the present specification means any medium in which data is recorded or can be recorded, and specifically, an optical disk can be given.
1 is a block diagram of a recording apparatus according to an embodiment of the present invention. As shown, the recording apparatus according to the embodiment of the present invention includes a modulator 100 and an
The modulator 100 includes a modulation table 10, a
In this case, the modulation table 10 includes at least one register, each register including a code word corresponding to the input code and information designating the next register.
The
The
Hereinafter, a data modulation method according to a first embodiment of the present invention will be described in detail with reference to FIGS. 2 and 1. In the following description, a case where a code rate is 2/3, that is, a case where a 3-bit codeword is generated with respect to a 2-bit input code will be described as an example. In addition, as shown in Table 1, a modulation method in the case where the modulation table 10 includes five registers each divided into five states will be described as an example. However, the present invention is not limited thereto.
First, a channel sequence corresponding to the bits input by the modulation table 10 is generated. More specifically, the code word corresponding to the initial input code is output in the initially set state, and the code word for the next input code is sequentially generated by moving to the next state specified in the modulation table 10.
For example, suppose that the modulation code starts encoding at S1, and when the input sequence of the modulation code encoder is "10 10 10 10", the channel code for the initial input code "10" according to Table 1 is "000". ", And the next state is S1. Therefore, the channel code for the next input code "10" also becomes "000". The channel sequence generated according to this process becomes "000, 000, 000, 000".
At this time, the generated channel sequence violates the k-
Specifically, it can be seen that the "101 010" channel sequence cannot be generated by the modulation table of Table 1. Here, the channel sequence pattern that cannot be generated in the modulation table such as "101 010" is defined as IS. At this time, the insert, when the modulation code is, while monitoring the channel sequence generated to satisfy the k-
In FIG. 2, for example, the IS is inserted into an intermediate position of the channel sequence. By inserting the IS in the intermediate position of the channel sequence, the channel sequence generated by the modulation code encoder does not violate the d constraint, which is another constraint of the modulation code. However, the present invention is not limited thereto, and the insertion position of the IS may be different for each designed modulation code.
On the other hand, two or more IS may exist in the modulation table. In this case, as shown in FIG. 3, any one of two or more ISs may be selected and inserted into the channel sequence. In this case, it is preferable to insert IS in consideration of parity preserving and DC suppression efficiency. As described above, the more ISs exist in the modulation table, the more number of code words can be obtained than the candidates. Therefore, in this case, the modulation method according to the present invention has a better DC suppression potential.
1 is a block diagram of a data recording apparatus according to an embodiment of the present invention.
2 is a schematic diagram showing an example of a modulation method according to an embodiment of the present invention.
3 is a block diagram showing a modulation method according to an embodiment of the present invention.
* Description of the symbols for the main parts of the drawings *
10: modulation table 12: bit flipper
14: precoder 100: modulator
200: optical unit 300: recording medium
Claims (22)
Priority Applications (1)
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KR1020070076224A KR20090012421A (en) | 2007-07-30 | 2007-07-30 | Data modulation method, modulator, recording method, and recording apparatus |
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KR1020070076224A KR20090012421A (en) | 2007-07-30 | 2007-07-30 | Data modulation method, modulator, recording method, and recording apparatus |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2506159A (en) * | 2012-09-24 | 2014-03-26 | Ibm | 2 Stage RLL coding, standard coding with global/interleave constraints, then sliding window substitution with sequences having different constraints |
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2007
- 2007-07-30 KR KR1020070076224A patent/KR20090012421A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2506159A (en) * | 2012-09-24 | 2014-03-26 | Ibm | 2 Stage RLL coding, standard coding with global/interleave constraints, then sliding window substitution with sequences having different constraints |
US8854237B2 (en) | 2012-09-24 | 2014-10-07 | International Business Machines Corporation | Modulation encoding and decoding |
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