KR20090002161A - Semiconductor light emitting device and manufacturing method of semiconductor light emitting device - Google Patents

Abstract

The semiconductor light emitting device according to the present invention comprises a substrate; An n-type semiconductor layer formed on the substrate and having an inclined side surface; An active layer formed on the n-type semiconductor layer; And a p-type semiconductor layer formed on the active layer. In addition, the method for manufacturing a semiconductor light emitting device according to the present invention comprises the steps of: forming a mask layer having a groove on the side inclined upward on a substrate in a wafer state; Forming an epitaxial layer in the groove; Forming an n-type electrode and a p-type electrode after the epitaxial layer is etched; Removing the mask layer; And separating the substrate by a chip through a scribing process.

According to the present invention, the critical angle of the light projection surface is adjusted, thereby reducing the absorption rate at the critical surface of photons traveling from the active layer and maximizing external photon efficiency. In addition, since the critical angle of the light projection surface can be formed at various angles through a minimized process, it is possible to manufacture a high brightness semiconductor light emitting device at low production cost.

Description

Semiconductor light emitting device and manufacturing method of semiconductor light emitting device

1 is a side cross-sectional view schematically showing the components of a typical semiconductor light emitting device.

2 is a view schematically illustrating a form in which light generated in an active layer of a general semiconductor light emitting device is absorbed.

Figure 3 is a side cross-sectional view schematically showing the components of a semiconductor light emitting device according to an embodiment of the present invention.

4 is a view schematically illustrating a form in which light generated in an active layer of a semiconductor light emitting device according to an embodiment of the present invention is reflected or transmitted.

5 is a flowchart illustrating a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

FIG. 6 is a side cross-sectional view illustrating a form after an etch stop layer is formed on a mask layer in a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

Figure 7 is a side cross-sectional view illustratively showing the shape after the groove is formed in the mask layer of the method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

FIG. 8 is a side cross-sectional view exemplarily illustrating a form after an epitaxial layer is formed in a groove of a mask layer in a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention; FIG.

Figure 9 is a side cross-sectional view illustratively showing the form after the electrode is deposited on the epi layer in the method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

FIG. 10 is a side cross-sectional view illustrating a form in which a mask layer is removed and separated in units of chips in a method of manufacturing a semiconductor light emitting device according to an embodiment of the present invention.

<Explanation of symbols for main parts of drawing>

100: semiconductor light emitting device 110: substrate

112: buffer layer 114: undoped semiconductor layer

120: n-type semiconductor layer 130: cladding layer

140: active layer 145: p-type semiconductor layer

150: transparent electrode layer 160: p-type electrode

170: n-type electrode

The present invention relates to a semiconductor light emitting device and a method for manufacturing the semiconductor light emitting device.

In general, a semiconductor light emitting device (LED) is a light emitting diode (LED), which is used to send and receive signals by converting electrical signals into infrared, visible or light forms using the characteristics of compound semiconductors. It is an element.

In general, miniaturized LEDs are made of a surface mount device type for direct mounting on a printed circuit board (PCB) board. Accordingly, LED lamps, which are used as display elements, are also being developed as surface mount device types. . Such a surface-mounting device can replace a conventional simple lighting lamp, and is used as a lighting display that emits various colors, a character display, and an image display.

In particular, many researches and investments have been made on semiconductor optical devices using Group 3 and Group 5 compounds such as GaN (gallium nitride), AlN (aluminum nitride), and InN (indium nitride). This is because the nitride semiconductor light emitting device has a bandgap of a very wide area ranging from 1.9 eV to 6.2 ev, and the bandgap engineering using the same has the advantage of realizing three primary colors of light on one semiconductor.

Recently, the development of blue and green light emitting devices using nitride semiconductors has revolutionized the optical display market and is considered as one of the promising industries that can create high added value in the future. However, as mentioned above, in order to pursue more industrial use in such a semiconductor light emitting device, increasing the luminance of light emission is a problem to be taken first.

FIG. 1 is a side cross-sectional view illustrating components of a general semiconductor light emitting device 10 by way of example, and FIG. 2 is a view schematically illustrating a form in which light generated in an active layer of a general semiconductor light emitting device is absorbed.

Referring to FIG. 1, a general semiconductor light emitting device 10 includes a substrate 11 made of sapphire or SiC, a buffer layer 12 grown in a polycrystalline thin film structure of, for example, an Al _y Ga _1-y N layer at a low temperature growth temperature. ), An n-type semiconductor layer 13 doped with Si (silicon), a quantum well (MQW) structure, and an active layer 14 and Mg (magnesium) doped to generate light by combining holes and electrons. It comprises a p-type semiconductor layer 15, a transparent electrode layer 16, a p-type electrode 17 and an n-type electrode 18.

In general, the semiconductor light emitting device 10 having such a configuration has a higher refractive index (Refractive index) than the surrounding materials such as air (air), substrate (resin, resin), and the like. As can be seen, photon generated in the active layer 14 (A (indicated by the point light source in FIG. 2) is not emitted to the outside but absorbed / dissipated in the inside occurs (i.e., the semiconductor layer 13 and Due to the difference in refractive index of the atmosphere, the light cannot penetrate the critical plane and some light is absorbed or reflected inside the critical plane, resulting in weak light intensity).

Due to this problem, the external quantum efficiency is lowered, which acts as a barrier to improving the light emission luminance of the semiconductor light emitting device.

The present invention provides a semiconductor light emitting device in which the external photon efficiency is maximized.

In addition, the present invention provides a semiconductor light emitting device having a structure in which light generated in the active layer is emitted to the outside without being absorbed / dissipated inside by overcoming the difference in refractive index between the semiconductor layer and the surrounding material.

The present invention provides a method of manufacturing a semiconductor light emitting device capable of mass-producing a high brightness semiconductor light emitting device with a simplified process and low production cost.

The semiconductor light emitting device according to the present invention comprises a substrate; An n-type semiconductor layer formed on the substrate and having an inclined side surface; An active layer formed on the n-type semiconductor layer; And a p-type semiconductor layer formed on the active layer.

According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor light emitting device, the method comprising: forming a mask layer having a groove on a side inclined upwardly on a substrate in a wafer state; Forming an epitaxial layer in the groove; Forming an n-type electrode and a p-type electrode after the epitaxial layer is etched; Removing the mask layer; And separating the substrate by a chip through a scribing process.

Hereinafter, a semiconductor light emitting device and a method of manufacturing the semiconductor light emitting device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. For convenience of understanding, the configuration and operation of the semiconductor light emitting device will be described together with the manufacturing method thereof. Let's do it.

3 is a side cross-sectional view schematically illustrating the components of the semiconductor light emitting device 100 according to the embodiment of the present invention, and FIG. 4 is a view showing an active layer 140 of the semiconductor light emitting device 100 according to the embodiment of the present invention. It is a figure which modeled the form in which the generated light is reflected or transmitted.

Referring to FIG. 3, a semiconductor light emitting device 100 according to an exemplary embodiment of the present invention may include a substrate 110, a buffer layer 112, an undoped semiconductor layer 114, an n-type semiconductor layer 120, The cladding layer 130, the active layer 140, the p-type semiconductor layer 145, the transparent electrode layer 150, the p-type electrode 160, and the n-type electrode 170 are included. The element 100 illustrates a semiconductor light emitting device (separated into a chip state from a wafer state) completed by the method of manufacturing a light emitting device to be described with reference to FIGS. 5 to 10.

The semiconductor light emitting device 100 according to the present invention is characterized in that the side surface of the n-type semiconductor layer 120 (including the buffer layer 112 and the undoped semiconductor layer 114) is inclined downward. The angle of inclination A between the side of the layer 120 and the substrate 110 forms an angle smaller than 22 °.

As such, the side surface of the n-type semiconductor layer 120 is inclined so that the external emission efficiency of the light emitted from the active layer 140 can be maximized.

That is, the GaN constituting the n-type semiconductor layer 120 has a refractive index of about 2 and an air refractive index of about 1, so that the light B generated in the active layer 140 is totally reflected due to the difference in refractive index at the critical plane thereof. There is a problem in that it is not transmitted to the outside, but is absorbed / extinct. Referring to FIG. 4, the side surface of the n-type semiconductor layer 120 is formed to be inclined to overcome the difference in refractive index, so that light is absorbed / disappeared at the critical surface in the optical path. It can be suppressed.

The inclination angle of the side surface of the n-type semiconductor layer 120 (indicated by "A", which is an angle relationship) may be adjusted by etching conditions in an etching process, and another material, for example, SiO, may be formed on the critical surface of the n-type semiconductor layer 120. _{If two} layers (refractive index is about 1.48) are present, the inclination angle A can be adjusted based on an angle of about 20 °.

Hereinafter, the configuration and operation of the semiconductor light emitting device 100 according to the manufacturing process will be described in detail with reference to FIGS. 5 to 10.

5 is a flowchart illustrating a method of manufacturing a semiconductor light emitting device 100 according to an embodiment of the present invention, and FIG. 6 is a mask layer 300 of a method of manufacturing a semiconductor light emitting device 100 according to an embodiment of the present invention. An exemplary cross-sectional view of a form after the etch stop layer 200 is formed thereon is illustrated.

First, a material forming the mask layer 300 is formed on the substrate 110 as a single layer (S100), and an etch stop layer 200 having an open pattern at regular intervals is etched to etch the mask layer 300. (S105).

The substrate 110 may be made of an element or a compound such as sapphire, Si (silicon), SiC (silicon carbide), GaAs (gallium arsenide), ZnO (zinc oxide) or MgO (magnesium oxide), and the like. In the embodiment, a patterned sapphire substrate (PSS Patterned Sapphire Substrate) is used.

The mask layer 300 through interaction material which the growth of the GaN layer suppresses a thickness of 5μm to 15μm, for example, and can be formed using a material such as SiO _2, SiN, in the embodiment of the present invention of SiO ₂ It shall be formed of a material.

The etch stop layer 200 may be formed using a photoresist, radiation lithography techniques such as X-ray exposure technique, electron beam exposure technique, ion beam exposure technique, Dip-pen nanoexposure technique, An open pattern is formed on the photosensitive agent through an exposure process such as a nonoptical lithography technique such as a nano-imprinted exposure technique (NIL).

The photosensitive agent is subjected to a baking process (prebake, postbake) before and after the coating on the mask layer 300.

FIG. 7 is a side sectional view exemplarily illustrating a form after the groove C is formed in the mask layer 300 in the method of manufacturing the semiconductor light emitting device 100 according to the exemplary embodiment of the present invention.

Subsequently, an etching process for forming the grooves C in the mask layer 300 is processed (S110), and the etching process uses an isotropic etching technique, and the etching process is performed by combining at least one of dry etching and wet etching. Can be.

For example, dry etching or wet etching may be treated alone, or dry etching may be treated after wet etching, or wet etching may be performed after dry etching.

Dry etching includes physical methods by ion bombardment, chemical methods by reactants generated in plasma, and the like, and may be processed using, for example, an Inductively Coupled Plasma (ICP) Reactive Ion Etcher (RIE) device.

HF, BOE, etc. may be used as the buffer solution, and the etching rate may be adjusted according to the degree of dilution of the buffer solution.

Thus, by adjusting the etching conditions, for example, the amount of the etchant, the intensity and exposure time of UV (ultraviolet), the etching rate difference between Gallium-polar and Nitrogen-polar, the etching rate difference due to GaN crystallinity, etc. The slope of the side can be adjusted.

The groove C formed in the mask layer 300 is a space in which the components of the semiconductor light emitting device 100 are stacked, and the inclination of the side surfaces of the semiconductor light emitting device 100 is in accordance with the inclination of the side surfaces of the grooves C. Is determined.

Referring to FIG. 7, the completed shape of the mask layer 300 having the grooves C formed on the side surface thereof inclined upward may be confirmed on the substrate 110 in the wafer state.

Subsequently, the etch stop layer 200 is removed (S115), and each layer of the semiconductor light emitting device 100 is sequentially grown in the groove C of the mask layer 300 (S120).

The etch stop layer 200 may be removed by, for example, a dipping process. The dipping process is a process of inducing a fusion reaction of a metal material by immersing an etch stop layer in a vertical reactor into which a layer removal solution is injected. For example, removal solutions of phosphoric acid, sulfuric acid and the like heated to tens to hundreds of degrees may be used.

FIG. 8 is a side cross-sectional view illustrating a form after the epi layers 112 to 150 are formed in the groove C of the mask layer 300 in the method of manufacturing the semiconductor light emitting device 100 according to the exemplary embodiment of the present invention. to be.

First, the buffer layer 112 is formed on the substrate 110 in the groove C.

The buffer layer 112 is about 100 by injecting trimethyl gallium (TMGa) (or TEGa) (components such as trimethyl indium (TMIn), trimethyl aluminum (TMAl) can be injected together) with ammonia gas into the reaction tube. Can be grown to a thickness of ~ 2000 kPa.

The buffer layer 112 serves to relieve stress between the substrate 110 and the n-type semiconductor layer 120, such as to prevent melt-back etching due to the chemical action of the substrate 110, It may be formed of a multi-buffer layer such as an AlInN / GaN structure, an In _x Ga _1-x N / GaN structure, and an Al _x In _y Ga _1-xy N / In _x Ga _1-x N / GaN structure.

Subsequently, trimethyl gallium (eg, at a flow rate of 7 × 10 ⁵ moles per minute) is injected into the reaction tube together with hydrogen gas and ammonia gas to undo the undoped semiconductor layer (an undoped gallium nitride layer) 114 of about several nm. Grow in thickness.

An n-type semiconductor layer 120 is formed on the undoped semiconductor layer 114.

The n-type semiconductor layer 120 may be formed of a silicon doped n-GaN layer to lower the driving voltage, for example, NH ₃ (3.7 × 10 ⁻² mol / min), TMGa (1.2 × 10 ⁻⁴ mol) Per minute) and silane gas (6.3 × 10 ⁻⁹ moles / minute) containing an n-type dopant such as Si.

The cladding layer 130 is formed on the n-type semiconductor layer 120.

The cladding layer 130 is grown while changing a gas composition ratio to have a thickness of several nm to several tens of nm at a temperature between about 830 ° C and 900 ° C. For example, the clad layer 130 may be formed of a material such as aluminum gallium nitride (AlGaN).

The clad layer 130 is positioned between the active layer 140 and the n-type semiconductor layer 120 to increase carrier suppression and have a higher bandgap energy than the active layer 140.

Thereafter, an active layer 140 having a multi-quantum well (MQW) structure composed of InGaN / GaN is formed using, for example, a metal organic chemical vapor deposition (MOCVD) method.

In the active layer 140, light is generated by combining holes flowing from the p-type semiconductor layer 145 and electrons flowing from the n-type semiconductor layer 120, where a quantum well corresponds to an excitation level or energy band gap difference. Light of energy is emitted.

A p-type semiconductor layer 145 is formed on the active layer 140. The p-type semiconductor layer 145 increases the atmospheric temperature at 1000 ° C using hydrogen as a carrier gas (TM x (7 x 10 ^-6 mol / min)). , trimethyl aluminum (TMAl) (for example, 2.6 × 10 ^-5 mol / min), Bisei butyl cyclopentadienyl magnesium _{(EtCp2Mg) {Mg (C 2} H 5 C 5 H 4) 2} ( for example, 5.2 × 10 ^{- 7} mol / min), and NH ₃ (2.2 × 10 ⁻¹ mol / min).

The transparent electrode layer 150 is formed on the p-type semiconductor layer 145.

The transparent electrode layer 150 is a kind of electrode contact layer, and has a good light transmittance, and passes upwards without reflecting or absorbing light emitted from the active layer 140, and helps to diffuse current to help holes and electrons in the active layer 140. To increase the binding rate.

The transparent electrode layer 150 may be formed using a transparent conductive material such as ITO, CTO, SnO 2, ZnO, RuOx, TiOx, IrOx, GaxOx, or the like.

As such, when an epitaxial layer from the buffer layer 112 to the transparent electrode layer 150 is formed in the groove C of the mask layer 300, an etching process and an annealing process for electrode deposition are performed. (S125).

The epi layers 112 to 150 may be formed to have a height equal to or smaller than that of the mask layer 300.

Referring to FIG. 8, as the side surfaces of the grooves C are formed to be inclined, the semiconductor layers stacked therein may also have inclinations on the sides.

9 is a side cross-sectional view exemplarily illustrating a form after the electrodes 160 and 170 are deposited on the epi layer in the method of manufacturing the semiconductor light emitting device 300 according to the exemplary embodiment of the present invention.

As an etching process for electrode deposition, for example, a mesa etching technique using an etching mask and decomposition solutions such as HF, H 2 O 2, and H 2 O may be used, and the n-type semiconductor layer is formed from the transparent electrode layer 150 by mesa etching. When the region up to a portion of the 120 is removed, an n-type electrode 170 made of titanium (Ti), silver (Au), or the like is deposited on the n-type semiconductor layer 120, and nickel (Ni) is disposed on the transparent electrode layer 150. P-type electrode 160 is formed (S130).

FIG. 10 is a side sectional view exemplarily illustrating a form in which a mask layer 300 is removed and separated in units of chips in a method of manufacturing a semiconductor light emitting device 100 according to an exemplary embodiment of the present invention.

When the electrodes 160 and 170 are deposited, the mask layer 300 is removed using a fine cutting technique, an etching technique, a dipping technique (S135), and a semiconductor light emitting device having an inclination at a side surface as shown in FIG. 3. 100 remains on the substrate 110 in a wafer state.

Subsequently, the bottom surface of the substrate 110 is polished to a predetermined thickness (S140). In the polishing process, the thickness of the semiconductor light emitting device 100 in a wafer state is easily adjusted in units of chips when a force is applied from the outside. For example, a lapping process, a polishing process, or the like may be used.

When the thickness of the substrate 110 is adjusted, a scribing / separation process is performed (S145).

The scribing process is performed by using a laser irradiation apparatus, the laser is irradiated from the substrate 110 side to form a scribing region, the laser is irradiated in accordance with the position of the mask layer 300 is removed.

Then, in the separation process, when a physical force is applied from the upper or lower side of the substrate 110 is guided by the scribing region, the remaining portion of the substrate 110 is cut (broken), the semiconductor light emitting device of the wafer state May be separated by a chip (individual element) unit.

Although the present invention has been described above with reference to the embodiments, these are only examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains may have an abnormality within the scope not departing from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not illustrated. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

According to the semiconductor light emitting device according to the present invention, by adjusting the critical angle of the light projection surface, it is possible to lower the absorption rate at the critical surface of the photon proceeding from the active layer and to maximize the external photon efficiency.

According to the method of manufacturing a semiconductor light emitting device according to the present invention, since the critical angle of the light projection surface can be formed at various angles through a minimized process, it is possible to manufacture a high brightness semiconductor light emitting device with low production cost.

Claims (15)

Board; An n-type semiconductor layer formed on the substrate and having an inclined side surface; An active layer formed on the n-type semiconductor layer; And A semiconductor light emitting device comprising a p-type semiconductor layer formed on the active layer. The method of claim 1, wherein the n-type semiconductor layer The semiconductor light emitting device, characterized in that the side inclined so as to face downward. The semiconductor device of claim 2, wherein the n-type semiconductor layer And the angle formed with the substrate is inclined smaller than 22 degrees. Forming a mask layer having grooves on the side inclined upwardly on the substrate in a wafer state; Forming an epitaxial layer in the groove; Forming an n-type electrode and a p-type electrode after the epitaxial layer is etched; Removing the mask layer; And The method of manufacturing a semiconductor light emitting device comprising the step of separating the substrate in units of chips through a scribing process. The method of claim 4, wherein the mask layer is formed. Forming a material of the mask layer in a single layer; Forming an etch stop layer forming an open pattern on the single layer; Forming a mask layer in which the groove is formed through an etching process; And The method of manufacturing a semiconductor light emitting device comprising the step of removing the etch stop layer. The method of claim 4, wherein the mask layer is formed. The mask layer is a method of manufacturing a semiconductor light emitting device, characterized in that the growth of the gallium nitride layer is made of a material. The method of claim 6, wherein the mask layer is formed. The mask layer is a method of manufacturing a semiconductor light emitting device, characterized in that it comprises at least one material of SiO ₂ , SiN. The method of claim 5, wherein the etch stop layer is formed. The etch stop layer comprises a photoresist (Photo Resist) characterized in that the manufacturing method of the semiconductor light emitting device. The method of claim 4, wherein the mask layer is formed. The mask layer is a method of manufacturing a semiconductor light emitting device, characterized in that formed in a thickness of 5μm to 15μm. The method of claim 4, wherein the epi layer is formed. The epi layer is a method of manufacturing a semiconductor light emitting device, characterized in that formed in the same or less height than the mask layer. The method of claim 5, wherein the mask layer on which the groove is formed is formed. The etching process is a method of manufacturing a semiconductor light emitting device, characterized in that the combination of one or more of the etching process of dry etching and wet etching. The method of claim 4, wherein the mask layer having the groove is formed. The groove is formed by an etching process, the inclination of the side surface is a manufacturing method of a semiconductor light emitting device, characterized in that adjusted by the etching conditions. The method of claim 4, wherein After the mask layer is removed, a bottom surface of the substrate is polished. The method of claim 4, wherein the n-type electrode and the p-type electrode are formed. The epi layer is a step of etching through the mesa etching technique manufacturing method of a semiconductor light emitting device. The method of claim 4, wherein the mask layer having the groove is formed. The groove is a method of manufacturing a semiconductor light emitting device, characterized in that formed through an isotropic etching process.

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