KR20080109151A - Manufacturing method of semiconductor device - Google Patents

Abstract

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to form a sidewall oxide film and a nitride film on a silicon substrate, to form a trench by etching the silicon substrate, the sidewall oxide film and the nitride film, and to form a silicon inside the trench. Vertically growing silicon by a predetermined height so as to be connected to a substrate, and gap-filling the inside of the trench with a field oxide film to include the silicon, wherein the selective oxide film is formed inside the trench. The present invention relates to a method of fabricating a semiconductor device, comprising: growing an oxide film by a growth method (SELOX) and then forming a field oxide film through an etch back process.

In the semiconductor device manufactured according to the present invention, the field oxide film is manufactured using only the selective oxide film growth method and the etch back process without performing the conventional CMP planarization process, and the device isolation characteristic is improved by allowing device isolation without voids even in a high aspect ratio trench structure. It can be increased further.

Description

Manufacturing Method of Semiconductor Device {FABRICATION METHOD OF SEMICONDUCTOR DEVICE}

1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment of the present invention.

2 to 8 are schematic views showing a method of manufacturing a semiconductor device according to the first embodiment.

9 is a cross-sectional view illustrating a semiconductor device in accordance with a second embodiment of the present invention.

10 to 19 are schematic views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment.

20 is a cross-sectional view illustrating a semiconductor device in accordance with a third embodiment of the present invention.

21 to 29 are schematic views illustrating a method of manufacturing a semiconductor device in accordance with a third embodiment.

The present invention relates to a method of fabricating a semiconductor device, and more particularly, to fabricate a field oxide film using a selective oxide film growth method and an etch back process without performing a conventional CMP planarization process, and to separate devices without generating voids even in a high aspect ratio trench structure. The present invention relates to a method for manufacturing a semiconductor device that can further increase the device isolation characteristics.

In order to realize high integration of the semiconductor device, it is necessary to form various semiconductor elements constituting the semiconductor device, for example, transistors, capacitors, and various wirings in a very narrow area. Therefore, since the distance between each component which comprises a semiconductor device is narrow, it is necessary to further strengthen the insulation between each component.

As a means for electrically separating semiconductor elements constituting a conventional semiconductor device, a LOCOS type field oxide film formed by locally oxidizing a silicon substrate has been widely used.

However, the locus-type field oxide film interferes with high integration of the semiconductor device because the locus-type field oxide partially invades the active region where the semiconductor devices are formed due to a bird's beak generated in the formation process.

Therefore, a field oxide film having a small area and excellent insulation at the same time was required. A typical example thereof is a trench field oxide film, in particular, a shallow trench isolation (STI) is widely used.

STI is a technique for forming a device isolation film by forming a trench defining an active region in a semiconductor substrate, and filling the inside of the trench (STI trench) with an insulating material. However, in the case of STI having a CD (Critical Dimension) of 0.25 μm or less due to the high integration of semiconductor devices, gap filling in which the STI oxide is embedded in the trench is not easy.

Therefore, research on the material and manufacturing method of the field oxide film for the gap filling of the STI is in progress.

Conventional field oxide film is chemical mechanical polishing (hereinafter referred to as 'CMP') after embedding slurry for insulating films such as tetraethly orthosilicate (TEOS), boro-phospho-silicate-glass (BPSG) and thermal oxide film in the trench. It is prepared by performing a planarization process using the process.

However, in this method, when the width of the trench is formed to be small due to high integration, the inlet of the trench is narrow so that the slurry is not faithfully embedded in the trench.

To solve these problems, a spin-on-glass (SOG) film has been proposed. The SOG is laminated on the substrate by a coating method, and thus has a liquid or sol state for the first time, so that a gap fill property is good and the step may be reduced.

Such a method may have a high step coverage as it is applied in a liquid or sol state, but a problem arises in that the field oxide film is porous due to a hydrogen component generated during heat treatment in a subsequent process. Moreover, when performing etching and cleaning for patterning in the porous state in which these residual components are present, the porosity was accompanied with a problem that the amount of etching rapidly increased compared with other regions.

Therefore, gap filling method has been proposed using low-pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD) using TEOS and BPSG.However, due to high integration, HDPCVD (High) -density plasma chemical vapor deposition has been proposed. However, even when the field oxide film is formed using these methods, a problem occurs in that voids are formed in the trench.

In addition, in the case of the CMP planarization process performed for planarization, a basic slurry such as silicon dioxide, cesium dioxide (Cs0 ₂ ), alumina (Al ₂ O ₃ ), and manganese (Mn ₂ O ₃ ) is used as a slurry material. However, there is a problem that the process is not only cumbersome to etch the oxide film using these but also a long polishing time due to a long polishing time.

As described above, only a change in the material of the field oxide film or a change in the manufacturing process remained a problem when gap filling the STI.

On the other hand, as described above, a study has been conducted to facilitate device isolation by changing the trench structure itself rather than the material or process of the field oxide film.

Korean Patent Laid-Open Publication No. 2006-0078264 refers to a semiconductor device that forms a silicon epitaxy layer to form trenches having dimensions smaller than those of the photoresist pattern by the photolithography process. That is, since the formation of the silicon epitaxy layer means the retreat of the pad nitride film and the pad oxide film relatively, the effect of widening the trench inlet is obtained, thereby facilitating the filling of the STI oxide, and thus enabling chemical vapor deposition in the upper region of the trench. It is disclosed that the generation of voids due to the overhang of the oxide film due to

Okuno et al. Deposit an insulating material by HDPCVD (High Density Plasma Chemical Vapor Deposition) inside the STI trench. As the aspect ratio of the trench increases, the insulating material does not fill the trench sufficiently and voids occur. It is proposed to fill the trench with polysilazane based inorganic Spin-On-Glass (P-SOG) (IEEE, 0-7803-9269-8, 2005). In this case, however, high temperatures are required in subsequent processes and are not used because they are of lower quality than silicon oxide.

In addition, Korean Patent Laid-Open Publication No. 2006-119151 proposes an STI structure in which a lower trench is connected by an isotropic dry etching method after forming an upper trench. In order to prevent current leakage in the lower part of the trench generated in the existing STI process, the patent etches the lower part one more time and oxidizes the lower part so that the lower part is not sharp, thereby improving the device characteristics. Although voids are formed at the bottom, it is not a problem because the voids are completely surrounded by oxide film.

Accordingly, there is a need for a separator of a new STI structure in which voids do not occur when gap filling and a gap filling method that can be easily applied to such an STI structure.

In order to solve the above problem, an object of the present invention is to facilitate gap filling even in a high aspect ratio trench structure, to simplify the process by eliminating the need for CMP planarization process, and to eliminate device voids. It is to provide a method for manufacturing an enhanced semiconductor device.

In order to achieve the above object, the present invention

Forming a sidewall oxide film and a nitride film on the silicon substrate,

Etching the silicon substrate, the sidewall oxide film, and the nitride film to form a trench,

Vertically grow silicon by a predetermined height by a selective epitaxial growth method so as to be connected to the silicon substrate inside the trench,

In the manufacturing of a semiconductor device comprising the step of gap filling the inside of the trench with a field oxide film to include the silicon,

A method of manufacturing a semiconductor device includes forming a field oxide film through an etch back process after growing an oxide film through a selective oxide film growth method (SELOX) in the trench.

The selective oxide film growth method is an in-situ at 600 to 900 ℃ flowing ozone, TEOS (Tetra Ortho Silicate) gas, N ₂ , PH ₃ , BCl ₃ and combinations thereof to the insulating material inside the trench After the silver deposition, the step of heat treatment.

In this case, the deposition is performed by one method selected from the group consisting of CVD (Chemical Vapor Deposition), PECVD (Plasma Enhanced CVD), and High Density Plasma Chemical Vapor Deposition process (HDP CVD process).

The field oxide film is a silicon oxide film or a silicate glass film, and the silicate glass film is an ozone activated tetraethly orthosilicate (TEOS) film, an ozone tetraethly orthosilicate-phospho-silicate-glass film, or an ozone TEOS- according to a combination of the gases. And form one selected from the group consisting of tetraethly orthosilicate-boro-phospho-silicate-glass (BPSG) membranes, and combinations thereof.

The heat treatment is a high temperature oxidation at a temperature of 300 to 900 ℃ under an oxidizing atmosphere injecting oxygen or air containing oxygen.

The etch back process is performed until the nitride film is exposed, and a wet etching method or a dry etching method is used.

In this case, the semiconductor device is formed of silicon in the form of a bulk or a nanowire in whole or in part in the trench.

Hereinafter, the present invention will be described in more detail.

As used herein, the term “oxide film” refers to a silicon oxide film (SiO ₂ ), and the term “nitride film” refers to a silicon nitride film (SiN).

The semiconductor device according to the present invention has a structure in which the structure of the trench is in the form of a vertical profile having the same width of the upper and lower portions of the trench. The semiconductor device forms silicon inside the trench, which not only separates a high aspect ratio trench without generating voids, but also further improves device isolation characteristics.

In the semiconductor device having such a structure, the field oxide film is manufactured through a CMP planarization process after filling an insulating material to gap fill the inside of the trench. However, this method has a problem of a complicated process and a long polishing time.

Therefore, in the present invention, by performing the selective oxide film growth method and the etch back process without performing the CMP planarization process in the field oxide film manufacturing as in the prior art, it is possible to fill the inside of the trench without gaps in the high aspect ratio trench structure, thereby further improving device isolation characteristics. Rather, the CMP planarization process is unnecessary, which simplifies the process itself.

Specifically, the semiconductor device according to the present invention

Forming a sidewall oxide film and a nitride film on the silicon substrate,

Etching the silicon substrate, the sidewall oxide film, and the nitride film to form a trench,

Vertically grow silicon by a predetermined height by a selective epitaxial growth method so as to be connected to the silicon substrate inside the trench,

Gap filling the trench interior with a field oxide layer to contain the silicon,

In particular, in order to manufacture a field oxide film for gap filling the inside of the trench, an oxide film is grown by a selective oxide film growth method, followed by an etch back process.

The production method is described in more detail as follows.

First, sidewall oxide films and nitride films are formed on a silicon substrate. The materials and manufacturing methods thereof are not limited to the present invention and are well known.

The sidewall oxide film is formed to cover the inner wall of the trench, and serves to buffer the stress of the nitride film generated in the deposition and thermal processes of the nitride film affecting the silicon substrate. The sidewall oxide film may be manufactured by a known method, and for example, may be formed to a thickness of 10 to 100 kPa by performing a thermal oxidation process in an oxygen atmosphere of 900 to 1100 ° C.

The nitride film (also referred to as 'STI Liner') is located on the sidewall oxide film and is formed in the trench. As the nitride film is formed, the oxide film may be selectively grown only in a portion in contact with silicon in a subsequent selective oxide film growth process. That is, during the selective oxide growth process on the nitride film and silicon, the oxide film grows at a growth rate of 1: 4. At this time, since the oxide film hardly grows on the nitride film, a separate CMP process is not required.

Such a nitride film is referred to as dichlorosilane (hereinafter referred to as 'DCS'), a low pressure chemical vapor deposition (LPCVD) method using a silane (SiH ₂ Cl ₂ ) and an amine (NH ₃ ) gas, or a silane (SiH ₄ ) or an amine gas. Plasma-enhanced CVD (PECVD) used as a source is used to form a thickness of 500 to 1000 mW from the sidewall oxide film.

In this case, in addition to the sidewall oxide film and the nitride film, a separate nitride film and an oxide film are further provided according to the form of silicon formed in the trench.

The silicon substrate, the sidewall oxide film, and the nitride film are etched from a predetermined region to expose the silicon substrate to the outside.

The etching process is a gas selected from the group consisting of HBr, SiF ₄ , CF ₄ , HeO ₂ , Cl ₂ , SF ₆ and combinations thereof for 10 to 60 seconds at a pressure of 5 to 100 mT. These conditions are merely examples and may be variously changed according to the type, size, and other ambient conditions of the device to be formed.

Next, silicon is vertically grown by a predetermined height by a selective epitaxial growth method so as to be connected to the silicon substrate inside the trench.

Selective Epitaxial Growth (SEG) is selected from the group consisting of DCS, Trichlorosilane (TCS), silane, HCl and combinations thereof in-situ at 600 to 900 ° C. When one kind of reaction gas is flowed at a rate of 50 to 200 sccm, silicon grows vertically along the crystal direction of silicon from the silicon substrate.

At this time, silicon is formed in whole or in part in the trench, or silicon in bulk or nanowire form, depending on the process conditions of the SEG, the number or shape of the insulating films formed in the trench, or the like.

Next, the gap is filled with a field oxide layer in the trench to include the silicon.

In particular, the present invention performs an etch back process after the oxide film is grown by a selective oxide film growth method to prepare a field oxide film for gap filling the trench.

Selective oxide deposition (hereinafter, referred to as 'SELOX') forms an oxide film gap-filling the trench by injecting a source gas through a deposition method. The oxide film is formed on the silicon and nitride film inside the trench, where a doped oxide film with good flow rate is selectively generated on the silicon and nitride film at a growth rate of 4: 1.

In the SELOX process, ozone, TEOS gas, N ₂ , PH ₃ , BCl _3, and a combination thereof are flowed in-situ at 600 to 900 ° C. to deposit an insulating material in the trench, and then heat treatment. Steps.

The material of the field oxide film to be finally formed varies depending on the combination of the gases. Specifically, the field oxide film may be an Ozone activated TEOS (tetraethly orthosilicate) film, an Ozone TEOS-PSG (tetraethly orthosilicate-phospho-silicate-glass) film, an Ozone TEOS-BPSG (tetraethly orthosilicate-boro-phospho-silicate-glass) film, And a combination selected from the group consisting of these.

In this case, the deposition is performed by one method selected from the group consisting of CVD (Chemical Vapor Deposition), PECVD (Plasma Enhanced CVD), and High Density Plasma Chemical Vapor Deposition process (HDP CVD process).

The oxide film formed by the deposition is formed on the silicon top and the nitride film inside the trench. This oxide film is porous and performs a densification process in which heat treatment is performed in the presence of oxygen to remove such pores. Preferably, the heat treatment is a high temperature oxidation at a temperature of 600 to 900 ℃ under an oxidizing atmosphere injecting oxygen or air containing oxygen.

The densification process removes the pores between the oxide film and oxidizes the silicon grown portion, and simultaneously moves the doping atoms formed in the oxide film into the silicon inside the trench. As a result, the silicon exhibits the effect of MSE (Metallic Shield Embedded) to reduce the leakage current when driving the semiconductor device.

Since the oxide film gap-filled in the trench by the SELOX process exists not only in the trench but also on the nitride film, an etch back process is performed to selectively remove only the oxide film formed on the nitride film to form a field oxide film.

The etch back process is performed using an etching solution having a selectivity only to the oxide film, and is performed using a wet etching method or a dry etching method. The etchant is not particularly limited in the present invention, it is possible to use an etchant for the nitride film as known. In this case, the specific processes of the wet etching method and the dry etching method are not particularly mentioned in the present invention, and are well known.

As such, when the oxide film is formed inside the trench by the SELOX process, only the oxide film on the nitride film is simply removed through a subsequent etch back process, thereby eliminating the need for a conventional CMP planarization process, thereby simplifying a process of manufacturing a separator of a semiconductor device. . In addition, the high aspect ratio trench structure can fill the trench without gaps, further enhancing device isolation.

Hereinafter, the semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment of the present invention.

Referring to FIG. 1, the semiconductor device according to the first embodiment is

A silicon substrate 1 having trenches for device isolation;

Sidewall oxide films 3 formed in trenches of the silicon substrate 1;

A nitride film 5 formed on the sidewall oxide film 3;

Silicon 7 grown in contact with the nitride film 5 and connected to the silicon substrate 1 so as to be buried in the trench; And

And a field oxide layer 9 formed to gap fill the trench except for the silicon 7 formation region.

The semiconductor device having such a structure forms a trench in a vertical profile shape in which upper and lower widths are equally formed, and silicon 7 is formed inside the trench to effectively separate the device without generating voids and to manufacture the same. It is also very simple, and the cost etc. are reduced.

The semiconductor device of such a structure

(S1) sequentially forming a pad oxide film and a pad nitride film on the silicon substrate and then etching to form a trench;

(S2) forming a sidewall oxide film on the inner wall of the trench by a thermal oxidation process;

(S3) depositing a nitride film on the sidewall oxide film;

(S4) etching a predetermined region of the sidewall oxide film and the nitride film in the trench lower region to expose a silicon substrate;

(S5) vertically growing silicon from the exposed silicon substrate by a selective epitaxial growth method (SEG); And

(S6) forming a field oxide layer by gap filling the inside of the trench except for the region where the silicon is formed with an insulating material and then etching the gap.

In particular, in the present invention, the field oxide film is manufactured through the SELOX process and the etch back process as described above, so that the conventional CMP planarization process is unnecessary, thereby simplifying the process and effectively gap filling the high aspect ratio trench.

Each step will be described in more detail below.

2 to 8 are schematic views showing a method of manufacturing a semiconductor device according to the first embodiment.

Referring to FIG. 2, after the pad oxide film 2 and the pad nitride film 4 are sequentially formed on the silicon substrate 1, predetermined regions of the pad oxide film 2 and the pad nitride film 4 are formed by a photolithography process. Etching to form a trench in the vertical profile form the same width of the upper, lower portions in the silicon substrate (1) (S1).

The etching is preferably a photolithography process. For example, after forming a photoresist film (not shown) on the pad nitride film 4, the pad nitride film 4 and the pad oxide film 2 are etched using the mask as a mask. The photoresist pattern is removed to etch the surface exposed portion of the silicon substrate 1 by a predetermined thickness to form a trench.

In this case, the pad oxide film 2 serves to buffer the stress generated in the deposition and thermal processes of the pad nitride film 4 from affecting the silicon substrate 1. The pad oxide film 2 is formed to a thickness of 50 to 200 kPa from the top of the etched layer by a dry or wet oxidation method using O ₂ or H ₂ O gas as a source.

The pad nitride film 4 is used as a stop layer to selectively prevent the oxide film from growing when gap filling the oxide film in a subsequent process. The pad nitride film 4 is formed to a thickness of 500 to 1000 kPa from the top of the pad oxide film 2 by using an LPCVD method using DCS and an amine (NH ₃ ) gas or a PECVD using silane or amine gas as a source.

At this time, if necessary, a rounding is performed by hydrogen heat treatment as shown in FIG. 3.

The rounding is performed by hydrogen heat treatment at 800 to 1000 ° C. for 30 to 180 seconds to round the corners of the trench. This rounding is due to the change of the lattice of the surface into a new crystal structure due to the movement of the silicon lattice when the silicon lattice on the trench surface is rapidly heat-treated in the hydrogen atmosphere.

Referring to FIG. 4, the sidewall oxide film 3 is thinly formed on the inner wall of the trench by a thermal oxidation process (S2).

The thermal oxidation is performed in an oxygen atmosphere of 900 to 1100 ° C. to form sidewall oxide films 3 of 10 to 100 kPa.

The formed sidewall oxide film 3 reduces the interface trap charge at the interface between the sidewall and the subsequent buried field oxide film 7 and allows rounds to be formed in the top / bottom profile.

The side wall oxide film 3 is preferably formed to a thickness of 10 to 100 Å from the upper side wall.

Referring to FIG. 5, a nitride film 5 is deposited on the sidewall oxide film 3 with an STI liner at a thickness of 10 to 100 μs (S3).

Referring to FIG. 6, predetermined regions of the sidewall oxide layer 3 and the nitride layer 5 in the lower region of the trench are etched to expose the silicon substrate 1 (S4).

Even if only a portion of the silicon substrate 1 is exposed, since the nitride film 5 on the active region on both sides of the trench is very thick, the upper nitride film 5 still remains even when the bottom is exposed.

Referring to FIG. 7, silicon 7 is vertically grown from the exposed silicon substrate 1 by the SEG method (S5).

At this time, the SEG gradually grows the silicon 7 from the exposed silicon substrate 1, and the silicon 7 grows vertically while filling the entire trench.

Referring to FIG. 8, gap fills are formed in the trench except for the region in which the silicon 7 is formed with a field oxide layer (S7).

At this time, the gap filling is performed through the SELOX process and the etch back process as described above to manufacture the semiconductor device according to the first embodiment shown in FIG.

As described above, when silicon is grown and formed in a trench having a vertical profile, silicon may be formed in the entire trench in a bulk form as shown in FIG. 1, or only a partial region of the trench may be formed.

9 is a cross-sectional view illustrating a semiconductor device in accordance with a second embodiment of the present invention.

9, a semiconductor device according to a second embodiment of the present invention

A silicon substrate 10 in which trenches for device isolation are formed;

A sidewall oxide film 11 formed in the trench of the silicon substrate 10;

A nitride film 13 formed on the sidewall oxide film 11;

An oxide film 15 formed on the nitride film 13;

Silicon 17 in contact with the oxide layer 15 and vertically grown by being connected to the silicon substrate 10 in the trench;

Silicon oxide (19) formed in the trench surrounding the silicon (15); And

And a field oxide layer 21 formed to gap fill the trench except for the silicon 15 and silicon oxide 19 forming regions.

The semiconductor device having the above-described structure may also form a trench having a vertical profile in which upper and lower widths are the same, and silicon may be formed inside the trench to effectively separate the device without generating voids.

The semiconductor device according to the second embodiment

(SS1) sequentially forming a pad oxide film and a pad nitride film on the silicon substrate and then etching to form a trench;

(SS2) forming a sidewall oxide film on the inner wall of the trench by a thermal oxidation process;

(SS3) depositing a nitride film on the sidewall oxide film;

(SS4) depositing an oxide film on the nitride film;

(SS5) depositing a second nitride film on the oxide film;

(SS6) etching the predetermined regions of the sidewall oxide film, the nitride film, the oxide film and the second nitride film in the trench lower region to expose a silicon substrate;

(SS7) vertically growing silicon from the exposed silicon substrate by a selective epitaxial growth method (SEG);

(SS8) selectively etching to remove the second nitride film in contact with the silicon;

(SS9) filling the inside of the trench with silicon oxide by a thermal oxidation process to surround the vertically grown silicon; And

(S10) It is manufactured by gap filling the inside of the trench except for the region formed of the silicon and silicon oxide with a field oxide film.

In particular, in the present invention, the field oxide film is manufactured through the SELOX process and the etch back process as described above, so that the conventional CMP planarization process is unnecessary, thereby simplifying the process and effectively gap filling the high aspect ratio trench.

10 to 19 are schematic views illustrating a method of manufacturing a semiconductor device in accordance with a second embodiment. At this time, the steps of (SS1) to (SS3) and (SS10) are as mentioned in the first embodiment.

Referring to FIG. 10, the pad oxide layer 12 and the pad nitride layer 14 are sequentially formed on the silicon substrate 10 and then etched to form trenches (SS1).

Referring to FIG. 11, a sidewall oxide film 11 is formed on the inner wall of the trench by a thermal oxidation process (SS2).

Referring to FIG. 12, a nitride film 13 is deposited on the sidewall oxide film 11 (SS3).

Referring to FIG. 13, an oxide film 15 is deposited on the nitride film 13 (SS4).

The oxide film 15 is formed to relieve stress generated at the interface between the nitride film 13 and the field oxide film 21 serving as a stop layer before the process of forming the field oxide film 21 for subsequent gap filling. do.

The oxide film 15 may be formed of an HDP oxide film formed by a CVD method, or an SOG-based oxide film such as a TEOS film or a USG film formed by a PECVD method. The oxide film is formed to a thickness of 50 to 300 kPa by a dry or wet method using O ₂ or H ₂ O gas.

Referring to FIG. 14, a second nitride film 16 is deposited on the oxide film 15 (SS5).

The second nitride layer 16 has silicon (17 in FIG. 9) grown therein, and is later removed by etching to provide a predetermined space for forming silicon oxide (19 in FIG. 9). In addition, the second nitride layer 16 protects the surface of silicon (17 in FIG. 9) during the hydrogen bake process performed before the SEG process in a subsequent process.

The second nitride film 16 is formed on the oxide film 15 to have a thickness of 30 to 100 kPa using a conventional deposition method.

Referring to FIG. 15, the silicon substrate 10 is exposed by etching predetermined regions of the sidewall oxide film 11, the nitride film 13, the oxide film 15, and the second nitride film 16 in the lower trench region (SS6). ).

The etching follows the method described in the first embodiment, wherein the width of the exposed silicon substrate 10 is 50 to 500 kW.

Referring to FIG. 16, silicon is vertically grown from the exposed silicon substrate 10 using the SEG method (SS7).

The SEG follows the method as mentioned in the first embodiment. However, as shown in Fig. 16, the silicon 17 need not be grown to the end of the trench. This makes it easier for the process to grow the silicon 17 only to the aspect ratio region achievable in the current technology using SEG, while performing gap filling on the remaining regions.

In addition, the hydrogen baking process is performed at 800 to 900 ° C. for 1 to 3 minutes to remove the oxide film of the silicon substrate 10 before the SEG.

The hydrogen baking process has an effect of reducing the defect between the epitaxially grown silicon 17 and the adjacent interface during the selective epitaxial growth process to vertically grow the silicon 17.

Referring to FIG. 17, the second nitride film 16 in contact with the silicon 17 is selectively etched and removed (SS8).

The removal of the second nitride layer 16 uses phosphoric acid (H ₃ PO ₄ ) as an etchant, and in this case, the removal of the second nitride layer 16 is selectively performed because the etching ratio of the phosphoric acid is 20 to 30 times larger than that of the oxide layer. It is possible.

The second nitride film 16 is formed to make a space for isolation, which is the original purpose. That is, the space in which the second nitride layer 16 is removed by etching is filled with silicon oxide (19 in FIG. 9), which is an oxide, due to a subsequent oxidation process.

Referring to FIG. 18, the trench is filled with silicon oxide 19 by a thermal oxidation process to surround the grown silicon 17 (SS9).

The thermal oxidation is performed by performing an oxidation process at 700 to 1000 ° C. for 30 to 90 minutes, and the thermal oxidation time is maintained until the silicon oxide 19 fills the trench.

Referring to FIG. 19, gaps of trenches other than regions formed of the silicon 17 and the silicon oxide 19 are gap-filled with the field oxide layer 21 (SS10).

The field oxide film is manufactured by performing an etch back process after the SELOX process as mentioned in the first embodiment. As a result, the conventional CMP planarization process is unnecessary, which not only simplifies the process but also effectively fills gaps even for high aspect ratio trenches, thereby further increasing separation characteristics of the semiconductor device.

Like the first and second embodiments described above, the semiconductor device of the present invention can vertically grow silicon in a bulk form from a silicon substrate in a trench formed for device isolation, and the silicon is formed in the entire trench. Or in some areas.

In addition to the bulk shape, the semiconductor device according to the present invention may be manufactured by vertically growing nanowire-shaped silicon inside the trench.

20 is a cross-sectional view illustrating a semiconductor device in accordance with a third embodiment of the present invention.

Referring to FIG. 20, the semiconductor device according to the third embodiment may be

A silicon substrate 50 in which trenches for device isolation are formed;

A sidewall oxide film 51 formed in the trench of the silicon substrate 50;

A nitride film 53 formed on the sidewall oxide film 51;

Silicon nanowires 55 vertically grown on the nitride film 53 from the silicon substrate 50 so as to be in contact with the nitride film 53 and embedded in the trench; And

A field oxide layer 57 is formed to gap fill the trench by including the silicon nanowires 55.

The semiconductor device according to the third embodiment may be applied to the nanoscale semiconductor device by vertically growing silicon nanowires in the trench to enable effective device isolation without generating voids in the trench.

The semiconductor device according to the third embodiment

(SSS1) sequentially forming a pad oxide film and a pad nitride film on the silicon substrate and then etching to form a trench;

(SSS2) forming a sidewall oxide film on the inner wall of the trench by a thermal oxidation process;

(SSS3) depositing a nitride film on the sidewall oxide film;

(SSS4) depositing a metal film on the nitride film of the lower trench region;

(SSS5) converting the metal film into metal particles through heat treatment;

(SSS6) vertical growth of silicon nanowires using the metal particles as a catalyst;

(SSS7) removing the metal particles present at the tip of the silicon nanowires through a planarization process; And

(SSS8) is manufactured by gap filling the inside of the trench with a field oxide film to surround the vertically grown silicon nanowires.

In particular, in the present invention, the field oxide film is manufactured through the SELOX process and the etch back process as described above, so that the conventional CMP planarization process is unnecessary, thereby simplifying the process and effectively gap filling the high aspect ratio trench.

21 to 29 are schematic views illustrating a method of manufacturing a semiconductor device in accordance with a third embodiment. At this time, the steps of (SSS1) to (SSS3) are as described in the first embodiment.

Referring to FIG. 21, the pad oxide layer 52 and the pad nitride layer 54 are sequentially formed on the silicon substrate 50 and then etched to form trenches (SSS1).

Referring to FIG. 22, a sidewall oxide film 51 is formed on the inner wall of the trench by a thermal oxidation process (SSS2).

Referring to FIG. 23, a nitride film 53 is deposited on the sidewall oxide film 51 (SSS3).

Referring to FIG. 24, a metal film 56 is deposited on the nitride film 53 in the lower trench region (SSS4).

The metal film 56 may be performed using a conventional deposition method, and may be PVD, CVD, electro deposition, electroless deposition, and the like, and preferably, a PVD method is used. .

The metal film 56 serves as a catalyst for the silicon nanowires (55 in FIG. 20) in a subsequent process, and when the metal film 56 is formed on the inner wall of the trench, vertical growth of the silicon nanowires 55 is difficult. Become. Accordingly, when the metal film 56 is deposited using high linearity of the PVD, the metal film 56 may be selectively deposited only in the lower region of the trench.

The material of the metal film 56 may be any metal material known as a catalyst of the silicon nanowire 55. For example, Au, Ni, Al, Co, Ti, Pt, Fe, Ta, or a combination thereof may be used. It is formed using one selected from the group consisting of.

Referring to FIG. 25, the metal film 56 is converted into the metal particles 58 through heat treatment (SSS5).

When the metal film 56 is heat-treated under specific conditions, the metal film 56 is converted into a particle or droplet form having a uniform size. This phenomenon is called Rayleigh Instability.

26 is a schematic diagram showing a Rayleigh Instability phenomenon. Referring to FIG. 26, it is shown that the metal film 56 in (a) is converted into the metal particles 58 as in (b) through heat treatment.

In the present invention, the metal film 56 is heat-treated at 300 to 700 ° C, preferably 400 to 600 ° C to be converted into metal particles 58 through Rayleigh Instability.

Next, referring to FIG. 27, the silicon nanowires 55 are vertically grown using the metal particles 58 as catalysts (SSS6).

The silicon nanowires 55 are 50-400 sccm of the reaction gas in-situ in an H ₂ atmosphere of 500 to 900 ° C., preferably 600 to 900 ° C., using CVD equipment. Grow by growing at a rate of 50 to 200 sccm. The reaction gas may be one selected from the group consisting of DCS, TCS, silane, HCl, and a combination thereof. At this time, the temperature, the flow rate of the gas, the time and the like depends on the type of the metal catalyst.

At this time, since the silicon nanowires 55 should be removed in a subsequent process, the metal particles 58 used as a catalyst are preferably formed to be equal to or slightly higher than the height of the trench.

Referring to FIG. 28, the metal particles 58 existing at the tip of the silicon nanowire 55 are removed through a planarization process (SS7).

Referring to FIG. 29, the semiconductor device of the third exemplary embodiment illustrated in FIG. 20 is manufactured by gap filling (SSS8) the field inside of the trench with the field oxide layer 57 so as to surround the vertically grown silicon nanowires 55.

In particular, in the present invention, the field oxide film is manufactured through the SELOX process and the etch back process as described above, so that the conventional CMP planarization process is unnecessary, thereby simplifying the process and effectively gap filling the high aspect ratio trench to effectively isolate the semiconductor device. Improve.

As described above, the semiconductor device according to the present invention is manufactured in the form of a vertical profile in which the structure of the trench has the same width on the trench as in the prior art, and the silicon is perpendicular to the trench by using the selective epitaxial growth method. By growing the oxide film selectively on the silicon using the selective oxide film growth method, the etch back process is performed to isolate the high aspect ratio trench without voiding and simplify the process without performing the CMP planarization process as in the prior art. In addition, the device isolation characteristics are further improved.

Claims (10)

Forming a sidewall oxide film and a nitride film on the silicon substrate, Etching the silicon substrate, the sidewall oxide film, and the nitride film to form a trench, Vertically grow silicon by a predetermined height by a selective epitaxial growth method so as to be connected to the silicon substrate inside the trench, In the manufacturing of a semiconductor device comprising the step of gap filling the inside of the trench with a field oxide film to include the silicon, And forming a field oxide film through an etch back process after growing an oxide film through the selective oxide film growth method (SELOX) in the trench. The method of claim 1, The selective oxide film growth method is an in-situ at 600 to 900 ℃ flowing ozone, TEOS (Tetra Ortho Silicate) gas, N ₂ , PH ₃ , BCl ₃ and combinations thereof to the insulating material inside the trench After the silver deposition, the method of manufacturing a semiconductor device comprising the step of heat treatment. The method of claim 2, The deposition is performed by one method selected from the group consisting of Chemical Vapor Deposition (CVD), Plasma Enhanced CVD (PECVD), and High Density Plasma Chemical Vapor Deposition process. Manufacturing method. The method of claim 2, The field oxide film may be an ozone activated tetraethly orthosilicate (TEOS) film, an ozone tetraethly orthosilicate-phospho-silicate-glass film, an ozone tetraethly orthosilicate-boro-phospho-silicate-glass film, or Ozone TEOS-BPSG. The method of manufacturing a semiconductor device which is one selected from the group consisting of a combination. The method of claim 2, The heat treatment is a method of manufacturing a semiconductor device is carried out at a temperature of 300 to 900 ℃ under an oxidizing atmosphere injecting oxygen or air containing oxygen. The method of claim 1, The etch back process is performed until the nitride film is exposed. The method of claim 1, The etch back process is a method of manufacturing a semiconductor device that is performed by a wet etching method or a dry etching method. The method of claim 1, The semiconductor device A silicon substrate having a trench for device isolation; A sidewall oxide film formed in the trench of the silicon substrate; A nitride film formed on the sidewall oxide film; Silicon grown in contact with the nitride film and connected to a silicon substrate so as to be buried in a trench; And And a field oxide layer formed to gap fill the trench except for the silicon formation region. The method of claim 1, The semiconductor device A silicon substrate having a trench for device isolation; A sidewall oxide film formed in the trench of the silicon substrate; A nitride film formed on the sidewall oxide film; An oxide film formed on the nitride film; Silicon grown in contact with the oxide layer and vertically connected to a silicon substrate in a trench; Silicon oxide formed in the trench surrounding the silicon; And And a field oxide layer formed to gap fill the trench except for the silicon and silicon oxide formation regions. The method of claim 1, The semiconductor device A silicon substrate having a trench for device isolation; A sidewall oxide film formed in the trench of the silicon substrate; A nitride film formed on the sidewall oxide film; Silicon nanowires vertically grown on the nitride film from the silicon substrate so as to be in contact with the nitride film and embedded in the trench; And A method of manufacturing a semiconductor device comprising a field oxide layer formed to gap fill the vertically grown silicon nanowires.

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