KR20080064603A - Read path circuit for burn-in test and burn-in test method - Google Patents

Abstract

A read path circuit for a burn-in test and a burn-in test method are provided to satisfy a request to disable the read path circuit of a semiconductor memory device when a burn-in signal is applied. According to a read path circuit, read data outputted in response to a read command applied from the outside of a semiconductor memory device is transmitted. The read path circuit comprises a multiplexer control part(210), a multiplexer(220) controlled by the multiplexer control part and a DQ driver(230). The DQ driver is connected to the back of the multiplexer, and outputs the read data to the outside of the semiconductor memory device finally. When a burn-in signal is applied in a test mode of the semiconductor memory device, the read data output of the read path circuit is disabled.

Description

Read path circuit for burn-in test and burn-in test method

BRIEF DESCRIPTION OF THE DRAWINGS In order to more fully understand the drawings recited in the detailed description of the invention, a brief description of each drawing is provided.

1 is a diagram illustrating a conventional burn-in test.

2 is a view illustrating a part of a read path circuit of a semiconductor memory device according to the present invention.

3 is a flow chart of a burn-in test method for a semiconductor memory device according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device, and more particularly, to a read pass circuit of a semiconductor memory device for burn-in test and a burn-in test method thereof.

The burn-in test is a test that stresses the semiconductor memory device by applying a high level voltage to the input / output terminals of the semiconductor memory device at a temperature higher than room temperature as part of the reliability test.

Burn-in tests include a wafer burn-in test performed before packaging and a package burn-in test performed after packaging. This burn-in test can check the lifespan and initial failure of the semiconductor memory device.

A semiconductor memory device in which an integrated circuit is to be subjected to a burn-in test is formed of a semiconductor package through an assembly process. Since semiconductor packages are most likely to fail within 1000 hours, they are isolated by burn-in tests.

1 is a diagram illustrating a conventional burn-in test.

The burn-in test 100 is simultaneously performed on a plurality of semiconductor memory devices 112, 114, 116... In a burn-in condition of high temperature / voltage. The test device 120 and the semiconductor memory devices 112, 114, 116... Are connected to the power line PL and the data line DQ. However, address lines, control lines, and the like required for the test are not shown in FIG. 1 for the sake of simplicity.

The burn-in test 100 includes a write stress test and a read stress test.

In general, the write stress test is performed by connecting the plurality of semiconductor memory devices 112, 114,... To the test device 120, in particular, using a parallel bit test by one (PBTX1) mode. The PBTX1 (Parallel bit test by one) mode performs an exclusive OR operation on each cell data in the semiconductor memory device and finally determines whether the cells are defective through one bit data. Mode.

After the light stress test, a lead stress test is performed, and at this time, the test device 120 should be replaced. Because the data line DQ is connected at the time of performing the write stress test, when the read stress test is performed directly on the same test apparatus 120, a short path occurs when the read data has the opposite data. do. When a short pass occurs, excessive current flows, and thus a limit occurs in a current supply capability of the test apparatus 120.

 Therefore, during the burn-in test, it may be considered to disable the read path circuit, which is a path through which read data of the semiconductor memory device proceeds. When the read pass circuit is disabled, since the read data is not output, the write stress test and the read stress test can be performed in the same test apparatus 120.

SUMMARY OF THE INVENTION The present invention provides a read path circuit of a semiconductor memory device capable of meeting a request for disabling the read path circuit of the semiconductor memory device upon application of a burn-in signal. Is in.

Another object of the present invention is to provide a burn-in test method for a semiconductor memory device having the read path circuit.

A read path circuit of a semiconductor memory device according to an embodiment of the present invention for achieving the technical problem is a multiplexer controller; A multiplexer controlled by the multiplexer controller; And a DQ driver connected to a rear end of a multiplexer to finally output the read data to the outside of the semiconductor memory device. When a burn-in signal is applied, read data of a read pass circuit. Characterized in that the output is disabled (Disable).

The decu driver may be disabled when the burn-in signal is applied, and thus the read data output may be disabled.

The multiplexer may be disabled when the burn-in signal is applied, and the read data output may be disabled.

The multiplexer controller may be disabled when a burn-in signal is applied, thereby disabling the read data output.

Burn-in test method for a semiconductor memory device according to an embodiment of the present invention for achieving the another technical problem,

(a) connecting at least one semiconductor memory device to a test device;

(b) applying a burn-in signal to the semiconductor memory device in a test device;

(c) conducting a write stress test; And

(d) performing a read stress test in the same test apparatus as the test apparatus.

Therefore, in the present invention, the read path circuit disabled when the burn-in signal is applied may be characterized in that the write stress test and the read stress test can be simultaneously performed in the same test apparatus.

DETAILED DESCRIPTION In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings that describe exemplary embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the drawings denote like elements.

2 is a view illustrating a part of a read path circuit of a semiconductor memory device according to the present invention. The lead pad circuit 200 of the semiconductor memory device according to the present invention includes a multiplexer controller 210 (MUXCRTL), a multiplexer 220 (MUX), and a decu driver 230 (DQDRV).

The read path circuit is a path through which read data output in response to a read command applied from the outside of the semiconductor memory device is performed. Read data is sequentially output through the multiplexer control unit 210, the multiplexer 220, and the decuar driver 230 to the outside of the semiconductor memory device.

The multiplexer controller 210 controls the multiplexer 220.

A deque driver 230 is connected to a rear end of the multiplexer 220, and the deque driver 230 finally outputs read data to the outside of the semiconductor memory device.

In the test mode of the semiconductor memory device, a burn-in signal is applied outside the semiconductor memory device. When the burn-in signal is applied, the read data output of the read pass circuit is disabled.

In order to disable the read data output of the read path circuit 200,

First, when the burn-in signal is applied to the decu driver 230, the decu driver 230 may be disabled, and thus the read data output may be disabled. 2 illustrates a case where the burn-in signal is applied to the decu driver 230.

Second, when the burn-in signal is applied to the multiplexer 220, the multiplexer 220 may be disabled, and thus the read data output may be disabled. This is because the multiplexer 220 is connected in series in the read path circuit 200. When the multiplexer 220 is disabled, read data is not output.

Third, when the burn-in signal is applied to the multiplexer controller 210, the multiplexer controller 210 may be disabled so that the read data output may be disabled. This is because when one of the components connected in series in the read path circuit 200 is disabled, read data is not output.

When the read pass circuit 200 is disabled, since the read data is not output, the write stress test and the read stress test may be simultaneously performed on the semiconductor memory device in the same test device.

3 is a flow chart of a burn-in test method for a semiconductor memory device according to the present invention. In the burn-in test method 300 according to an exemplary embodiment of the present invention, at least one semiconductor memory device is connected to a test device (S310), a test device applying a burn-in signal to a semiconductor memory device (S320), A step of performing a write stress test (S330) and a step of performing a read stress test (Read stress test) in the same test device as the test device (S340).

In operation S310, a semiconductor memory device is connected to a test device, and a power line and a data line are connected between the test device and a plurality of semiconductor memory devices.

In operation S320 of applying a burn-in signal to the semiconductor memory device, a burn-in test is performed to perform a burn-in test, that is, a write stress test and a read stress test. ) Refers to the step of applying a signal. The read pass circuit of the semiconductor memory device according to the present invention is disabled when a burn-in signal is applied.

A step of performing a write stress test (S330) generally refers to a step of applying a write command to a semiconductor memory device using a parallel bit test by one (PBTX1) mode. .

 In operation S340, a read stress test is performed by applying a read command to the semiconductor memory device. Since the read pass circuit of the semiconductor memory device according to the present invention is disabled when a burn-in signal is applied, the read stress test may be performed in the same test device.

This is because when the lease pass circuit is disabled, a short path does not occur even when there is opposite data among the read data.

In the above described the present invention with reference to the specific embodiment shown in the drawings, but this is only an example, those of ordinary skill in the art to which the present invention pertains various modifications and variations therefrom. Therefore, the protection scope of the present invention should be interpreted by the claims to be described later, and all technical ideas within the equivalent and equivalent ranges should be construed as being included in the protection scope of the present invention.

As described above, the present invention provides a read path circuit of a semiconductor memory device that is disabled when the burn-in signal is applied, thereby simultaneously performing a write stress test and a read stress test in the same test device. .

Claims (5)

In a read path circuit which is a path through which read data output in response to a read command applied from the outside of the semiconductor memory device proceeds, A multiplexer controller; A multiplexer controlled by the multiplexer controller; And A deq driver (DQ driver) connected to a rear end of the multiplexer to finally output the read data to the outside of the semiconductor memory device; And when a burn-in signal is applied in the test mode of the semiconductor memory device, the read data output of the read pass circuit is disabled. The method of claim 1, wherein the deque driver, And the read data output is disabled when the burn-in signal is applied. The method of claim 1, wherein the multiplexer is And the read data output is disabled when the burn-in signal is applied. The method of claim 1, wherein the multiplexer control unit, And the read data output is disabled when the burn-in signal is applied. In the burn-in test method for the semiconductor memory device of claim 1, (a) connecting at least one semiconductor memory device to a test device; (b) applying a burn-in signal to the semiconductor memory device in a test device; (c) conducting a write stress test; And and (d) performing a read stress test on the same test apparatus as the test apparatus.

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