KR20080062142A - Method of manufacturing image sensor - Google Patents

Abstract

A method of manufacturing an image sensor is provided to easily adjust a thickness and a radius of curvature of a lens and effectively maintain the sensitivity of a pixel region. An epitaxial layer having plural photodiodes is formed on a semiconductor substrate. Plural interconnections, contacts and plural interlayer dielectrics having elements for signal process are formed on the epitaxial layer. Plural microlenses corresponding to the photodiode is formed on the upper interlayer dielectric. Plural interconnections(281,311), contacts(300) and plural interlayer dielectrics(280,290) having elements for signal process are formed on the upper interlayer dielectric. Plural second microlenses(320) are formed on the uppermost interlayer dielectric.

Description

Method of Manufacturing Image Sensor

1 is a cross-sectional view for explaining a manufacturing method of an image sensor according to the prior art.

2A to 2D are cross-sectional views illustrating a method of manufacturing an image sensor according to an exemplary embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

200: silicon epi layer 201: red pixel

202: green pixel 203: blue pixel

210: first interlayer insulating film 211: first metal wiring

212: first nitride film 213: first MIM

220: second interlayer insulating film 230: first contact

240: third interlayer insulating film 241: second metal wiring

250: fourth interlayer insulating film 260: second contact

270: first microlens 280: fifth interlayer insulating film

281: third metal wiring 282: second nitride film

282: second MIM 290: sixth interlayer insulating film

300: third contact 310: passivation oxide film

311: fourth metal wiring 320: second microlens

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an image sensor, and more particularly, to a method of manufacturing an image sensor capable of improving performance of an image sensor by improving light condensing efficiency by improving a microlens.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and may be broadly classified into a charge coupled device (CCD) image sensor device and a complementary metal oxide semiconductor (CMOS) image sensor device. CCD devices are devices in which charge carriers are stored and transported in capacitors while individual metal-oxide-silicon (MOS) capacitors are in close proximity to each other.

On the other hand, the CMOS image sensor is composed of a photodiode unit for detecting the irradiated light and a CMOS logic circuit unit for processing the detected light into an electrical signal and converting the data into light. As the amount of light received by the photodiode increases, the optical sensitivity of the image sensor is increased. The characteristic becomes good.

In order to increase the light sensitivity, a technique of increasing the fill factor occupied by the area of the photodiode in the total area of the image sensor or by changing the path of light incident to an area other than the photodiode is used to focus the photodiode. A representative example of the focusing technique is to form a microlens. This is a method of irradiating a larger amount of light to a photodiode by refracting the path of incident light by making a convex microlens with a material having a high light transmittance on the photodiode. . In this case, light parallel to the optical axis of the microlens is refracted by the microlens to form a focal point at a predetermined position on the optical axis.

1 is a structural cross-sectional view showing an image sensor according to the prior art.

As shown in FIG. 1, signals of a red pixel 110, a green pixel 111, and a blue pixel 112 are recognized in pixel regions of the stacked silicon epitaxial layer 100, respectively. A photodiode (PD) can be formed, and a plurality of interlayer insulating films including a plurality of metal wirings, contacts, and devices for signal processing can be formed in a logic region.

As described above, the lower interlayer insulating layer 120 is formed on the silicon epitaxial layer 100 including the plurality of devices. In this case, the lower metal wiring 121, the nitride film 122, and the MIM 123 may be provided on the logic region of the lower interlayer insulating layer 120.

Next, an upper interlayer insulating layer 130 is formed on the lower interlayer insulating layer 120 including the MIM 123, the nitride film 122, and the lower metal wiring 121.

Next, a contact 140 is formed to penetrate through the upper interlayer insulating layer 130 and the lower interlayer insulating layer 120 to contact the nitride layer 122.

Subsequently, a passivation oxide film 150 is formed on the upper interlayer insulating film 130 including the contact 140 to protect the device from physical shock from moisture or the outside, and the contact 140 is formed in the logic region of the passivation oxide film 150. ) To form the upper metal wiring 160.

Thereafter, in order to reduce the distance between the photodiode PD that forms a signal by receiving external light and the microlens 170 to be generated on the top of the passivation oxide film 150, the pixel area of the photodiode PD is reduced. A portion of the passivation oxide film 150 is array patterned and etched.

Subsequently, in order to evenly form the photoresist on the entire surface of the wafer during coating of the photoresist film for forming the microlens 170, a process step of reducing the inclination of the bottom surface of the pixel area is important.

In the current state of the art, a problem arises in the uniformity in which the pixel edges and the middle portions differ in thickness after the array etch, and planarization through the array etch and the sidewalls to form subsequent microlenses. There is a difficult point that needs to be etched due to the inclination of ˚. In addition, as the condition of the array etch is different, there are problems such as microlens thickness, curvature radius, microlens implementation uniformity, and gap between the lens and the lens due to the difference in toplogy.

In order to solve the above problems, an object of the present invention is to provide a method for manufacturing an image sensor that can improve the performance of the image sensor by improving the light condensing efficiency by improving the microlens.

In order to achieve the above object, the present invention, forming an epitaxial layer having a plurality of photodiodes on a semiconductor substrate, and a plurality of metal wiring, contacts and signal processing on the epitaxial layer Forming a plurality of interlayer insulating films, forming a plurality of first microlenses corresponding to the photodiode on an upper interlayer insulating film among the interlayer insulating films, and forming a plurality of first microlenses Forming a plurality of different interlayer insulating films having a plurality of metal wirings, contacts and elements for signal processing on the interlayer insulating film, and forming the same material as the first microlens on the uppermost interlayer insulating film of the other interlayer insulating films; It provides a method of manufacturing an image sensor comprising the step of forming a plurality of second microlens of the form.

In the present invention, the first microlens and the second microlens are formed into convex microlenses using a photoresist material.

Hereinafter, a manufacturing method of an image sensor according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Descriptions of technical contents that are well known in the art to which the present invention pertains and are not directly related to the present invention will be omitted. This is to more clearly communicate without obscure the subject matter of the present invention by omitting unnecessary description.

First, as illustrated in FIG. 2A, a silicon epi layer 200 having a plurality of photodiodes is formed on a silicon semiconductor substrate (not shown), and a plurality of metal wires and contacts are formed on the silicon epi layer 200. And a plurality of interlayer insulating films having elements for signal processing.

In detail, a photo capable of recognizing a red pixel 201, a green pixel 202, and a blue pixel 203 in a pixel area of the stacked silicon epitaxial layer 200, respectively. Form a diode (photodiode, PD).

Thereafter, a first interlayer insulating film 210 is formed on the silicon epitaxial layer 200 including the photodiode PD. Here, the first interlayer insulating layer 210 is deposited using a TEOS (Tetra Ethly Ortho Silicate) material, which is an insulating material. In this case, the first metal wire 211, the first nitride film 212, and the first MIM 213 may be provided on the logic region of the first interlayer insulating layer 210. That is, in order to form the first metal wiring 211, a predetermined patterning and etching process is selectively performed on the first interlayer insulating layer 210 of the logic region, and a metal including copper is deposited to form the first metal wiring 211. ).

Subsequently, a first nitride film 212 and a first metal insulator metal (MIM) 213 are formed on the first metal wire 211. In this case, the first nitride film 212 functions as a diffusion barrier. In addition, the first MIM 213 means that there is an insulator between the metals and functions as a capacitor.

Next, a second interlayer insulating film 220 is formed on the first interlayer insulating film 210 including the first MIM 213, the first nitride film 212, and the first metal wiring 211.

Subsequently, the first contact 230 penetrating the second interlayer insulating film 220 and the first interlayer insulating film 210 to contact the first nitride film 212 is formed. In this case, the first contact 230 may be formed by a CVD tungsten method.

Subsequently, a third interlayer insulating film 240 is formed on the second interlayer insulating film 220 including the first contact 230, and the first contact 230 is in contact with the logic region of the third interlayer insulating film 240. The second metal wiring 241 is formed.

Thereafter, the fourth interlayer insulating film 250 is formed on the third interlayer insulating film 240 including the second metal wiring 241, and the fourth interlayer insulating film is formed in the same manner as when the first contact 230 is formed. A second contact 260 is formed to penetrate 250 and the third interlayer insulating layer 240 to contact the second metal wire 241.

Next, as illustrated in FIG. 2B, a plurality of first microlenses 270 are disposed on the fourth interlayer insulating layer 250 of the pixel area including the photodiode PD, etc., corresponding to the photodiode PD. Form. In this case, the first microlens 270 may implement the lens in the same oxide material as the transmittance of the photoresist used in the related art. That is, the oxide layer may be deposited on the fourth interlayer insulating layer 250 using an oxide material, and the first microlens 270 having a topolgy shape may be implemented using an etch back technique.

Next, as illustrated in FIG. 2C, a fifth interlayer insulating layer 280 is formed on the fourth interlayer insulating layer 250 including the first microlens 270. In this case, a second MIM 283 is formed on the second metal film 282 and the second nitride film 282 on the third metal wire 281 and the third metal wire 281 in the logic region of the fifth interlayer insulating film 280. ) May be provided.

Subsequently, a sixth interlayer insulating film 290 is formed on the fifth interlayer insulating film 280 including the second MIM 283, the second nitride film 282, and the third metal wiring 281. Thereafter, a third contact 300 penetrating the sixth interlayer insulating layer 290 and the fifth interlayer insulating layer 280 to contact the second nitride film 282 is formed.

Subsequently, the passivation oxide layer 310 is deposited on the sixth interlayer insulating layer 290 including the third contact 300. Thereafter, the fourth metal wiring 311 is formed by performing a patterning, etching, and deposition process on the passivation oxide layer 310 of the logic region in order to form the fourth metal wiring 311.

Next, as illustrated in FIG. 2D, a plurality of second microlenses 320 having the same material and shape as the first microlens 270 are formed on the passivation oxide layer 310 of the pixel region. In this case, when the second microlens 320 is formed, an additional mask fabrication cost for the second microlens 320 may be reduced by using the same mask as the first microlens 270.

Accordingly, by forming double microlens of the first microlens 270 and the second microlens 320, the photodiode PD and the passivation oxide film are formed on the top of the passivation oxide film. In order to reduce the distance from the microlenses to be formed, the planarization of the microlens forming part which has been array patterned and etched in the passivation oxide layer of the photodiode (PD) pixel region is unnecessary, so that the lens is not improved without the sensitivity enhancement process through the inclined etch. It is easy to adjust the thickness and radius of curvature, while effectively maintaining the sensitivity of the pixel region.

Although specific embodiments of the present invention have been described with reference to the drawings, this is intended to be easily understood by those skilled in the art and is not intended to limit the technical scope of the present invention. Therefore, the technical scope of the present invention is determined by the matters described in the claims, and the embodiments described with reference to the drawings may be modified or modified as much as possible within the technical spirit and scope of the present invention.

As described above, according to the present invention, by forming double microlens, the gap between the photodiode PD that forms a signal by receiving external light and the microlens to be generated on top of the passivation oxide film is reduced. In order to eliminate the need for the planarization of the microlens forming part that arrays a portion of the passivation oxide layer of the photodiode (PD) pixel area and performs the etch process, it is easy to control the thickness and the radius of curvature of the lens without the sensitivity improvement process through the diagonal etch. The sensitivity of the pixel region can be effectively maintained.

In addition, when the microlens is formed in the pixel area of the same area, it is possible to prevent the area loss due to the inclination of the array etch wall and to reduce the size of the chip by forming smaller and more cells in the same area.

Claims (4)

Forming an epitaxial layer having a plurality of photodiodes on the semiconductor substrate, Forming a plurality of interlayer insulating films on the epi layer, the plurality of interlayer insulating films having a plurality of metal wires, contacts and devices for signal processing; Forming a plurality of first microlenses corresponding to the photodiode on an upper interlayer insulating film among the interlayer insulating films; Forming a plurality of other interlayer insulating films on the upper interlayer insulating film including the first microlens, the plurality of other interlayer insulating films including a plurality of metal wires, contacts and devices for signal processing; And forming a plurality of second microlenses of the same material and shape as the first microlens on the uppermost interlayer insulating film of the other interlayer insulating films. The method of claim 1, Forming the first micro lens, Forming photodiodes capable of recognizing red, green, and blue signals in pixel regions between the stacked silicon epi layers; Forming a first interlayer insulating film on the silicon epi layer including the photodiode in the pixel region; Forming a first metal wiring in a logic region of the first interlayer insulating film, forming a first nitride film on the first metal wiring, and forming a first metal insulator metal (MIM) on the first nitride film; , Forming a second interlayer insulating film on the first interlayer insulating film including the first metal wiring, the first nitride film and the first MIM; Forming a first contact penetrating through said second interlayer insulating film and said first interlayer insulating film, said first contact being in contact with said first nitride film; Forming a third interlayer insulating film on the second interlayer insulating film including the first contact; Forming a second metal wire on the third interlayer insulating layer, the second metal wire contacting the first contact; Forming a fourth interlayer insulating film on the third interlayer insulating film including the second metal wiring; Forming a second contact penetrating the fourth interlayer insulating layer and the third interlayer insulating layer to make contact with the second metal wiring; And forming a plurality of first microlenses in the pixel region of the fourth interlayer insulating layer corresponding to the photodiode. The method according to claim 1 or 2, Forming the second micro lens, Forming a fifth interlayer insulating film on the fourth interlayer insulating film including the first microlens; Forming a third metal wiring in a logic region of a fifth interlayer insulating film, forming a second nitride film on the third metal wiring, and forming a second MIM on the second nitride film; Forming a sixth interlayer insulating film on the fifth interlayer insulating film including the third metal wiring, the second nitride film and the second MIM; Forming a third contact penetrating the sixth interlayer insulating layer and the fifth interlayer insulating layer to make contact with the second nitride film; Forming a passivation oxide film on the sixth interlayer insulating film including the third contact; Forming a fourth metal wiring in a logic region of the passivation oxide film; And forming a second microlens of the same material and shape as the first microlens on the passivation oxide film including the fourth metal wiring. The method of claim 1, And the first microlens and the second microlens are formed of convex microlenses using a photoresist material.

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