KR20080057434A - Organic light emitting diode display and driving method thereof - Google Patents

Abstract

An OLED(Organic Light Emitting Diode) display device and a driving method thereof are provided to enhance display quality by varying a high level driving voltage according to the lightness of images of a current frame and the display load of a display panel. An OLED(Organic Light Emitting Diode) display device includes a display panel(120), a high level driving voltage generator(134), a load detector(127), and a driving voltage controller(132). The display panel includes data and gate lines which are crossed each other, pixels having OLEDs, and a high level source voltage supply terminal connected to the pixels in common. The high level driving voltage generator supplies a high level source voltage to the high level source voltage supply terminal. The load detector detects display load of images which are displayed on the display panel during an n-th frame period. The driving voltage controller calculates an average luminance of digital video data of images to be displayed in the display panel during an (n+1)-th frame, compares the average luminance with the display load, and controls a voltage level of the high level source voltage according to the comparison result.

Description

Organic Light Emitting Diode Display And Driving Method Thereof}

1 is a diagram illustrating a light emitting principle of a conventional organic light emitting diode display.

2 is a graph showing temperature characteristics according to driving time in a conventional organic light emitting diode display.

3A and 3B are diagrams illustrating examples of a dark image and a bright image in a specific frame, respectively.

4 is a block diagram of an organic light emitting diode display according to an exemplary embodiment of the present invention.

5 is a circuit diagram illustrating an example of a pixel illustrated in FIG. 4.

6 is a diagram illustrating an example of a load detector illustrated in FIG. 4.

7 is a configuration diagram of a driving voltage control unit shown in FIG. 4.

8A is a diagram illustrating an example of a first lookup table showing a tendency of decreasing amount of high potential driving voltage when the average luminance is greater than a digital display load.

8B is a view showing an example of a second lookup table showing a tendency of increasing amount of high potential driving voltage when the average luminance is smaller than the digital display load.

FIG. 8C illustrates an example of a third lookup table showing that the high potential driving voltage is maintained at the same value as the previous frame when the average luminance is equal to the digital display load. FIG.

9 is a configuration diagram of a driving voltage generator shown in FIG. 4.

<Description of Symbols for Main Parts of Drawings>

110: high potential power voltage supply terminal 112: low potential power voltage supply terminal

120: organic light emitting diode display panel 122: gate driver

124: data driver 126: gamma reference voltage generator

127: load detector 127-2: current detector

127-4: Analog-to-digital converter 128: Pixel

128-2: pixel driver circuit 130: timing controller 132: drive voltage controller 132-2: luminance detector

132-4: adder 132-6: average value calculator

132-8: comparison unit 132-10: storage unit

134: drive voltage generator

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode display and a driving method thereof, and more particularly, to an organic light emitting diode display and a method of driving the same, according to an image brightness of a current frame and a display load of a detected display panel. It is about.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCDs"), field emission displays (FEDs), plasma display panels (hereinafter referred to as "PDPs"). And organic light emitting diode displays.

Among them, PDP is attracting attention as a display device which is light and small and is most advantageous for large screen because of its simple structure and manufacturing process. However, PDP has low luminous efficiency, low luminance and high power consumption. In addition, an active matrix LCD having a thin film transistor (“TFT”) applied as a switching device has a disadvantage in that large screens are difficult to use due to a semiconductor process and power consumption is large due to a backlight unit.

In contrast, organic light emitting diode display devices are classified into inorganic light emitting diode display devices and organic light emitting diode display devices according to the material of the light emitting layer. The organic light emitting diode display devices are self-luminous devices that emit light and have high response speed, high luminous efficiency, high luminance, and a wide viewing angle. . In comparison with the organic light emitting diode display, the inorganic light emitting diode display has higher power consumption and cannot obtain high brightness, and cannot emit various colors of R (Red), G (Green), and B (Blue). On the other hand, the organic light emitting diode display is driven at a low DC voltage of several tens of volts, has a fast response speed, obtains high luminance, and emits various colors of R, G, and B, which is suitable for next-generation flat panel display devices. Do.

In the organic light emitting diode display, when a voltage is applied between the anode 100 and the cathode 70, as shown in FIG. 1, electrons generated from the cathode 70 are transferred to the electron injection layer 78a and the electron transport layer ( It moves to the organic light emitting layer 78c through 78b). Further, holes generated from the anode 100 move to the organic light emitting layer 78c through the hole injection layer 78e and the hole transport layer 78d. Accordingly, in the organic light emitting layer 78c, light is generated by collision and recombination of electrons and holes supplied from the electron transport layer 78b and the hole transport layer 78d, and the light is emitted to the outside through the anode 100. The image is displayed.

FIG. 2 is a graph showing temperature characteristics according to driving time in a conventional organic light emitting diode display, and FIGS. 3A and 3B are diagrams showing examples of a dark image and a bright image in a specific frame, respectively. In FIG. 2, the horizontal axis represents driving time T, and the vertical axis represents luminance Y. In FIG.

As shown in FIG. 2, the organic light emitting diode display has a characteristic that is vulnerable to temperature. That is, as the driving time of the organic light emitting diode display increases from T1 to T2, the temperature of the display panel increases due to an increase in the display load applied to the display panel. As the temperature of the display panel increases, not only the lifespan of the organic light emitting diode device is shortened, but the luminance expressed in the display panel increases in proportion to the temperature increase even when the same data voltage is applied. This problem is greater when the bright image shown in FIG. 3B than when the dark image shown in FIG. 3A. In other words, the conventional organic light emitting diode display device is driven at the same driving voltage regardless of the dark image and the bright image in a specific frame, and flows through the organic light emitting diode elements when the image is relatively bright as shown in FIG. 3B. As the driving current increases compared to the dark image of FIG. 3A, not only the lifespan of the organic light emitting diode device is shortened but also the display quality is deteriorated.

Accordingly, it is an object of the present invention to provide an organic light emitting diode display and a driving method thereof in which a high potential driving voltage is varied according to an image brightness of a current frame and a detected display load of a display panel.

An object of the present invention is to change the high potential driving voltage according to the image brightness of the current frame and the display load of the detected display panel, thereby preventing the lifespan of the organic light emitting diode device from being shortened and increasing the display quality. An apparatus and a driving method thereof are provided.

In order to achieve the above object, an organic light emitting diode display according to an exemplary embodiment of the present invention includes a plurality of pixels intersecting a plurality of data lines and a plurality of gate lines, and each of the pixels having organic light emitting diode elements is disposed in a matrix form. A display panel having a high potential power voltage supply terminal connected in common; A high potential driving voltage generator supplying a high potential power voltage to the high potential power voltage supply terminal; A load detector for detecting a display load of an image displayed on the display panel during an nth (n is positive integer) frame period; And calculating average luminance of digital video data of an image to be displayed on the display panel during an n + 1 frame period, comparing the average luminance and the display load, and determining a voltage level of the high potential power voltage according to the comparison result. A driving voltage control part is provided.

The driving voltage control unit detects luminance values of each pixel by using digital video data of an image to be displayed on the display panel during the n + 1th frame period, and sets the maximum luminance value of each pixel among the detected luminance values. A luminance detector for calculating; An adder for adding the calculated maximum luminance values of each pixel; An average value calculator for dividing the sum of the maximum luminance values by a predetermined resolution and calculating an average luminance of an image to be displayed on the display panel during the n + 1th frame period; A comparator for generating a plurality of comparison signals by comparing the average brightness and the display load; And a storage unit storing a plurality of driving voltage control signals selected by using the plurality of comparison signals as read addresses.

The storage unit is implemented with at least one lookup table.

In the lookup table, a plurality of digital driving voltage control data are listed differently according to the relative magnitude of the average brightness with respect to the display load, and the comparison signals are generated differently according to the difference between the average brightness and the display load. Digital drive voltage control data is selected.

The plurality of digital driving voltage control data listed in the lookup table are determined in a direction of lowering the voltage level of the high potential power voltage as the average brightness is greater than the display load and the difference between the average brightness and the display load is larger.

The plurality of digital driving voltage control data listed in the lookup table are determined in a direction of increasing the voltage level of the high potential power voltage as the average brightness is smaller than the display load and the difference between the average brightness and the display load is larger.

The plurality of digital driving voltage control data listed in the lookup table may include a display load of an image in which a display load of an n + 1 frame period to be displayed on the display panel determined by the average brightness is displayed during the nth frame period. If substantially equal to and has a data value for maintaining the high potential power supply voltage.

The high potential drive voltage generator is a digital-to-analog converter that converts the digital drive voltage control data selected by the lookup table into an analog voltage and supplies the analog voltage to the high potential power voltage supply terminal as the high potential power voltage. do.

The load detector includes a current detector for detecting a drive current flowing through the display panel; And an analog-digital converter configured to convert the detected driving current into a digital signal.

In order to achieve the above object, according to an embodiment of the present invention, a cell having a plurality of data lines and a plurality of gate lines intersected therein and having organic light emitting diode elements are arranged in a matrix form, and a high potential power voltage commonly connected to the cells. A driving method of an organic light emitting diode display device having a display panel including a supply terminal, includes: supplying a high potential power voltage to the high potential power voltage supply terminal; Detecting a display load of an image displayed on the display panel during an nth (n is positive integer) frame period; Calculating average luminance of digital video data of an image to be displayed on the display panel during an n + 1th frame period; And comparing the average brightness with the display load and controlling the voltage level of the high potential power voltage according to the comparison result.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 9.

4 is a configuration diagram of an organic light emitting diode display according to an exemplary embodiment of the present invention, and FIG. 5 is a circuit diagram illustrating an example of a pixel illustrated in FIG. 4.

Referring to FIG. 4, an organic light emitting diode display according to an exemplary embodiment of the present invention includes pixels arranged in regions defined by intersections of a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. An organic light emitting diode display panel 120 having a 128, a gate driver 122 supplying scan pulses to gate lines GL1 to GLn of the organic light emitting diode display panel 120, and an organic light emitting diode display A data driver 124 for supplying analog data voltages to the data lines DL1 to DLm of the panel 120 and a gamma reference voltage generator 126 for supplying a plurality of gamma reference voltages GMA to the data driver 124. ), A load detector 127 for detecting a display load of the organic light emitting diode display panel 120, a timing controller 130 for controlling driving timing of the gate driver 122 and the data driver 124, Image of current frame A driving voltage controller 132 for controlling the high potential driving voltage according to the brightness and the detected display load of the display panel, and a driving voltage generator 134 for generating the high potential driving voltage controlled according to the driving voltage control signal. do.

In the organic light emitting diode display panel 120, pixels 128 are arranged in a matrix form. The organic light emitting diode display panel 120 includes a high potential power supply voltage supply terminal 110 that receives a high potential driving voltage VDD from the driving voltage generator 134, and a base voltage from a base voltage source (not shown). The low potential power voltage supply terminal 112 supplied with (VSS) is provided. The high potential driving voltage VDD supplied to the high potential power voltage supply terminal 110 and the base voltage VSS supplied to the low potential power voltage supply terminal 112 are supplied to the respective pixels 128.

Each of the pixels 128 receives an analog data voltage from the data line DL when the gate signal is supplied to the gate line GL, and generates light corresponding to the data voltage. To this end, each of the pixels 128 includes an organic light emitting diode (OLED) having an anode electrode connected to a high potential power supply voltage supply terminal 110 for supplying a high potential driving voltage VDD as shown in FIG. 5. And an organic light emitting diode connected to a gate line GL and a data line DL, and connected to a low potential power supply voltage supply terminal 112 for supplying a ground voltage VSS and a cathode electrode of an organic light emitting diode element OLED. The pixel driver circuit 128-2 for driving the element 112 is provided. The pixel driver circuit 128-2 includes a switching thin film transistor having a gate electrode connected to the gate line GL, a drain electrode connected to the data line DL, and a source electrode connected to the node N. TFT " (ST), a driving TFT having a gate electrode connected to the node N, a drain electrode connected to the cathode electrode of the organic light emitting diode OLED, and a source electrode connected to the base voltage pad 112. DT) and a storage capacitor Cst connected between the cathode of the organic light emitting diode element OLED and the node N.

During the scan period, the switching TFT ST is turned on in response to the scan pulse supplied to the gate line GL to supply the node N with the analog data voltage supplied to the data line DL. The analog data voltage supplied to the node N is charged to the storage capacitor Cst and supplied to the gate electrode of the driving TFT DT. The driving TFT DT is turned on in response to the analog data voltage supplied to the gate electrode, thereby controlling the amount of emission of the organic light emitting diode OLED by controlling the amount of driving current I flowing through the organic light emitting diode OLED. do. During the non-scan period, even when the switching TFT ST is turned off, the driving TFT DT emits organic light until the analog data voltage of the next frame is supplied due to the discharge of the analog data voltage stored in the storage capacitor Cst. Light emission of the diode device OLED is maintained. Here, the pixel driver circuit 128-2 may have various structures in addition to the above-described structure.

The gate driver 122 turns off the gate high voltage for turning on the switching TFT in the pixel 128 and the switching TFT in the pixel 128 in response to the gate control signal GDC from the timing controller 130. Generates a scan pulse swinging between the gate low voltages. The gate driver 122 supplies the generated scan pulses to the gate lines GL1 to GLn to sequentially drive the gate lines GL1 to GLn.

The gamma reference voltage generator 126 supplies a plurality of gamma reference voltages having various voltage values to the data driver 124.

The data driver 124 converts the digital video data RGB input in response to the data control signal DDC from the timing controller 130 into an analog data voltage using the gamma reference voltage from the gamma reference voltage generator 126. Convert. The data driver 124 supplies the analog data voltage to the data lines DL1 to DLm in synchronization with the time point at which the scan pulse is supplied.

The load detector 127 detects a display load of the organic light emitting diode display panel 120, converts it into a digital signal, and supplies the converted load to the driving voltage controller 132. The load detector 127 will be described later with reference to FIG. 6.

The timing controller 130 controls the data control signal DDC and the gate driver 122 to control the data driver 124 using the vertical and horizontal synchronization signals HV Sync and the input clock CLK. The gate control signal GDC is generated. The data control signal DDC includes a source shift clock SSC, a source start pulse SSP and a source output enable signal SOE, and the gate control signal GDC includes a gate start pulse GSP and A gate output enable signal GOE and the like. The data control signal DDC generated by the timing controller 130 is supplied to the data driver 124 to control the data driver 124. The gate control signal GDC generated by the timing controller 130 is supplied to the gate driver 122 to control the gate driver 122. In addition, the timing controller 130 rearranges the digital video data RGB supplied from the scaler (not shown) to match the resolution and supplies the digital video data RGB to the data driver 124 and the driving voltage controller 132.

The driving voltage controller 132 detects luminance values of each pixel 128 using the input digital video data RGB of the current frame and calculates a maximum luminance value of each pixel 128 among the detected luminance values. do. The driving voltage controller 132 adds all the calculated maximum luminance values of each pixel 128 and calculates the average luminance of the current frame using the addition value. The driving voltage controller 132 compares the calculated average luminance of the current frame with the display load from the load detector 127 to generate a comparison signal. The driving voltage controller 132 selects the driving voltage control signal prestored in the lookup table by using the generated comparison signal as a read address and supplies it to the driving voltage generator 134. The driving voltage control signal is a control signal for generating a high potential driving voltage VDD which is increased / decreased or maintained according to the detected display load and the average brightness of the current frame. The driving voltage controller 132 may be built in the timing controller 130. The driving voltage controller 132 will be described later with reference to FIGS. 7 to 8B.

The driving voltage generator 134 increases compared to the high potential driving voltage VDD of the previous frame according to the display load detected by switching in response to the driving voltage control signal from the driving voltage controller 132 and the average brightness of the current frame. Generate a high potential drive voltage VDD that is reduced or has the same value as the high potential drive voltage VDD of the previous frame. The driving voltage generator 134 will be described later with reference to FIG. 9.

6 is a diagram illustrating an example of the load detector 127 illustrated in FIG. 4.

Referring to FIG. 6, the load detector 127 may include a current detector 127-2 for detecting a driving current flowing through the organic light emitting diode display panel 120, and an analog-for analog-to-digital conversion of the detected driving current. The digital converter 127-4 is provided.

The current detector 127-2 is connected between the driving voltage supply pad 110 and the base voltage supply pad 112 to detect the driving current flowing through the organic light emitting diode display panel 120. The detected driving current has a value proportional to the display load of the organic light emitting diode display panel 120. That is, in the case of the bright image of FIG. 3B as compared to the dark image of FIG. 3A, the display load felt by the display panel 120 is relatively increased, thereby increasing the temperature of the display panel 120, and the driving current is also increased in proportion to this. Done. Detecting the value of the driving current is only an example for measuring the display load currently felt by the organic light emitting diode display panel 120, and thus the technical idea of the present invention is not limited thereto. Of course, the configuration also includes.

The analog-digital converter 127-4 converts the analog drive current detected by the current detector 127-2 to the digital display load Pl. The converted digital display load P1 is supplied to the driving voltage controller 132.

7 is a block diagram of the driving voltage controller 132 shown in FIG. 4. FIG. 8A is a diagram illustrating an example of a first lookup table showing a tendency of decreasing the high potential driving voltage when the average luminance is greater than the digital display load, and FIG. 8B is a high potential driving voltage when the average luminance is smaller than the digital display load. FIG. 8C is a view illustrating an example of a second lookup table showing an increasing amount of?, And FIG. 8C illustrates one example of a third lookup table showing that a high potential driving voltage is maintained at the same value as a previous frame when the average brightness is equal to the digital display load. The figure shows an example. The first to third lookup tables may be integrated into one lookup table, and the description will be given by dividing into three for convenience of description.

Referring to FIG. 7, the driving voltage controller 132 detects luminance values of each pixel 128 using the input digital video data RGB of the current frame, and among the detected luminance values, each pixel 128. A luminance detector 132-2 for calculating the maximum luminance value of the camera, an adder 132-4 for adding all the maximum luminance values of each pixel 128 detected by the luminance detector 132-2, and An average value calculator 132-6 for calculating an average luminance Avi (br) of the current frame using the addition values of the maximum luminance values added by the adder 132-4, and an average value calculator ( Comparator 132-8 for generating a plurality of comparison signals Vdiff1 to Vdiff3 by comparing the average luminance Avi (br) from 132-6 with the digital display load Pl from the load detector 127. And the plurality of driving voltage control signals Cdac1 to Cdac3 selected by using the plurality of comparison signals Vdiff1 to Vdiff3 as read addresses. The load includes a storage unit 132-10.

The luminance detector 132-2 analyzes the gray level of the digital video data RGB of the current frame input from the system for each pixel 128, and then uses the gray level of the analyzed digital video data RGB. Detect the RGB luminance values of the pixel. When the RGB luminance value is detected as described above, the luminance detector 132-2 calculates the maximum luminance value among the RGB luminance values of each pixel 128, and adds the calculated maximum luminance value of each pixel 128. -4)

The adder 132-4 adds all the maximum luminance values of the pixels 128 detected by the luminance detector 132-2, and outputs the added value of the maximum luminance values to the average value calculator 132-6. .

The average value calculator 132-6 divides the addition value of the maximum luminance values input from the adder 132-4 into a predetermined resolution and calculates the quotient as the average luminance of the current frame (that is, the average luminance of each pixel). To the comparator 132-8.

The comparator 132-8 compares the average luminance Avi (br) from the average value calculator 132-6 with the digital display load Pl from the load detector 127 to compare the signals Vdiff1 to Vdiff3. Occurs.

In detail, if the average luminance Avi (br) of the current frame calculated as a result of the comparison is greater than the detected digital display load Pl, the comparator 132-8 generates both digital signals Avi (br) and Pl. Generates a first comparison signal Vdiff1 defined by the difference value Avi (br) -Pl. When the average luminance Avi (br) and the digital display load Pl are multiple bits (for example, 8 bits), a plurality of first comparison signals Vdiff1 may be generated. The first comparison signal Vdiff1 serves as a read address of the first lookup table included in the storage unit 132-10.

If the average luminance Avi (br) of the current frame calculated as a result of the comparison is smaller than the detected digital display unit Pl, the comparison unit 132-8 determines the difference value between the two digital signals Avi (br), Pl. Pl-Avi (br)) to generate a second comparison signal (Vdiff2). When the average luminance Avi (br) and the digital display load Pl are multiple bits (for example, 8 bits), a plurality of second comparison signals Vdiff2 may be generated. The second comparison signal Vdiff2 serves as a read address of the second lookup table included in the storage unit 132-10.

If the average luminance Avi (br) of the current frame calculated as a result of the comparison is equal to the detected digital display load Pl, the comparison unit 132-8 determines the difference value between the two digital signals Avi (br) and Pl. Pl-Avi (br)) to generate a third comparison signal (Vdiff3). Even when the average luminance Avi (br) and the digital display load Pl are many bits (for example, 8 bits), one third comparison signal Vdiff3 is generated. The third comparison signal Vdiff3 serves as a read address of the third lookup table included in the storage unit 132-10.

The storage unit 132-10 stores a plurality of driving voltage control signals Cdac1 to Cdac3 selected by using the first to third comparison signals Vdiff1 to Vdiff3 as read addresses. In the storage unit 132-10, the first lookup table LUT1 and the second comparison signals L1 select the first driving voltage control signals Cdac1 using the first comparison signals Vdiff1 as read addresses. The second lookup table LUT2 selecting the second driving voltage control signals Cdac2 using Vdiff2 as the read address, and the third driving voltage control signal Cdac3 using the third comparison signal Vdiff3 as the read address. A third lookup table LUT1 for selecting is provided.

FIG. 8A illustrates an example of the first lookup table LUT1. When the average luminance Avi (br) and the digital display load Pl are 8 bits, the difference value Avi of both digital signals Avi (br) and Pl is shown. (br)-A plurality of first driving voltage control signals Cdac1 selected by using eight bit first comparison signals Vdiff1 defined by Pl and the first comparison signals Vdiff1 as read addresses. Shows. As illustrated, the plurality of first driving voltage control signals Cdac1 selected from the first lookup table LUT1 may be higher than the high potential driving voltage VDD of the previous frame. Are control signals that cause this to be reduced. In particular, as the digital value of the first comparison signal Vdiff1 of the first lookup table LUT1 increases (the difference between the average luminance Avi (br) and the display load Pl is larger), the current frame with respect to the previous frame The first driving voltage control signals Cdac1 are selected such that the decrease amount of the high potential driving voltage VDD is increased.

FIG. 8B is an example of the second lookup table LUT2. When the average luminance Avi (br) and the digital display load Pl are 8 bits, the difference value Pl of both digital signals Avi (br, Pl) is shown. A plurality of second driving voltage control signals Cdac2 selected using 8 bit second comparison signals Vdiff2 defined as Avi (br) and the second comparison signals Vdiff2 as read addresses. Shows. As illustrated, the plurality of second driving voltage control signals Cdac2 selected from the second lookup table LUT2 may be higher than the high potential driving voltage VDD of the previous frame. Are control signals that cause this to be increased. In particular, as the digital value of the second comparison signal Vdiff1 of the second lookup table LUT2 increases (the difference between the average luminance Avi (br) and the display load Pl is larger), the current frame with respect to the previous frame The second driving voltage control signals Cdac2 are selected such that the increase amount of the high potential driving voltage VDD is increased.

FIG. 8C illustrates an example of the third lookup table LUT3. When the average luminance Avi (br) and the digital display load Pl are 8 bits, the difference value Pl of both digital signals Avi (br) and Pl is shown. The third comparison signal Vdiff3 of 8 bits defined as Avi (br) and the third driving voltage control signal Cdac3 selected using the third comparison signal Vdiff3 as a read address are shown. As shown, the third driving voltage control signal Cdac3 selected from the third lookup table LUT3 is such that the high potential driving voltage VDD of the current frame is the same as the high potential driving voltage VDD of the previous frame. Is a control signal. That is, if the display load of the current frame period to be displayed on the display panel determined by the average luminance Avi (br) is substantially the same as the display load Pl of the image displayed during the previous frame period, the high potential driving voltage VDD. It is a control signal for maintaining.

9 illustrates a configuration diagram of the driving voltage generator 134 illustrated in FIG. 4.

Referring to FIG. 9, the driving voltage generator 134 is switched in response to the first to third driving voltage control signals Cdac1 to Cdac3 from the driving voltage controller 132, thereby reducing the high potential driving compared to the previous frame. The voltages VDD1, the high potential driving voltages VDD2 that are increased compared to the previous frame, and the same high potential driving voltage VDD3 as the previous frame are generated.

The driving voltage generator 134 includes a plurality of switch elements that are switched in response to the first to third driving voltage control signals Cdac1 to Cdac3. The plurality of switch elements may be composed of N-type transistors, or may be composed of P-type transistors. When a plurality of switch elements are composed of P-type transistors, the input control signals should be reversed as compared with the case of N-type transistors. That is, the second driving voltage control signals Cdac2 should be input to reduce the driving voltage of the current frame, and the first driving voltage control signals Cdac1 should be input to increase the driving voltage of the current frame. Hereinafter, for convenience of description, a case where a plurality of switch elements are composed of N-type transistors will be described as an example.

When any one of the first driving voltage control signals Cdac1 is input from the driving voltage controller 132, the driving voltage generator 134 switches a plurality of switch elements to determine which of the plurality of input voltages Vs1 to Vsn. One is output as the high potential drive voltage VDD of the current frame. The output high potential drive voltage VDD has a smaller value than the high potential drive voltage VDD of the previous frame. As a result, when the average brightness of the current frame is large, the load of the display panel is increased due to the display of a bright image as a whole, thereby preventing the temperature from rising.

When any one of the second driving voltage control signals Cdac2 is input from the driving voltage controller 132, the driving voltage generation unit 134 switches a plurality of switch elements to determine which of the plurality of input voltages Vs1 to Vsn. One is output as the high potential drive voltage VDD of the current frame. The output high potential driving voltage VDD has a larger value than the high potential driving voltage VDD of the previous frame. Accordingly, when the average luminance of the current frame is small, the peak luminance is expressed by preventing the overall luminance from being reduced due to the display of only partially bright images.

When the third driving voltage control signal Cdac2 is input from the driving voltage controller 132, the driving voltage generator 134 switches a plurality of switch elements to present one of the plurality of input voltages Vs1 to Vsn. It outputs as high potential drive voltage (VDD) of a frame. The output high potential driving voltage VDD has substantially the same value as the high potential driving voltage VDD of the previous frame.

As described above, the organic light emitting diode display and the driving method thereof according to the embodiment of the present invention change the high potential driving voltage according to the image brightness of the current frame and the display load of the detected display panel, thereby The life can be prevented from being shortened and the display quality can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. For example, the pixel driver circuit 128-2 described in the embodiment of the present invention is merely an example, and the plurality of switch elements included in the driving voltage generator 134 may include P-type transistors in addition to N-type transistors. It may be configured as. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (13)

A display panel in which a plurality of data lines and a plurality of gate lines cross each other and pixels having organic light emitting diode elements are arranged in a matrix form and having a high potential power voltage supply terminal connected to the pixels in common; A high potential driving voltage generator supplying a high potential power voltage to the high potential power voltage supply terminal; A load detector for detecting a display load of an image displayed on the display panel during an nth (n is positive integer) frame period; And An average luminance of digital video data of an image to be displayed on the display panel is calculated during an n + 1 frame period, and the average luminance is compared with the display load to control the voltage level of the high potential power voltage according to the comparison result. An organic light emitting diode display device comprising: a driving voltage control unit. The method of claim 1, The driving voltage control unit, A luminance detector which detects luminance values of each pixel by using digital video data of an image to be displayed on the display panel during the n + 1th frame period, and calculates a maximum luminance value of each pixel among the detected luminance values; An adder for adding the calculated maximum luminance values of each pixel; An average value calculator for dividing the sum of the maximum luminance values by a predetermined resolution and calculating an average luminance of an image to be displayed on the display panel during the n + 1th frame period; A comparator for generating a plurality of comparison signals by comparing the average brightness and the display load; And And a storage unit for storing a plurality of driving voltage control signals selected using the plurality of comparison signals as read addresses. The method of claim 2, And the storage unit is implemented with at least one lookup table. The method of claim 3, wherein In the lookup table, a plurality of digital driving voltage control data are listed differently according to the relative magnitude of the average brightness with respect to the display load. And the digital driving voltage control data are selected by the comparison signals generated differently according to the difference between the average brightness and the display load. The method of claim 4, wherein The plurality of digital driving voltage control data listed in the lookup table, And the average brightness is greater than the display load and the difference between the average brightness and the display load is larger, the organic light emitting diode display device being determined to lower the voltage level of the high potential power voltage. The method of claim 4, wherein The plurality of digital driving voltage control data listed in the lookup table, And the average brightness is smaller than the display load and the difference between the average brightness and the display load is larger, the organic light emitting diode display device being determined to increase the voltage level of the high potential power voltage. The method of claim 4, wherein The plurality of digital driving voltage control data listed in the lookup table, If the display load of the n + 1th frame period to be displayed on the display panel determined by the average brightness is substantially the same as the display load of the image displayed during the nth frame period, a data value for maintaining the high potential power voltage is obtained. An organic light emitting diode display device having: The method of claim 4, wherein High potential drive voltage generation unit, An organic light-emitting device comprising: a digital-to-analog converter converting the digital driving voltage control data selected by the lookup table into an analog voltage and supplying the analog voltage to the high potential power supply voltage supply terminal as the high potential power supply voltage; Diode display. The method of claim 1, The load detector is A current detector for detecting a drive current flowing through the display panel; And And an analog-to-digital converter configured to convert the detected driving current into a digital signal. An organic light emitting diode display device having a display panel including a plurality of data lines and a plurality of gate lines, each of which has organic light emitting diode elements arranged in a matrix form and including a high potential power voltage supply terminal commonly connected to the cells. In the driving method of, Supplying a high potential power voltage to the high potential power voltage supply terminal; Detecting a display load of an image displayed on the display panel during an nth (n is positive integer) frame period; Calculating average luminance of digital video data of an image to be displayed on the display panel during an n + 1th frame period; And And comparing the average brightness with the display load and controlling the voltage level of the high potential power voltage according to the comparison result. The method of claim 10, Controlling the voltage level of the high potential power voltage; And controlling the direction in which the voltage level of the high potential power voltage is lowered as the average brightness is greater than the display load and the difference between the average brightness and the display load is larger. The method of claim 10, Controlling the voltage level of the high potential power voltage; And controlling the direction of increasing the voltage level of the high potential power voltage as the average brightness is smaller than the display load and the difference between the average brightness and the display load is larger. The method of claim 10, Controlling the voltage level of the high potential power voltage; If the display load of the n + 1th frame period to be displayed on the display panel determined by the average brightness is substantially the same as the display load of the image displayed during the nth frame period, control is performed in the direction of maintaining the high potential power voltage. A method of driving an organic light emitting diode display, characterized in that.

Images