KR20080049222A - Non-volatile memory device, the method of manufacturing thereof - Google Patents

Abstract

A non-volatile memory device and a manufacturing method thereof are provided to increase remarkably a data preservation time by using carbon nano-tubes as electric charge storage regions. A source(103) and a drain(104) are formed on a substrate(101). A memory cell is formed on a channel(102) between the source and the drain. The memory cell includes carbon nano-tubes(106) for storing electric charges supplied from the channel. A gate(109) is formed on the memory cell in order to adjust the amount of electric charges to be transferred to the memory cell. The memory cell includes a tunneling oxide layer(105) formed on the channel, the carbon nano-tubes formed on the tunneling oxide layer in order to store the electric charges from the channel, an insulating layer(107) formed between the carbon nano-tubes on the tunneling oxide layer in order to prevent the migration of the electric charges between the carbon nano-tubes, and a blocking oxide layer(108) formed on the insulating layer in order to prevent the migration of the electric charges from the channel to the gate.

Description

Nonvolatile memory device and manufacturing method thereof {NON-VOLATILE MEMORY DEVICE, THE METHOD OF MANUFACTURING THEREOF}

1 is a three-dimensional view of a nonvolatile memory device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the nonvolatile memory device taken along the line AA ′ of FIG.

3 to 10 illustrate a method of manufacturing a nonvolatile memory device according to an embodiment of the present invention.

***** Description of the symbols for the main parts of the drawings *****

101: substrate

102: channel

103: source

104: drain

105: tunneling oxide film

106: carbon nanotube

107: insulating film

108: blocking oxide film

109: gate

The present invention relates to a nonvolatile memory device and a method of manufacturing the same.

In the semiconductor market, as computer devices and mobile devices are miniaturized, a highly integrated nonvolatile memory device is required. In order to manufacture such a nonvolatile memory device, the physical size of the nonvolatile memory device must be reduced, the operating voltage of the nonvolatile memory device must be lowered, the operating speed is increased, and the data retention time is increased.

In general, a nonvolatile memory device includes a transistor that serves as a switch to secure a passage of current when writing or reading information into a capacitor, and a capacitor that serves to preserve stored charge. Such a nonvolatile memory device has a feature in that an electric charge is stored in a capacitor without an external power supply.

The nonvolatile memory device may be classified into a floating gate type nonvolatile memory device and a floating trap type memory device according to the unit cell structure. As one of the nonvolatile memory devices of the floating trap type, there is a nonvolatile memory device having a charge trapping region composed of polysilicon. In the nonvolatile memory device having such a configuration, if there is even a slight defect in the polysilicon which is the charge trapping region, the data retention time is significantly reduced.

In order to supplement the above problems, a nonvolatile memory device having a silicon oxide nitride oxide (SONOS) structure in which a charge trap region of a floating trap type nonvolatile memory device is replaced with nitride instead of polysilicon is proposed. The nonvolatile memory device having a sonos structure performs programming or erasing by storing a tunneled charge in a nitride film or extracting a stored charge from a channel between a source and a drain. The nonvolatile memory device having a sonos structure has a lower operating voltage, a faster operating speed, and a longer data retention time than a nonvolatile memory device having a polysilicon charge storage region. However, even in the non-volatile memory device having a sonos structure, the memory operating voltage reaches 10V, there are problems such as trapping and charge leakage due to the introduction of new film quality.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a nonvolatile memory device having improved charge storage capability and a method of manufacturing the same by increasing data retention time.

Another object of the present invention is to provide a nonvolatile memory device which operates at a low voltage, is stable and operates at a high speed, and a method of manufacturing the same.

A nonvolatile memory device according to an embodiment of the present invention for achieving the technical problem is formed on a channel between the source and the drain and the source and the drain formed on a substrate, and stores the charge supplied from the channel A memory cell including carbon nanotubes and a gate formed on the memory cell to control an amount of charge flowing from the channel to the memory cell.

Here, the memory cell is formed on the tunneling oxide film formed on the channel and the tunneling oxide film, between the carbon nanotubes for storing the charge supplied from the channel and the carbon nanotubes on the tunneling oxide film, And an insulating film for preventing the transfer of charges between the carbon nanotubes and a blocking oxide film formed on the insulating film to prevent the charge supplied from the channel from moving to the gate.

The tunneling oxide film, the blocking oxide film, or the insulating film may be formed of silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate, hafnium oxide (HfO ₂ ), or It may be one of hafnium silicate (Hf silicate).

The carbon nanotubes may be formed perpendicular to the substrate.

Here, the carbon nanotubes may be formed of single-stranded single-walled carbon nanotubes or single-stranded multi-walled carbon nanotubes.

Here, the channel may be formed in a tube type.

The channel may be one of carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotubes) or gallium phosphate nanotubes.

Here, the substrate may be formed including silicon.

A method of manufacturing a nonvolatile memory device according to an embodiment of the present invention comprises the steps of (a) forming a tunneling oxide film on a substrate, (b) forming carbon nanotubes on the tunneling oxide film, and (c) the Forming an insulating film on the tunneling oxide film between the carbon nanotubes, (d) forming a blocking oxide film on the insulating film, (e) forming a gate on the blocking oxide film, and (f) Forming a source and a drain on the substrate.

In the step (b), (b-1) inserting the substrate on which the tunneling oxide film is formed into a solution containing sulfuric acid and hydrogen peroxide, and performing a sonication to form hydroxyl (OH ⁻ ) on the tunneling oxide film, (b-2) reacting an ammonium persulfate (APS) solution with the hydroxyl group at room temperature to form an amino monolayer on the tunneling oxide film; and (b-3) formed on carbon nanotubes. Condensing a carboxyl group (COOH ⁻ ) with an amino monolayer film formed on the tunneling oxide film to form the carbon nanotubes perpendicular to the tunneling oxide film.

Here, in the step (b-1), the mass of sulfuric acid contained in the solution is 0.6 times or more and 0.8 times or less of the mass of the solution, the mass of hydrogen peroxide contained in the solution is 0.2 times or more of the mass of the solution It is preferable that it is 0.4 times or less.

Here, in the step (b-1), the ultrasonic treatment is preferably performed for a time of 30 minutes or more and 120 minutes or less at a temperature of 40 ℃ to 60 ℃.

Here, in the step (b-3), the carbon nanotubes may be single-stranded single-walled carbon nanotubes or single-stranded multi-walled carbon nanotubes. Do.

Here, step (b) includes (b-1 ') depositing a catalyst material on the tunneling oxide film, (b-2') patterning the catalyst material, and (b-3 ') the patterned catalyst. And forming carbon nanotubes perpendicular to the tunneling oxide layer by thermochemical vapor deposition or plasma chemical vapor deposition on a material.

Here, the catalytic material may be one of nickel, iron, cobalt or an alloy including one or more of nickel, iron, or cobalt.

In the step (b-2 ′), the catalyst material is preferably patterned by an extreme ultra violet lithography process or an electron beam lithography process.

Here, in the step (b-3 '), the carbon nanotubes may be formed of single-walled carbon nanotubes or single-stranded multi-walled carbon nanotubes. Can be.

Here, in step (f), a channel between the source and the drain may be formed in a tube type. Here, the channel may be formed of carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotubes) or gallium phosphate nanotubes (Gallium phosphate nanotubes).

The tunneling oxide film, the blocking oxide film, or the insulating film may be formed of silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate, hafnium oxide (HfO ₂ ), or It can be formed with one of hafnium silicate (Hf silicate).

Here, the substrate preferably contains silicon.

Hereinafter, with reference to the accompanying drawings will be described in more detail.

FIG. 1 is a three-dimensional view of a nonvolatile memory device according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view of the nonvolatile memory device according to the exemplary embodiment of the present invention, cut along the direction AA ′. As shown in FIGS. 1 and 2, a non-volatile memory device according to an embodiment of the present disclosure may include a source 103, a drain 104, a source 103, and a drain 104 formed spaced apart from the substrate 101. Memory cells 105, 106, 107, 108 and memory cells 105, 106, formed on the channel 102 between and containing carbon nanotubes 106 for storing charge supplied from the channel 102. And a gate 109 formed on the 107 and 108 to control the amount of charge flowing from the channel 102 into the memory cells 105, 106, 107 and 108. The memory cells 105, 106, 107, and 108 are formed of a tunneling oxide film 105 formed on the channel 102 and a carbon nanotube formed on the tunneling oxide film 105 to store charges supplied from the channel 102. 106 and the insulating film 107 and the insulating film 107 formed between the carbon nanotubes 106 on the tunneling oxide film 105 to prevent charge transfer between the carbon nanotubes 106 and formed on the channel. And a blocking oxide film 108 which prevents the charge supplied from 102 from moving to the gate 109.

First, carbon nanotube (CNT) is a carbon allotrope composed of carbon present in a large amount on the earth and is a material in which one carbon is combined with another carbon atom and a hexagonal honeycomb pattern to form a tube. The diameter of the tube is an extremely small region, with nanometers (nm = one billionth of a meter). The shape of the carbon nanotubes 106 is a state in which a graphite sheet is rounded to a nano size diameter and has a sp2 bonding structure. Depending on the angle and shape in which the graphite surface is curled, it exhibits the properties of a conductor or a semiconductor. Carbon nanotubes 106 are divided into single-walled nanotubes or multi-walled nanotubes according to the number of bonds forming a wall, and the single-walled nanotubes are clustered into several. The shape is called a bundle nanotube. The carbon nanotubes 106 have excellent mechanical characteristics, electrical selectivity, excellent field emission characteristics, high efficiency hydrogen storage medium characteristics, and are used in various fields such as aerospace, biotechnology, environmental energy, materials industry, and pharmaceutical industry. The range of applications is widening. In particular, research is being actively conducted in the nanotechnology industry, which is a high-tech industry.

In a nonvolatile memory device according to an embodiment of the present invention, a single-walled carbon nanotube or a single strand of carbon nanotubes 106 that stores charge tunneled from the channel 102 is stored. By adopting one of the multi-walled carbon nanotubes, to be formed perpendicular to the tunneling oxide film 105.

According to this structure, 1) the nonvolatile memory device according to an embodiment of the present invention can extend the data retention time more than conventional nonvolatile memory devices. The reason for this is that dangling bonds do not exist between the carbon nanotubes 106 and the insulating film 107 surrounding the carbon nanotubes 106 which are not mixed with impurities. Because it has.

2) The nonvolatile memory device according to the embodiment of the present invention can lower the operating voltage than the conventional nonvolatile memory device. When explaining the reason with reference to Equation 1,

Hereinafter, the parameters of Equation 1 are defined as follows.

: 플랫 밴드 전압(flat band voltage)의 변화량,

Is the amount of change in the flat band voltage,

: 저장된 전하의 합(Total Stored Charge),

= Total stored charge,

: 게이트 캐패시턴스(Gate Capacitance),

: Gate Capacitance,

: 블로킹 산화막 두께(Blocking Oxide Thickness),

: Blocking Oxide Thickness,

: 게이트와 저장된 전하간 거리(Distance between Gate to Stored Charge)

Distance between Gate to Stored Charge

When electrons tunneled from the channel 102 are stored in the carbon nanotubes 106 during the program operation, the stored electrons are moved to the vicinity of the blocking oxide film 108 by the gate 109 bias of the positive voltage. . At this time, the change amount of the flat band voltage is minimized by the equation (1). However, if a negative voltage is applied to the gate 109 and the read operation is performed, electrons stored in the carbon nanotube 106 are moved to the vicinity of the tunneling oxide film 105, where Equation 1 Since the distance (X ₁ ) between the gate 109 and the stored electrons is maximized, the maximum change amount of the flat band voltage is obtained with the same electrons, thereby increasing the operating voltage of the nonvolatile memory device according to the embodiment of the present invention. It can be lower than conventional nonvolatile memory devices.

3) A nonvolatile memory device according to an embodiment of the present invention may have stable memory characteristics. The reason for this is to prevent the parallel hopping phenomenon that can occur in the nonvolatile memory device using nitride film as the charge storage region and the nonvolatile memory device using quantum dot as the charge storage region. Because it is. Here, the parallel hopping phenomenon refers to one of the main mechanisms by which charge stored in a trapped nonvolatile memory device causes discharge. As a result, since the carbon nanotubes are formed perpendicular to the tunneling oxide film 105, the charges stored in the carbon nanotubes 106 move only in the axial direction of the carbon nanotubes 106. Therefore, the charge cannot be moved to adjacent carbon nanotubes by tunneling the insulating layer 107, and thus the nonvolatile memory device according to the embodiment of the present invention has more stable memory characteristics than the conventional nonvolatile memory devices.

Here, although not shown in the drawing, the channel 102 may be formed as a tube type channel, and the tube type to be used as the channel 102 may be carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotubes) or gallium. It may be formed of one of the phosphate nanotubes (Gallium phosphate nanotube). By forming the channel 102 as a tube type, a nonvolatile memory device capable of increasing the ratio of program current to on current and lowering the resistance of the channel is realized.

Here, the tunneling oxide film 105, the blocking oxide film 108, or the insulating film 107 may be formed of silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), which are insulating materials that do not exhibit memory characteristics. It may be one of zirconium silicate (Zr silicate), hafnium oxide (HfO ₂ ) or hafnium silicate (Hf silicate). In addition, the substrate 101 may be formed including silicon.

3 to 10 illustrate a method of manufacturing a nonvolatile memory device according to an embodiment of the present invention. As shown in FIGS. 3 to 10, a method of manufacturing a nonvolatile memory device according to an embodiment of the present invention may include (a) forming a tunneling oxide film 105 on a substrate 101, and (b) tunneling. Forming carbon nanotubes 106 on the oxide film 105, (c) forming an insulating film 107 on the tunneling oxide film 105 between the carbon nanotubes 106, and (d) Forming a blocking oxide film 108 on the insulating film 107, (e) forming a gate 109 on the blocking oxide film 108, and (f) a source 103 and a drain on the substrate 101. Forming 104. Hereinafter, each step will be described in detail with reference to the accompanying drawings.

<Step of Forming Tunneling Oxide Film 105 on Substrate 101>

As shown in FIG. 3, a thermal process, an atomic layer deposition (ALD), or chemical vapor deposition (CVD) method is performed on a substrate 101 on which a channel is formed using ion implantation or the like. Tunneling oxide film 105 is formed. In this case, the substrate 101 may be formed of a material including silicon. In addition, the tunneling oxide layer 105 is an insulating material exhibiting no memory characteristics, silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ) zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), hafnium oxide (HfO _2). ) Or hafnium silicate. In addition, a channel connecting the source 103 and the drain 104 may be formed in a tube type. In this case, the channel may be formed of one of carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotubes) or gallium phosphate nanotubes.

<Step of forming carbon nanotubes 106 on the tunneling oxide film 105>

As shown in FIG. 4 to FIG. 7, the forming of the carbon nanotubes 106 on the tunneling oxide film 105 may be performed by (b-1) forming a substrate 101 on which the tunneling oxide film 105 is formed using sulfuric acid and hydrogen peroxide. placed in a solution containing, hydroxyl group (OH ^-) on the tunnel oxide film 105 by ultrasonic treatment of ammonium persulfate in and forming, (b-2) at room temperature: a hydroxyl group of (ammonium persulfate APS) solution (OH ^- ) To form an amino monolayer on the tunneling oxide film 105 and (b-3) the carboxyl group (COOH ⁻ ) formed on the carbon nanotubes 106 and the amino formed on the tunneling oxide film 105. Condensing the monolayer film to form carbon nanotubes 106 perpendicular to the tunneling oxide film 105.

Sulfuric acid (H ₂ SO ₄ ) in the solution in step (b-1) is H ₂ SO ₄ is 98%, H ₂ O is 2% sulfuric acid, hydrogen peroxide (H ₂ O ₂ ) is H ₂ O ₂ Is 30% and H ₂ O is 70%. Moreover, it is preferable that the mass of sulfuric acid is 0.6 times or more and 0.8 times or less of the mass of a solution, and the mass of hydrogen peroxide contained in a solution is 0.2 or more and 0.4 times or less of the mass of a solution. In addition, the ultrasonic treatment is preferably performed for a time of 30 minutes or more and 120 minutes or less at a temperature of 40 ° C or more and 60 ° C or less. In addition, the carbon nanotube in step (b-3) is preferably a single-stranded single-walled carbon nanotube or a single-stranded multi-walled carbon nanotube.

<Step of forming insulating film 107 on tunneling oxide film 105 between carbon nanotubes 106>

As shown in FIG. 8, an insulating film 107 is formed on the tunneling oxide film 105 between the carbon nanotubes 106. At this time, the insulating film 107 is an insulating material that does not exhibit memory characteristics, silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), hafnium oxide (HfO ₂₎ ) Or hafnium silicate.

<Step of forming blocking oxide film 108 on insulating film 107>

As shown in FIG. 9, the blocking oxide film 108 is deposited on the insulating film 107 by a thermal process, atomic layer deposition (ALD), chemical vapor deposition (CVD), or the like. Form. In this case, the blocking oxide layer 108 is an insulating material that does not exhibit memory characteristics, such as silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), and hafnium oxide ( HfO ₂ ) or hafnium silicate.

<Forming Gate 109 on Blocking Oxide Film 108 and Forming Source 103 and Drain 104 on Substrate 101>

As shown in FIG. 10, the gate 109 is formed on the blocking oxide film 108, and the source 103 and the drain 104 are formed by an implant or diffusion process. At this time, the blocking oxide film 108 is an insulating material that does not exhibit memory characteristics, such as silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), and hafnium oxide (HfO). ₂ ) or hafnium silicate.

Here, in the manufacturing of the nonvolatile memory device according to the embodiment of the present invention, (b) forming the carbon nanotubes 106 on the tunneling oxide film 105 may be performed on (b-1 ′) the tunneling oxide film 105. Depositing a catalyst material on the substrate, (b-2 ') patterning the catalyst material, and (b-3') a thermal chemical vapor deposition or plasma chemical vapor deposition method on the patterned catalyst material. It may be formed including the step of vertically forming the carbon nanotubes 106 by Enhanced Chemical Vapor Deposition (PECVD). Hereinafter, each step will be described in detail.

<Deposition of Catalytic Material on Tunneling Oxide Film 105>

A catalytic material is deposited on the tunneling oxide film 105. At this time, the catalyst deposited by a method such as thermal evaporation or sputtering may be formed of an alloy containing one or more of iron (Fe), nickel (Ni), cobalt (Co) or iron, nickel or cobalt.

<Step of patterning catalyst material>

The catalytic material in which the carbon nanotubes 106 are formed perpendicular to the tunneling oxide layer 105 may be patterned by an extreme ultra lithography process or an electron beam lithography process.

Conventional far ultraviolet (DUV: hundreds of nm wavelength) lithography techniques have a theoretical limitation that they cannot implement patterns below 65 nm. However, EUV (ultraviolet: about 13 nm wavelength) lithography technology is a catalyst material for positioning nanoscale semiconductor devices of 65 nm or less, especially those with nanometer diameters such as carbon nanotubes, where desired. It is a suitable method for patterning. In addition, an E-beam lithography process using the difference in solubility between the polymer having the main chain cleaved by the electron beam transfer and the organic solvent having the long chain of the non-transferred portion is used. It is a suitable method for patterning a catalytic material for positioning a material having a nanometer diameter in a tube such as carbon nanotubes. Therefore, the carbon nanotubes 106 may be positioned where desired using the above two process methods.

<Step of forming carbon nanotubes 106 perpendicular to the tunneling oxide film 105 by thermochemical vapor deposition or plasma chemical vapor deposition on the patterned catalyst material>

The patterned catalyst material is placed in a reactor of a thermochemical vapor deposition apparatus maintaining a temperature of 700 ° C. to 900 ° C., and the carbon nanotube 106 is tunneled on the patterned catalyst material by flowing ammonia gas containing a hydrocarbon reaction gas. It may be formed perpendicular to the oxide film 105.

In addition, the carbon nanotubes 106 may be formed perpendicular to the tunneling oxide layer 105 by the plasma chemical vapor deposition method, which is a method of forming the carbon nanotubes 106 at a lower temperature than the thermal chemical vapor deposition method. Plasma chemical vapor deposition is a method of synthesizing carbon nanotubes on a catalyst material by applying a high frequency power to both electrodes while supplying a reaction gas containing a hydrocarbon gas into the plasma chemical vapor deposition apparatus.

Here, the carbon nanotubes are preferably single-stranded single-walled carbon nanotubes or single-stranded multi-walled carbon nanotubes.

As described above, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the following claims rather than the detailed description, and the meaning and scope of the claims and All changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described in detail above, according to the present invention, by using carbon nanotubes as the charge storage region, there is an effect of providing a nonvolatile memory device and a method of manufacturing the same, which greatly increase the data retention time.

In addition, the present invention has the effect of providing a non-volatile memory device, a low voltage operation, a stable, high-speed operation using a carbon nanotube as a charge storage region and a method of manufacturing the same.

Claims (21)

Source and drain formed spaced apart from the substrate; A memory cell formed on a channel between the source and the drain, the memory cell including carbon nanotubes storing charge supplied from the channel; And A gate formed on the memory cell to control an amount of charge flowing from the channel to the memory cell; Nonvolatile memory device comprising a. The method of claim 1, The memory cell is A tunneling oxide film formed on the channel; Carbon nanotubes formed on the tunneling oxide layer and storing charges supplied from the channel; An insulating layer formed between the carbon nanotubes on the tunneling oxide layer to prevent charge transfer between the carbon nanotubes; And A blocking oxide film formed on the insulating film to prevent the charge supplied from the channel from moving to the gate; Nonvolatile memory device comprising a. The method of claim 2, The tunneling oxide film, the blocking oxide film, or the insulating film Non-volatile memory device consisting of silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ), zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), hafnium oxide (HfO ₂ ) or hafnium silicate (Hf silicate) . The method of claim 1, The carbon nanotubes are formed perpendicular to the substrate. The method of claim 1, The carbon nanotubes are single-stranded single-walled carbon nanotubes or single-stranded multi-walled carbon nanotubes. The method of claim 1, And the channel is a tube type. The method of claim 6, The channel is one of carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotubes) or gallium phosphate nanotubes (Gallium phosphate nanotubes). The method of claim 1, And the substrate comprises silicon. (a) forming a tunneling oxide film on the substrate; (b) forming carbon nanotubes on the tunneling oxide film; (c) forming an insulating film on the tunneling oxide film between the carbon nanotubes; (d) forming a blocking oxide film on the insulating film; (e) forming a gate on the blocking oxide film; And (f) forming a source and a drain on the substrate; Method of manufacturing a nonvolatile memory device comprising a. The method of claim 9, Step (b) is (b-1) inserting the substrate on which the tunneling oxide film is formed into a solution containing sulfuric acid and hydrogen peroxide, and performing a sonication to form hydroxyl (OH ⁻ ) on the tunneling oxide film; (b-2) reacting an ammonium persulfate (APS) solution with the hydroxyl group at room temperature to form an amino monolayer on the tunneling oxide film; And (b-3) condensing the carboxyl group (COOH ⁻ ) formed on the carbon nanotubes with the amino monolayer film formed on the tunneling oxide film to form the carbon nanotubes perpendicular to the tunneling oxide film; Method of manufacturing a nonvolatile memory device comprising a. The method of claim 10, In the step (b-1) The mass of sulfuric acid contained in the solution is 0.6 times or more and 0.8 times or less of the mass of the solution, The mass of hydrogen peroxide contained in the solution is 0.2 to 0.4 times the mass of the solution of the nonvolatile memory device manufacturing method. The method of claim 10, In the step (b-1) And the ultrasonication is performed at a temperature of 40 ° C. or more and 60 ° C. or less for 30 minutes or more and 120 minutes or less. The method of claim 10, In the step (b-3) The carbon nanotubes are single stranded single-walled carbon nanotubes or single stranded multi-walled carbon nanotubes. The method of claim 9, Step (b) is (b-1) depositing a catalyst material on the tunneling oxide film; (b-2) patterning the catalyst material; (b-3) forming carbon nanotubes perpendicular to the tunneling oxide layer by thermal chemical vapor deposition or plasma chemical vapor deposition on the patterned catalyst material; Method of manufacturing a nonvolatile memory device comprising a. The method of claim 14, And the catalyst material is one of nickel, iron, cobalt, or an alloy containing at least one of nickel, iron, and cobalt. The method of claim 14, In the step (b-2) The method of manufacturing a non-volatile memory device for patterning the catalyst material by an extreme ultra lithography process or an electron beam lithography process. The method of claim 14, In the step (b-3), The carbon nanotubes are single stranded single-walled carbon nanotubes or single stranded multi-walled carbon nanotubes. The method of claim 9, And in step (f), forming a channel between the source and the drain in the form of a tube. The method of claim 18, The channel is formed of one of carbon nanotubes, silicon nanotubes, boron nitride nanotubes (BN nanotube) or gallium phosphate nanotubes (Gallium phosphate nanotube) manufacturing method of a nonvolatile memory device. The method of claim 9, The tunneling oxide film, the blocking oxide film, or the insulating film may be formed of silicon oxide (SIO ₂ ), aluminum oxide (Al ₂ O ₃ ) zircon oxide (ZrO ₂ ), zirconium silicate (Zr silicate), hafnium oxide (HfO ₂ ), or hafnium silicate ( Hf silicate) is a manufacturing method of a nonvolatile memory device formed by one of. The method of claim 9, The substrate is a method of manufacturing a nonvolatile memory device containing silicon.

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